RISC-V向量函数接口
宏定义 | 类型定义 | 枚举 | 函数
riscv_vector.h 文件参考

COMPILER RISCV-V Intrinsic Reference 更多...

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宏定义

#define __rv32   static __inline__ __attribute__((__always_inline__, __nodebug__))
 
#define vsetvli(avl, sew, lmul, ediv)
 
#define vadd_vi_i8m1(op1, op2)
 
#define vadd_vi_i8m2(op1, op2)
 
#define vadd_vi_i8m4(op1, op2)
 
#define vadd_vi_i8m8(op1, op2)
 
#define vadd_vi_i16m1(op1, op2)
 
#define vadd_vi_i16m2(op1, op2)
 
#define vadd_vi_i16m4(op1, op2)
 
#define vadd_vi_i16m8(op1, op2)
 
#define vadd_vi_i32m1(op1, op2)
 
#define vadd_vi_i32m2(op1, op2)
 
#define vadd_vi_i32m4(op1, op2)
 
#define vadd_vi_i32m8(op1, op2)
 
#define vrsub_vi_i8m1(op1, op2)
 
#define vrsub_vi_i8m2(op1, op2)
 
#define vrsub_vi_i8m4(op1, op2)
 
#define vrsub_vi_i8m8(op1, op2)
 
#define vrsub_vi_i16m1(op1, op2)
 
#define vrsub_vi_i16m2(op1, op2)
 
#define vrsub_vi_i16m4(op1, op2)
 
#define vrsub_vi_i16m8(op1, op2)
 
#define vrsub_vi_i32m1(op1, op2)
 
#define vrsub_vi_i32m2(op1, op2)
 
#define vrsub_vi_i32m4(op1, op2)
 
#define vrsub_vi_i32m8(op1, op2)
 
#define vadd_vi_i8m1_m(mask, op1, op2)
 
#define vadd_vi_i8m2_m(mask, op1, op2)
 
#define vadd_vi_i8m4_m(mask, op1, op2)
 
#define vadd_vi_i8m8_m(mask, op1, op2)
 
#define vadd_vi_i16m1_m(mask, op1, op2)
 
#define vadd_vi_i16m2_m(mask, op1, op2)
 
#define vadd_vi_i16m4_m(mask, op1, op2)
 
#define vadd_vi_i16m8_m(mask, op1, op2)
 
#define vadd_vi_i32m1_m(mask, op1, op2)
 
#define vadd_vi_i32m2_m(mask, op1, op2)
 
#define vadd_vi_i32m4_m(mask, op1, op2)
 
#define vadd_vi_i32m8_m(mask, op1, op2)
 
#define vrsub_vi_i8m1_m(mask, op1, op2)
 
#define vrsub_vi_i8m2_m(mask, op1, op2)
 
#define vrsub_vi_i8m4_m(mask, op1, op2)
 
#define vrsub_vi_i8m8_m(mask, op1, op2)
 
#define vrsub_vi_i16m1_m(mask, op1, op2)
 
#define vrsub_vi_i16m2_m(mask, op1, op2)
 
#define vrsub_vi_i16m4_m(mask, op1, op2)
 
#define vrsub_vi_i16m8_m(mask, op1, op2)
 
#define vrsub_vi_i32m1_m(mask, op1, op2)
 
#define vrsub_vi_i32m2_m(mask, op1, op2)
 
#define vrsub_vi_i32m4_m(mask, op1, op2)
 
#define vrsub_vi_i32m8_m(mask, op1, op2)
 
#define vadc_vim_i8m1(op1, op2, carryin)
 
#define vadc_vim_i8m2(op1, op2, carryin)
 
#define vadc_vim_i8m4(op1, op2, carryin)
 
#define vadc_vim_i8m8(op1, op2, carryin)
 
#define vadc_vim_i16m1(op1, op2, carryin)
 
#define vadc_vim_i16m2(op1, op2, carryin)
 
#define vadc_vim_i16m4(op1, op2, carryin)
 
#define vadc_vim_i16m8(op1, op2, carryin)
 
#define vadc_vim_i32m1(op1, op2, carryin)
 
#define vadc_vim_i32m2(op1, op2, carryin)
 
#define vadc_vim_i32m4(op1, op2, carryin)
 
#define vadc_vim_i32m8(op1, op2, carryin)
 
#define vadc_vim_u8m1(op1, op2, carryin)
 
#define vadc_vim_u8m2(op1, op2, carryin)
 
#define vadc_vim_u8m4(op1, op2, carryin)
 
#define vadc_vim_u8m8(op1, op2, carryin)
 
#define vadc_vim_u16m1(op1, op2, carryin)
 
#define vadc_vim_u16m2(op1, op2, carryin)
 
#define vadc_vim_u16m4(op1, op2, carryin)
 
#define vadc_vim_u16m8(op1, op2, carryin)
 
#define vadc_vim_u32m1(op1, op2, carryin)
 
#define vadc_vim_u32m2(op1, op2, carryin)
 
#define vadc_vim_u32m4(op1, op2, carryin)
 
#define vadc_vim_u32m8(op1, op2, carryin)
 
#define vmadc_vim_i8m1(op1, op2, carryin)
 
#define vmadc_vim_i8m2(op1, op2, carryin)
 
#define vmadc_vim_i8m4(op1, op2, carryin)
 
#define vmadc_vim_i8m8(op1, op2, carryin)
 
#define vmadc_vim_i16m1(op1, op2, carryin)
 
#define vmadc_vim_i16m2(op1, op2, carryin)
 
#define vmadc_vim_i16m4(op1, op2, carryin)
 
#define vmadc_vim_i16m8(op1, op2, carryin)
 
#define vmadc_vim_i32m1(op1, op2, carryin)
 
#define vmadc_vim_i32m2(op1, op2, carryin)
 
#define vmadc_vim_i32m4(op1, op2, carryin)
 
#define vmadc_vim_i32m8(op1, op2, carryin)
 
#define vmadc_vim_u8m1(op1, op2, carryin)
 
#define vmadc_vim_u8m2(op1, op2, carryin)
 
#define vmadc_vim_u8m4(op1, op2, carryin)
 
#define vmadc_vim_u8m8(op1, op2, carryin)
 
#define vmadc_vim_u16m1(op1, op2, carryin)
 
#define vmadc_vim_u16m2(op1, op2, carryin)
 
#define vmadc_vim_u16m4(op1, op2, carryin)
 
#define vmadc_vim_u16m8(op1, op2, carryin)
 
#define vmadc_vim_u32m1(op1, op2, carryin)
 
#define vmadc_vim_u32m2(op1, op2, carryin)
 
#define vmadc_vim_u32m4(op1, op2, carryin)
 
#define vmadc_vim_u32m8(op1, op2, carryin)
 
#define vmadc_vi_i8m1(op1, op2)
 
#define vmadc_vi_i8m2(op1, op2)
 
#define vmadc_vi_i8m4(op1, op2)
 
#define vmadc_vi_i8m8(op1, op2)
 
#define vmadc_vi_i16m1(op1, op2)
 
#define vmadc_vi_i16m2(op1, op2)
 
#define vmadc_vi_i16m4(op1, op2)
 
#define vmadc_vi_i16m8(op1, op2)
 
#define vmadc_vi_i32m1(op1, op2)
 
#define vmadc_vi_i32m2(op1, op2)
 
#define vmadc_vi_i32m4(op1, op2)
 
#define vmadc_vi_i32m8(op1, op2)
 
#define vand_vi_i8m1(op1, op2)
 
#define vand_vi_i8m2(op1, op2)
 
#define vand_vi_i8m4(op1, op2)
 
#define vand_vi_i8m8(op1, op2)
 
#define vand_vi_i16m1(op1, op2)
 
#define vand_vi_i16m2(op1, op2)
 
#define vand_vi_i16m4(op1, op2)
 
#define vand_vi_i16m8(op1, op2)
 
#define vand_vi_i32m1(op1, op2)
 
#define vand_vi_i32m2(op1, op2)
 
#define vand_vi_i32m4(op1, op2)
 
#define vand_vi_i32m8(op1, op2)
 
#define vor_vi_i8m1(op1, op2)
 
#define vor_vi_i8m2(op1, op2)
 
#define vor_vi_i8m4(op1, op2)
 
#define vor_vi_i8m8(op1, op2)
 
#define vor_vi_i16m1(op1, op2)
 
#define vor_vi_i16m2(op1, op2)
 
#define vor_vi_i16m4(op1, op2)
 
#define vor_vi_i16m8(op1, op2)
 
#define vor_vi_i32m1(op1, op2)
 
#define vor_vi_i32m2(op1, op2)
 
#define vor_vi_i32m4(op1, op2)
 
#define vor_vi_i32m8(op1, op2)
 
#define vxor_vi_i8m1(op1, op2)
 
#define vxor_vi_i8m2(op1, op2)
 
#define vxor_vi_i8m4(op1, op2)
 
#define vxor_vi_i8m8(op1, op2)
 
#define vxor_vi_i16m1(op1, op2)
 
#define vxor_vi_i16m2(op1, op2)
 
#define vxor_vi_i16m4(op1, op2)
 
#define vxor_vi_i16m8(op1, op2)
 
#define vxor_vi_i32m1(op1, op2)
 
#define vxor_vi_i32m2(op1, op2)
 
#define vxor_vi_i32m4(op1, op2)
 
#define vxor_vi_i32m8(op1, op2)
 
#define vand_vi_i8m1_m(mask, op1, op2)
 
#define vand_vi_i8m2_m(mask, op1, op2)
 
#define vand_vi_i8m4_m(mask, op1, op2)
 
#define vand_vi_i8m8_m(mask, op1, op2)
 
#define vand_vi_i16m1_m(mask, op1, op2)
 
#define vand_vi_i16m2_m(mask, op1, op2)
 
#define vand_vi_i16m4_m(mask, op1, op2)
 
#define vand_vi_i16m8_m(mask, op1, op2)
 
#define vand_vi_i32m1_m(mask, op1, op2)
 
#define vand_vi_i32m2_m(mask, op1, op2)
 
#define vand_vi_i32m4_m(mask, op1, op2)
 
#define vand_vi_i32m8_m(mask, op1, op2)
 
#define vor_vi_i8m1_m(mask, op1, op2)
 
#define vor_vi_i8m2_m(mask, op1, op2)
 
#define vor_vi_i8m4_m(mask, op1, op2)
 
#define vor_vi_i8m8_m(mask, op1, op2)
 
#define vor_vi_i16m1_m(mask, op1, op2)
 
#define vor_vi_i16m2_m(mask, op1, op2)
 
#define vor_vi_i16m4_m(mask, op1, op2)
 
#define vor_vi_i16m8_m(mask, op1, op2)
 
#define vor_vi_i32m1_m(mask, op1, op2)
 
#define vor_vi_i32m2_m(mask, op1, op2)
 
#define vor_vi_i32m4_m(mask, op1, op2)
 
#define vor_vi_i32m8_m(mask, op1, op2)
 
#define vxor_vi_i8m1_m(mask, op1, op2)
 
#define vxor_vi_i8m2_m(mask, op1, op2)
 
#define vxor_vi_i8m4_m(mask, op1, op2)
 
#define vxor_vi_i8m8_m(mask, op1, op2)
 
#define vxor_vi_i16m1_m(mask, op1, op2)
 
#define vxor_vi_i16m2_m(mask, op1, op2)
 
#define vxor_vi_i16m4_m(mask, op1, op2)
 
#define vxor_vi_i16m8_m(mask, op1, op2)
 
#define vxor_vi_i32m1_m(mask, op1, op2)
 
#define vxor_vi_i32m2_m(mask, op1, op2)
 
#define vxor_vi_i32m4_m(mask, op1, op2)
 
#define vxor_vi_i32m8_m(mask, op1, op2)
 
#define vsll_vi_i8m1(op1, op2)
 
#define vsll_vi_i8m2(op1, op2)
 
#define vsll_vi_i8m4(op1, op2)
 
#define vsll_vi_i8m8(op1, op2)
 
#define vsll_vi_i16m1(op1, op2)
 
#define vsll_vi_i16m2(op1, op2)
 
#define vsll_vi_i16m4(op1, op2)
 
#define vsll_vi_i16m8(op1, op2)
 
#define vsll_vi_i32m1(op1, op2)
 
#define vsll_vi_i32m2(op1, op2)
 
#define vsll_vi_i32m4(op1, op2)
 
#define vsll_vi_i32m8(op1, op2)
 
#define vsll_vi_u8m1(op1, op2)
 
#define vsll_vi_u8m2(op1, op2)
 
#define vsll_vi_u8m4(op1, op2)
 
#define vsll_vi_u8m8(op1, op2)
 
#define vsll_vi_u16m1(op1, op2)
 
#define vsll_vi_u16m2(op1, op2)
 
#define vsll_vi_u16m4(op1, op2)
 
#define vsll_vi_u16m8(op1, op2)
 
#define vsll_vi_u32m1(op1, op2)
 
#define vsll_vi_u32m2(op1, op2)
 
#define vsll_vi_u32m4(op1, op2)
 
#define vsll_vi_u32m8(op1, op2)
 
#define vsrl_vi_u8m1(op1, op2)
 
#define vsrl_vi_u8m2(op1, op2)
 
#define vsrl_vi_u8m4(op1, op2)
 
#define vsrl_vi_u8m8(op1, op2)
 
#define vsrl_vi_u16m1(op1, op2)
 
#define vsrl_vi_u16m2(op1, op2)
 
#define vsrl_vi_u16m4(op1, op2)
 
#define vsrl_vi_u16m8(op1, op2)
 
#define vsrl_vi_u32m1(op1, op2)
 
#define vsrl_vi_u32m2(op1, op2)
 
#define vsrl_vi_u32m4(op1, op2)
 
#define vsrl_vi_u32m8(op1, op2)
 
#define vsra_vi_i8m1(op1, op2)
 
#define vsra_vi_i8m2(op1, op2)
 
#define vsra_vi_i8m4(op1, op2)
 
#define vsra_vi_i8m8(op1, op2)
 
#define vsra_vi_i16m1(op1, op2)
 
#define vsra_vi_i16m2(op1, op2)
 
#define vsra_vi_i16m4(op1, op2)
 
#define vsra_vi_i16m8(op1, op2)
 
#define vsra_vi_i32m1(op1, op2)
 
#define vsra_vi_i32m2(op1, op2)
 
#define vsra_vi_i32m4(op1, op2)
 
#define vsra_vi_i32m8(op1, op2)
 
#define vsll_vi_i8m1_m(mask, op1, op2)
 
#define vsll_vi_i8m2_m(mask, op1, op2)
 
#define vsll_vi_i8m4_m(mask, op1, op2)
 
#define vsll_vi_i8m8_m(mask, op1, op2)
 
#define vsll_vi_i16m1_m(mask, op1, op2)
 
#define vsll_vi_i16m2_m(mask, op1, op2)
 
#define vsll_vi_i16m4_m(mask, op1, op2)
 
#define vsll_vi_i16m8_m(mask, op1, op2)
 
#define vsll_vi_i32m1_m(mask, op1, op2)
 
#define vsll_vi_i32m2_m(mask, op1, op2)
 
#define vsll_vi_i32m4_m(mask, op1, op2)
 
#define vsll_vi_i32m8_m(mask, op1, op2)
 
#define vsll_vi_u8m1_m(mask, op1, op2)
 
#define vsll_vi_u8m2_m(mask, op1, op2)
 
#define vsll_vi_u8m4_m(mask, op1, op2)
 
#define vsll_vi_u8m8_m(mask, op1, op2)
 
#define vsll_vi_u16m1_m(mask, op1, op2)
 
#define vsll_vi_u16m2_m(mask, op1, op2)
 
#define vsll_vi_u16m4_m(mask, op1, op2)
 
#define vsll_vi_u16m8_m(mask, op1, op2)
 
#define vsll_vi_u32m1_m(mask, op1, op2)
 
#define vsll_vi_u32m2_m(mask, op1, op2)
 
#define vsll_vi_u32m4_m(mask, op1, op2)
 
#define vsll_vi_u32m8_m(mask, op1, op2)
 
#define vsrl_vi_u8m1_m(mask, op1, op2)
 
#define vsrl_vi_u8m2_m(mask, op1, op2)
 
#define vsrl_vi_u8m4_m(mask, op1, op2)
 
#define vsrl_vi_u8m8_m(mask, op1, op2)
 
#define vsrl_vi_u16m1_m(mask, op1, op2)
 
#define vsrl_vi_u16m2_m(mask, op1, op2)
 
#define vsrl_vi_u16m4_m(mask, op1, op2)
 
#define vsrl_vi_u16m8_m(mask, op1, op2)
 
#define vsrl_vi_u32m1_m(mask, op1, op2)
 
#define vsrl_vi_u32m2_m(mask, op1, op2)
 
#define vsrl_vi_u32m4_m(mask, op1, op2)
 
#define vsrl_vi_u32m8_m(mask, op1, op2)
 
#define vsra_vi_i8m1_m(mask, op1, op2)
 
#define vsra_vi_i8m2_m(mask, op1, op2)
 
#define vsra_vi_i8m4_m(mask, op1, op2)
 
#define vsra_vi_i8m8_m(mask, op1, op2)
 
#define vsra_vi_i16m1_m(mask, op1, op2)
 
#define vsra_vi_i16m2_m(mask, op1, op2)
 
#define vsra_vi_i16m4_m(mask, op1, op2)
 
#define vsra_vi_i16m8_m(mask, op1, op2)
 
#define vsra_vi_i32m1_m(mask, op1, op2)
 
#define vsra_vi_i32m2_m(mask, op1, op2)
 
#define vsra_vi_i32m4_m(mask, op1, op2)
 
#define vsra_vi_i32m8_m(mask, op1, op2)
 
#define vnsrl_wi_u8m1(op1, op2)
 
#define vnsrl_wi_u8m2(op1, op2)
 
#define vnsrl_wi_u8m4(op1, op2)
 
#define vnsrl_wi_u16m1(op1, op2)
 
#define vnsrl_wi_u16m2(op1, op2)
 
#define vnsrl_wi_u16m4(op1, op2)
 
#define vnsra_wi_i8m1(op1, op2)
 
#define vnsra_wi_i8m2(op1, op2)
 
#define vnsra_wi_i8m4(op1, op2)
 
#define vnsra_wi_i16m1(op1, op2)
 
#define vnsra_wi_i16m2(op1, op2)
 
#define vnsra_wi_i16m4(op1, op2)
 
#define vnsrl_wi_u8m1_m(mask, op1, op2)
 
#define vnsrl_wi_u8m2_m(mask, op1, op2)
 
#define vnsrl_wi_u8m4_m(mask, op1, op2)
 
#define vnsrl_wi_u16m1_m(mask, op1, op2)
 
#define vnsrl_wi_u16m2_m(mask, op1, op2)
 
#define vnsrl_wi_u16m4_m(mask, op1, op2)
 
#define vnsra_wi_i8m1_m(mask, op1, op2)
 
#define vnsra_wi_i8m2_m(mask, op1, op2)
 
#define vnsra_wi_i8m4_m(mask, op1, op2)
 
#define vnsra_wi_i16m1_m(mask, op1, op2)
 
#define vnsra_wi_i16m2_m(mask, op1, op2)
 
#define vnsra_wi_i16m4_m(mask, op1, op2)
 
#define vmseq_vi_i8m1(op1, op2)
 
#define vmseq_vi_i8m2(op1, op2)
 
#define vmseq_vi_i8m4(op1, op2)
 
#define vmseq_vi_i8m8(op1, op2)
 
#define vmseq_vi_i16m1(op1, op2)
 
#define vmseq_vi_i16m2(op1, op2)
 
#define vmseq_vi_i16m4(op1, op2)
 
#define vmseq_vi_i16m8(op1, op2)
 
#define vmseq_vi_i32m1(op1, op2)
 
#define vmseq_vi_i32m2(op1, op2)
 
#define vmseq_vi_i32m4(op1, op2)
 
#define vmseq_vi_i32m8(op1, op2)
 
#define vmsne_vi_i8m1(op1, op2)
 
#define vmsne_vi_i8m2(op1, op2)
 
#define vmsne_vi_i8m4(op1, op2)
 
#define vmsne_vi_i8m8(op1, op2)
 
#define vmsne_vi_i16m1(op1, op2)
 
#define vmsne_vi_i16m2(op1, op2)
 
#define vmsne_vi_i16m4(op1, op2)
 
#define vmsne_vi_i16m8(op1, op2)
 
#define vmsne_vi_i32m1(op1, op2)
 
#define vmsne_vi_i32m2(op1, op2)
 
#define vmsne_vi_i32m4(op1, op2)
 
#define vmsne_vi_i32m8(op1, op2)
 
#define vmsleu_vi_u8m1(op1, op2)
 
#define vmsleu_vi_u8m2(op1, op2)
 
#define vmsleu_vi_u8m4(op1, op2)
 
#define vmsleu_vi_u8m8(op1, op2)
 
#define vmsleu_vi_u16m1(op1, op2)
 
#define vmsleu_vi_u16m2(op1, op2)
 
#define vmsleu_vi_u16m4(op1, op2)
 
#define vmsleu_vi_u16m8(op1, op2)
 
#define vmsleu_vi_u32m1(op1, op2)
 
#define vmsleu_vi_u32m2(op1, op2)
 
#define vmsleu_vi_u32m4(op1, op2)
 
#define vmsleu_vi_u32m8(op1, op2)
 
#define vmsle_vi_i8m1(op1, op2)
 
#define vmsle_vi_i8m2(op1, op2)
 
#define vmsle_vi_i8m4(op1, op2)
 
#define vmsle_vi_i8m8(op1, op2)
 
#define vmsle_vi_i16m1(op1, op2)
 
#define vmsle_vi_i16m2(op1, op2)
 
#define vmsle_vi_i16m4(op1, op2)
 
#define vmsle_vi_i16m8(op1, op2)
 
#define vmsle_vi_i32m1(op1, op2)
 
#define vmsle_vi_i32m2(op1, op2)
 
#define vmsle_vi_i32m4(op1, op2)
 
#define vmsle_vi_i32m8(op1, op2)
 
#define vmsgtu_vi_u8m1(op1, op2)
 
#define vmsgtu_vi_u8m2(op1, op2)
 
#define vmsgtu_vi_u8m4(op1, op2)
 
#define vmsgtu_vi_u8m8(op1, op2)
 
#define vmsgtu_vi_u16m1(op1, op2)
 
#define vmsgtu_vi_u16m2(op1, op2)
 
#define vmsgtu_vi_u16m4(op1, op2)
 
#define vmsgtu_vi_u16m8(op1, op2)
 
#define vmsgtu_vi_u32m1(op1, op2)
 
#define vmsgtu_vi_u32m2(op1, op2)
 
#define vmsgtu_vi_u32m4(op1, op2)
 
#define vmsgtu_vi_u32m8(op1, op2)
 
#define vmsgt_vi_i8m1(op1, op2)
 
#define vmsgt_vi_i8m2(op1, op2)
 
#define vmsgt_vi_i8m4(op1, op2)
 
#define vmsgt_vi_i8m8(op1, op2)
 
#define vmsgt_vi_i16m1(op1, op2)
 
#define vmsgt_vi_i16m2(op1, op2)
 
#define vmsgt_vi_i16m4(op1, op2)
 
#define vmsgt_vi_i16m8(op1, op2)
 
#define vmsgt_vi_i32m1(op1, op2)
 
#define vmsgt_vi_i32m2(op1, op2)
 
#define vmsgt_vi_i32m4(op1, op2)
 
#define vmsgt_vi_i32m8(op1, op2)
 
#define vmseq_vi_i8m1_m(mask, op1, op2)
 
#define vmseq_vi_i8m2_m(mask, op1, op2)
 
#define vmseq_vi_i8m4_m(mask, op1, op2)
 
#define vmseq_vi_i8m8_m(mask, op1, op2)
 
#define vmseq_vi_i16m1_m(mask, op1, op2)
 
#define vmseq_vi_i16m2_m(mask, op1, op2)
 
#define vmseq_vi_i16m4_m(mask, op1, op2)
 
#define vmseq_vi_i16m8_m(mask, op1, op2)
 
#define vmseq_vi_i32m1_m(mask, op1, op2)
 
#define vmseq_vi_i32m2_m(mask, op1, op2)
 
#define vmseq_vi_i32m4_m(mask, op1, op2)
 
#define vmseq_vi_i32m8_m(mask, op1, op2)
 
#define vmsne_vi_i8m1_m(mask, op1, op2)
 
#define vmsne_vi_i8m2_m(mask, op1, op2)
 
#define vmsne_vi_i8m4_m(mask, op1, op2)
 
#define vmsne_vi_i8m8_m(mask, op1, op2)
 
#define vmsne_vi_i16m1_m(mask, op1, op2)
 
#define vmsne_vi_i16m2_m(mask, op1, op2)
 
#define vmsne_vi_i16m4_m(mask, op1, op2)
 
#define vmsne_vi_i16m8_m(mask, op1, op2)
 
#define vmsne_vi_i32m1_m(mask, op1, op2)
 
#define vmsne_vi_i32m2_m(mask, op1, op2)
 
#define vmsne_vi_i32m4_m(mask, op1, op2)
 
#define vmsne_vi_i32m8_m(mask, op1, op2)
 
#define vmsleu_vi_u8m1_m(mask, op1, op2)
 
#define vmsleu_vi_u8m2_m(mask, op1, op2)
 
#define vmsleu_vi_u8m4_m(mask, op1, op2)
 
#define vmsleu_vi_u8m8_m(mask, op1, op2)
 
#define vmsleu_vi_u16m1_m(mask, op1, op2)
 
#define vmsleu_vi_u16m2_m(mask, op1, op2)
 
#define vmsleu_vi_u16m4_m(mask, op1, op2)
 
#define vmsleu_vi_u16m8_m(mask, op1, op2)
 
#define vmsleu_vi_u32m1_m(mask, op1, op2)
 
#define vmsleu_vi_u32m2_m(mask, op1, op2)
 
#define vmsleu_vi_u32m4_m(mask, op1, op2)
 
#define vmsleu_vi_u32m8_m(mask, op1, op2)
 
#define vmsle_vi_i8m1_m(mask, op1, op2)
 
#define vmsle_vi_i8m2_m(mask, op1, op2)
 
#define vmsle_vi_i8m4_m(mask, op1, op2)
 
#define vmsle_vi_i8m8_m(mask, op1, op2)
 
#define vmsle_vi_i16m1_m(mask, op1, op2)
 
#define vmsle_vi_i16m2_m(mask, op1, op2)
 
#define vmsle_vi_i16m4_m(mask, op1, op2)
 
#define vmsle_vi_i16m8_m(mask, op1, op2)
 
#define vmsle_vi_i32m1_m(mask, op1, op2)
 
#define vmsle_vi_i32m2_m(mask, op1, op2)
 
#define vmsle_vi_i32m4_m(mask, op1, op2)
 
#define vmsle_vi_i32m8_m(mask, op1, op2)
 
#define vmsgtu_vi_u8m1_m(mask, op1, op2)
 
#define vmsgtu_vi_u8m2_m(mask, op1, op2)
 
#define vmsgtu_vi_u8m4_m(mask, op1, op2)
 
#define vmsgtu_vi_u8m8_m(mask, op1, op2)
 
#define vmsgtu_vi_u16m1_m(mask, op1, op2)
 
#define vmsgtu_vi_u16m2_m(mask, op1, op2)
 
#define vmsgtu_vi_u16m4_m(mask, op1, op2)
 
#define vmsgtu_vi_u16m8_m(mask, op1, op2)
 
#define vmsgtu_vi_u32m1_m(mask, op1, op2)
 
#define vmsgtu_vi_u32m2_m(mask, op1, op2)
 
#define vmsgtu_vi_u32m4_m(mask, op1, op2)
 
#define vmsgtu_vi_u32m8_m(mask, op1, op2)
 
#define vmsgt_vi_i8m1_m(mask, op1, op2)
 
#define vmsgt_vi_i8m2_m(mask, op1, op2)
 
#define vmsgt_vi_i8m4_m(mask, op1, op2)
 
#define vmsgt_vi_i8m8_m(mask, op1, op2)
 
#define vmsgt_vi_i16m1_m(mask, op1, op2)
 
#define vmsgt_vi_i16m2_m(mask, op1, op2)
 
#define vmsgt_vi_i16m4_m(mask, op1, op2)
 
#define vmsgt_vi_i16m8_m(mask, op1, op2)
 
#define vmsgt_vi_i32m1_m(mask, op1, op2)
 
#define vmsgt_vi_i32m2_m(mask, op1, op2)
 
#define vmsgt_vi_i32m4_m(mask, op1, op2)
 
#define vmsgt_vi_i32m8_m(mask, op1, op2)
 
#define vmerge_vim_i8m1_m(mask, op1, op2)
 
#define vmerge_vim_i8m2_m(mask, op1, op2)
 
#define vmerge_vim_i8m4_m(mask, op1, op2)
 
#define vmerge_vim_i8m8_m(mask, op1, op2)
 
#define vmerge_vim_i16m1_m(mask, op1, op2)
 
#define vmerge_vim_i16m2_m(mask, op1, op2)
 
#define vmerge_vim_i16m4_m(mask, op1, op2)
 
#define vmerge_vim_i16m8_m(mask, op1, op2)
 
#define vmerge_vim_i32m1_m(mask, op1, op2)
 
#define vmerge_vim_i32m2_m(mask, op1, op2)
 
#define vmerge_vim_i32m4_m(mask, op1, op2)
 
#define vmerge_vim_i32m8_m(mask, op1, op2)
 
#define vmv_v_i_i8m1(src)
 
#define vmv_v_i_i8m2(src)
 
#define vmv_v_i_i8m4(src)
 
#define vmv_v_i_i8m8(src)
 
#define vmv_v_i_i16m1(src)
 
#define vmv_v_i_i16m2(src)
 
#define vmv_v_i_i16m4(src)
 
#define vmv_v_i_i16m8(src)
 
#define vmv_v_i_i32m1(src)
 
#define vmv_v_i_i32m2(src)
 
#define vmv_v_i_i32m4(src)
 
#define vmv_v_i_i32m8(src)
 
#define vmv_v_i_u8m1(src)
 
#define vmv_v_i_u8m2(src)
 
#define vmv_v_i_u8m4(src)
 
#define vmv_v_i_u8m8(src)
 
#define vmv_v_i_u16m1(src)
 
#define vmv_v_i_u16m2(src)
 
#define vmv_v_i_u16m4(src)
 
#define vmv_v_i_u16m8(src)
 
#define vmv_v_i_u32m1(src)
 
#define vmv_v_i_u32m2(src)
 
#define vmv_v_i_u32m4(src)
 
#define vmv_v_i_u32m8(src)
 
#define vsaddu_vi_u8m1(op1, op2)
 
#define vsaddu_vi_u8m2(op1, op2)
 
#define vsaddu_vi_u8m4(op1, op2)
 
#define vsaddu_vi_u8m8(op1, op2)
 
#define vsaddu_vi_u16m1(op1, op2)
 
#define vsaddu_vi_u16m2(op1, op2)
 
#define vsaddu_vi_u16m4(op1, op2)
 
#define vsaddu_vi_u16m8(op1, op2)
 
#define vsaddu_vi_u32m1(op1, op2)
 
#define vsaddu_vi_u32m2(op1, op2)
 
#define vsaddu_vi_u32m4(op1, op2)
 
#define vsaddu_vi_u32m8(op1, op2)
 
#define vsadd_vi_i8m1(op1, op2)
 
#define vsadd_vi_i8m2(op1, op2)
 
#define vsadd_vi_i8m4(op1, op2)
 
#define vsadd_vi_i8m8(op1, op2)
 
#define vsadd_vi_i16m1(op1, op2)
 
#define vsadd_vi_i16m2(op1, op2)
 
#define vsadd_vi_i16m4(op1, op2)
 
#define vsadd_vi_i16m8(op1, op2)
 
#define vsadd_vi_i32m1(op1, op2)
 
#define vsadd_vi_i32m2(op1, op2)
 
#define vsadd_vi_i32m4(op1, op2)
 
#define vsadd_vi_i32m8(op1, op2)
 
#define vsaddu_vi_u8m1_m(mask, op1, op2)
 
#define vsaddu_vi_u8m2_m(mask, op1, op2)
 
#define vsaddu_vi_u8m4_m(mask, op1, op2)
 
#define vsaddu_vi_u8m8_m(mask, op1, op2)
 
#define vsaddu_vi_u16m1_m(mask, op1, op2)
 
#define vsaddu_vi_u16m2_m(mask, op1, op2)
 
#define vsaddu_vi_u16m4_m(mask, op1, op2)
 
#define vsaddu_vi_u16m8_m(mask, op1, op2)
 
#define vsaddu_vi_u32m1_m(mask, op1, op2)
 
#define vsaddu_vi_u32m2_m(mask, op1, op2)
 
#define vsaddu_vi_u32m4_m(mask, op1, op2)
 
#define vsaddu_vi_u32m8_m(mask, op1, op2)
 
#define vsadd_vi_i8m1_m(mask, op1, op2)
 
#define vsadd_vi_i8m2_m(mask, op1, op2)
 
#define vsadd_vi_i8m4_m(mask, op1, op2)
 
#define vsadd_vi_i8m8_m(mask, op1, op2)
 
#define vsadd_vi_i16m1_m(mask, op1, op2)
 
#define vsadd_vi_i16m2_m(mask, op1, op2)
 
#define vsadd_vi_i16m4_m(mask, op1, op2)
 
#define vsadd_vi_i16m8_m(mask, op1, op2)
 
#define vsadd_vi_i32m1_m(mask, op1, op2)
 
#define vsadd_vi_i32m2_m(mask, op1, op2)
 
#define vsadd_vi_i32m4_m(mask, op1, op2)
 
#define vsadd_vi_i32m8_m(mask, op1, op2)
 
#define vssrl_vi_u8m1(op1, op2)
 
#define vssrl_vi_u8m2(op1, op2)
 
#define vssrl_vi_u8m4(op1, op2)
 
#define vssrl_vi_u8m8(op1, op2)
 
#define vssrl_vi_u16m1(op1, op2)
 
#define vssrl_vi_u16m2(op1, op2)
 
#define vssrl_vi_u16m4(op1, op2)
 
#define vssrl_vi_u16m8(op1, op2)
 
#define vssrl_vi_u32m1(op1, op2)
 
#define vssrl_vi_u32m2(op1, op2)
 
#define vssrl_vi_u32m4(op1, op2)
 
#define vssrl_vi_u32m8(op1, op2)
 
#define vssra_vi_i8m1(op1, op2)
 
#define vssra_vi_i8m2(op1, op2)
 
#define vssra_vi_i8m4(op1, op2)
 
#define vssra_vi_i8m8(op1, op2)
 
#define vssra_vi_i16m1(op1, op2)
 
#define vssra_vi_i16m2(op1, op2)
 
#define vssra_vi_i16m4(op1, op2)
 
#define vssra_vi_i16m8(op1, op2)
 
#define vssra_vi_i32m1(op1, op2)
 
#define vssra_vi_i32m2(op1, op2)
 
#define vssra_vi_i32m4(op1, op2)
 
#define vssra_vi_i32m8(op1, op2)
 
#define vssrl_vi_u8m1_m(mask, op1, op2)
 
#define vssrl_vi_u8m2_m(mask, op1, op2)
 
#define vssrl_vi_u8m4_m(mask, op1, op2)
 
#define vssrl_vi_u8m8_m(mask, op1, op2)
 
#define vssrl_vi_u16m1_m(mask, op1, op2)
 
#define vssrl_vi_u16m2_m(mask, op1, op2)
 
#define vssrl_vi_u16m4_m(mask, op1, op2)
 
#define vssrl_vi_u16m8_m(mask, op1, op2)
 
#define vssrl_vi_u32m1_m(mask, op1, op2)
 
#define vssrl_vi_u32m2_m(mask, op1, op2)
 
#define vssrl_vi_u32m4_m(mask, op1, op2)
 
#define vssrl_vi_u32m8_m(mask, op1, op2)
 
#define vssra_vi_i8m1_m(mask, op1, op2)
 
#define vssra_vi_i8m2_m(mask, op1, op2)
 
#define vssra_vi_i8m4_m(mask, op1, op2)
 
#define vssra_vi_i8m8_m(mask, op1, op2)
 
#define vssra_vi_i16m1_m(mask, op1, op2)
 
#define vssra_vi_i16m2_m(mask, op1, op2)
 
#define vssra_vi_i16m4_m(mask, op1, op2)
 
#define vssra_vi_i16m8_m(mask, op1, op2)
 
#define vssra_vi_i32m1_m(mask, op1, op2)
 
#define vssra_vi_i32m2_m(mask, op1, op2)
 
#define vssra_vi_i32m4_m(mask, op1, op2)
 
#define vssra_vi_i32m8_m(mask, op1, op2)
 
#define vnclipu_wi_u8m1(op1, op2)
 
#define vnclipu_wi_u8m2(op1, op2)
 
#define vnclipu_wi_u8m4(op1, op2)
 
#define vnclipu_wi_u16m1(op1, op2)
 
#define vnclipu_wi_u16m2(op1, op2)
 
#define vnclipu_wi_u16m4(op1, op2)
 
#define vnclip_wi_i8m1(op1, op2)
 
#define vnclip_wi_i8m2(op1, op2)
 
#define vnclip_wi_i8m4(op1, op2)
 
#define vnclip_wi_i16m1(op1, op2)
 
#define vnclip_wi_i16m2(op1, op2)
 
#define vnclip_wi_i16m4(op1, op2)
 
#define vnclipu_wi_u8m1_m(mask, op1, op2)
 
#define vnclipu_wi_u8m2_m(mask, op1, op2)
 
#define vnclipu_wi_u8m4_m(mask, op1, op2)
 
#define vnclipu_wi_u16m1_m(mask, op1, op2)
 
#define vnclipu_wi_u16m2_m(mask, op1, op2)
 
#define vnclipu_wi_u16m4_m(mask, op1, op2)
 
#define vnclip_wi_i8m1_m(mask, op1, op2)
 
#define vnclip_wi_i8m2_m(mask, op1, op2)
 
#define vnclip_wi_i8m4_m(mask, op1, op2)
 
#define vnclip_wi_i16m1_m(mask, op1, op2)
 
#define vnclip_wi_i16m2_m(mask, op1, op2)
 
#define vnclip_wi_i16m4_m(mask, op1, op2)
 
#define vslideup_vi_i8m1(op1, offset)
 
#define vslideup_vi_i8m2(op1, offset)
 
#define vslideup_vi_i8m4(op1, offset)
 
#define vslideup_vi_i8m8(op1, offset)
 
#define vslideup_vi_i16m1(op1, offset)
 
#define vslideup_vi_i16m2(op1, offset)
 
#define vslideup_vi_i16m4(op1, offset)
 
#define vslideup_vi_i16m8(op1, offset)
 
#define vslideup_vi_i32m1(op1, offset)
 
#define vslideup_vi_i32m2(op1, offset)
 
#define vslideup_vi_i32m4(op1, offset)
 
#define vslideup_vi_i32m8(op1, offset)
 
#define vslideup_vi_f32m1(op1, offset)
 
#define vslideup_vi_f32m2(op1, offset)
 
#define vslideup_vi_f32m4(op1, offset)
 
#define vslideup_vi_f32m8(op1, offset)
 
#define vslideup_vi_i8m1_m(mask, op1, offset)
 
#define vslideup_vi_i8m2_m(mask, op1, offset)
 
#define vslideup_vi_i8m4_m(mask, op1, offset)
 
#define vslideup_vi_i8m8_m(mask, op1, offset)
 
#define vslideup_vi_i16m1_m(mask, op1, offset)
 
#define vslideup_vi_i16m2_m(mask, op1, offset)
 
#define vslideup_vi_i16m4_m(mask, op1, offset)
 
#define vslideup_vi_i16m8_m(mask, op1, offset)
 
#define vslideup_vi_i32m1_m(mask, op1, offset)
 
#define vslideup_vi_i32m2_m(mask, op1, offset)
 
#define vslideup_vi_i32m4_m(mask, op1, offset)
 
#define vslideup_vi_i32m8_m(mask, op1, offset)
 
#define vslideup_vi_f32m1_m(mask, op1, offset)
 
#define vslideup_vi_f32m2_m(mask, op1, offset)
 
#define vslideup_vi_f32m4_m(mask, op1, offset)
 
#define vslideup_vi_f32m8_m(mask, op1, offset)
 
#define vslidedown_vi_i8m1(op1, offset)
 
#define vslidedown_vi_i8m2(op1, offset)
 
#define vslidedown_vi_i8m4(op1, offset)
 
#define vslidedown_vi_i8m8(op1, offset)
 
#define vslidedown_vi_i16m1(op1, offset)
 
#define vslidedown_vi_i16m2(op1, offset)
 
#define vslidedown_vi_i16m4(op1, offset)
 
#define vslidedown_vi_i16m8(op1, offset)
 
#define vslidedown_vi_i32m1(op1, offset)
 
#define vslidedown_vi_i32m2(op1, offset)
 
#define vslidedown_vi_i32m4(op1, offset)
 
#define vslidedown_vi_i32m8(op1, offset)
 
#define vslidedown_vi_f32m1(op1, offset)
 
#define vslidedown_vi_f32m2(op1, offset)
 
#define vslidedown_vi_f32m4(op1, offset)
 
#define vslidedown_vi_f32m8(op1, offset)
 
#define vslidedown_vi_i8m1_m(mask, op1, offset)
 
#define vslidedown_vi_i8m2_m(mask, op1, offset)
 
#define vslidedown_vi_i8m4_m(mask, op1, offset)
 
#define vslidedown_vi_i8m8_m(mask, op1, offset)
 
#define vslidedown_vi_i16m1_m(mask, op1, offset)
 
#define vslidedown_vi_i16m2_m(mask, op1, offset)
 
#define vslidedown_vi_i16m4_m(mask, op1, offset)
 
#define vslidedown_vi_i16m8_m(mask, op1, offset)
 
#define vslidedown_vi_i32m1_m(mask, op1, offset)
 
#define vslidedown_vi_i32m2_m(mask, op1, offset)
 
#define vslidedown_vi_i32m4_m(mask, op1, offset)
 
#define vslidedown_vi_i32m8_m(mask, op1, offset)
 
#define vslidedown_vi_f32m1_m(mask, op1, offset)
 
#define vslidedown_vi_f32m2_m(mask, op1, offset)
 
#define vslidedown_vi_f32m4_m(mask, op1, offset)
 
#define vslidedown_vi_f32m8_m(mask, op1, offset)
 
#define vrgather_vi_i8m1(op1, op2)
 
#define vrgather_vi_i8m2(op1, op2)
 
#define vrgather_vi_i8m4(op1, op2)
 
#define vrgather_vi_i8m8(op1, op2)
 
#define vrgather_vi_i16m1(op1, op2)
 
#define vrgather_vi_i16m2(op1, op2)
 
#define vrgather_vi_i16m4(op1, op2)
 
#define vrgather_vi_i16m8(op1, op2)
 
#define vrgather_vi_i32m1(op1, op2)
 
#define vrgather_vi_i32m2(op1, op2)
 
#define vrgather_vi_i32m4(op1, op2)
 
#define vrgather_vi_i32m8(op1, op2)
 
#define vrgather_vi_f32m1(op1, op2)
 
#define vrgather_vi_f32m2(op1, op2)
 
#define vrgather_vi_f32m4(op1, op2)
 
#define vrgather_vi_f32m8(op1, op2)
 
#define vrgather_vi_i8m1_m(mask, op1, op2)
 
#define vrgather_vi_i8m2_m(mask, op1, op2)
 
#define vrgather_vi_i8m4_m(mask, op1, op2)
 
#define vrgather_vi_i8m8_m(mask, op1, op2)
 
#define vrgather_vi_i16m1_m(mask, op1, op2)
 
#define vrgather_vi_i16m2_m(mask, op1, op2)
 
#define vrgather_vi_i16m4_m(mask, op1, op2)
 
#define vrgather_vi_i16m8_m(mask, op1, op2)
 
#define vrgather_vi_i32m1_m(mask, op1, op2)
 
#define vrgather_vi_i32m2_m(mask, op1, op2)
 
#define vrgather_vi_i32m4_m(mask, op1, op2)
 
#define vrgather_vi_i32m8_m(mask, op1, op2)
 
#define vrgather_vi_f32m1_m(mask, op1, op2)
 
#define vrgather_vi_f32m2_m(mask, op1, op2)
 
#define vrgather_vi_f32m4_m(mask, op1, op2)
 
#define vrgather_vi_f32m8_m(mask, op1, op2)
 

类型定义

typedef signed char int8_t
 
typedef unsigned char uint8_t
 
typedef short int16_t
 
typedef unsigned short uint16_t
 
typedef int int32_t
 
typedef unsigned int uint32_t
 
typedef float float32_t
 

枚举

enum  RISCV_VSEW_T {
  RVV_E8 = 0, RVV_E16, RVV_E32, RVV_E64,
  RVV_E128, RVV_E256, RVV_E512, RVV_E1024
}
 
enum  RISCV_VLMUL_T { RVV_M1 = 0, RVV_M2, RVV_M4, RVV_M8 }
 
enum  RISCV_VEDIV_T { RVV_D1 = 0, RVV_D2, RVV_D4, RVV_D8 }
 

函数

typedef __attribute__ ((riscv_vector_type(16))) int8_t vint8m1_t
 
typedef __attribute__ ((riscv_vector_type(8))) int16_t vint16m1_t
 
typedef __attribute__ ((riscv_vector_type(4))) int32_t vint32m1_t
 
typedef __attribute__ ((riscv_vector_type(32))) int8_t vint8m2_t
 
typedef __attribute__ ((riscv_vector_type(64))) int8_t vint8m4_t
 
typedef __attribute__ ((riscv_vector_type(128))) int8_t vint8m8_t
 
__rv32 uint32_t vsetvl (uint32_t avl, uint32_t vtypei)
 
__rv32 vint8m1_t vle_v_i8m1 (const int8_t *base)
 
__rv32 vint8m2_t vle_v_i8m2 (const int8_t *base)
 
__rv32 vint8m4_t vle_v_i8m4 (const int8_t *base)
 
__rv32 vint8m8_t vle_v_i8m8 (const int8_t *base)
 
__rv32 vint16m1_t vle_v_i16m1 (const int16_t *base)
 
__rv32 vint16m2_t vle_v_i16m2 (const int16_t *base)
 
__rv32 vint16m4_t vle_v_i16m4 (const int16_t *base)
 
__rv32 vint16m8_t vle_v_i16m8 (const int16_t *base)
 
__rv32 vint32m1_t vle_v_i32m1 (const int32_t *base)
 
__rv32 vint32m2_t vle_v_i32m2 (const int32_t *base)
 
__rv32 vint32m4_t vle_v_i32m4 (const int32_t *base)
 
__rv32 vint32m8_t vle_v_i32m8 (const int32_t *base)
 
__rv32 vuint8m1_t vle_v_u8m1 (const uint8_t *base)
 
__rv32 vuint8m2_t vle_v_u8m2 (const uint8_t *base)
 
__rv32 vuint8m4_t vle_v_u8m4 (const uint8_t *base)
 
__rv32 vuint8m8_t vle_v_u8m8 (const uint8_t *base)
 
__rv32 vuint16m1_t vle_v_u16m1 (const uint16_t *base)
 
__rv32 vuint16m2_t vle_v_u16m2 (const uint16_t *base)
 
__rv32 vuint16m4_t vle_v_u16m4 (const uint16_t *base)
 
__rv32 vuint16m8_t vle_v_u16m8 (const uint16_t *base)
 
__rv32 vuint32m1_t vle_v_u32m1 (const uint32_t *base)
 
__rv32 vuint32m2_t vle_v_u32m2 (const uint32_t *base)
 
__rv32 vuint32m4_t vle_v_u32m4 (const uint32_t *base)
 
__rv32 vuint32m8_t vle_v_u32m8 (const uint32_t *base)
 
__rv32 vfloat32m1_t vle_v_f32m1 (const float32_t *base)
 
__rv32 vfloat32m2_t vle_v_f32m2 (const float32_t *base)
 
__rv32 vfloat32m4_t vle_v_f32m4 (const float32_t *base)
 
__rv32 vfloat32m8_t vle_v_f32m8 (const float32_t *base)
 
__rv32 vint8m1_t vle_v_i8m1_m (vmask_t mask, const int8_t *base)
 
__rv32 vint8m2_t vle_v_i8m2_m (vmask_t mask, const int8_t *base)
 
__rv32 vint8m4_t vle_v_i8m4_m (vmask_t mask, const int8_t *base)
 
__rv32 vint8m8_t vle_v_i8m8_m (vmask_t mask, const int8_t *base)
 
__rv32 vint16m1_t vle_v_i16m1_m (vmask_t mask, const int16_t *base)
 
__rv32 vint16m2_t vle_v_i16m2_m (vmask_t mask, const int16_t *base)
 
__rv32 vint16m4_t vle_v_i16m4_m (vmask_t mask, const int16_t *base)
 
__rv32 vint16m8_t vle_v_i16m8_m (vmask_t mask, const int16_t *base)
 
__rv32 vint32m1_t vle_v_i32m1_m (vmask_t mask, const int32_t *base)
 
__rv32 vint32m2_t vle_v_i32m2_m (vmask_t mask, const int32_t *base)
 
__rv32 vint32m4_t vle_v_i32m4_m (vmask_t mask, const int32_t *base)
 
__rv32 vint32m8_t vle_v_i32m8_m (vmask_t mask, const int32_t *base)
 
__rv32 vuint8m1_t vle_v_u8m1_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint8m2_t vle_v_u8m2_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint8m4_t vle_v_u8m4_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint8m8_t vle_v_u8m8_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint16m1_t vle_v_u16m1_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint16m2_t vle_v_u16m2_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint16m4_t vle_v_u16m4_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint16m8_t vle_v_u16m8_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint32m1_t vle_v_u32m1_m (vmask_t mask, const uint32_t *base)
 
__rv32 vuint32m2_t vle_v_u32m2_m (vmask_t mask, const uint32_t *base)
 
__rv32 vuint32m4_t vle_v_u32m4_m (vmask_t mask, const uint32_t *base)
 
__rv32 vuint32m8_t vle_v_u32m8_m (vmask_t mask, const uint32_t *base)
 
__rv32 vfloat32m1_t vle_v_f32m1_m (vmask_t mask, const float32_t *base)
 
__rv32 vfloat32m2_t vle_v_f32m2_m (vmask_t mask, const float32_t *base)
 
__rv32 vfloat32m4_t vle_v_f32m4_m (vmask_t mask, const float32_t *base)
 
__rv32 vfloat32m8_t vle_v_f32m8_m (vmask_t mask, const float32_t *base)
 
__rv32 void vse_v_i8m1 (vint8m1_t value, int8_t *base)
 
__rv32 void vse_v_i8m2 (vint8m2_t value, int8_t *base)
 
__rv32 void vse_v_i8m4 (vint8m4_t value, int8_t *base)
 
__rv32 void vse_v_i8m8 (vint8m8_t value, int8_t *base)
 
__rv32 void vse_v_i16m1 (vint16m1_t value, int16_t *base)
 
__rv32 void vse_v_i16m2 (vint16m2_t value, int16_t *base)
 
__rv32 void vse_v_i16m4 (vint16m4_t value, int16_t *base)
 
__rv32 void vse_v_i16m8 (vint16m8_t value, int16_t *base)
 
__rv32 void vse_v_i32m1 (vint32m1_t value, int32_t *base)
 
__rv32 void vse_v_i32m2 (vint32m2_t value, int32_t *base)
 
__rv32 void vse_v_i32m4 (vint32m4_t value, int32_t *base)
 
__rv32 void vse_v_i32m8 (vint32m8_t value, int32_t *base)
 
__rv32 void vse_v_u8m1 (vuint8m1_t value, uint8_t *base)
 
__rv32 void vse_v_u8m2 (vuint8m2_t value, uint8_t *base)
 
__rv32 void vse_v_u8m4 (vuint8m4_t value, uint8_t *base)
 
__rv32 void vse_v_u8m8 (vuint8m8_t value, uint8_t *base)
 
__rv32 void vse_v_u16m1 (vuint16m1_t value, uint16_t *base)
 
__rv32 void vse_v_u16m2 (vuint16m2_t value, uint16_t *base)
 
__rv32 void vse_v_u16m4 (vuint16m4_t value, uint16_t *base)
 
__rv32 void vse_v_u16m8 (vuint16m8_t value, uint16_t *base)
 
__rv32 void vse_v_u32m1 (vuint32m1_t value, uint32_t *base)
 
__rv32 void vse_v_u32m2 (vuint32m2_t value, uint32_t *base)
 
__rv32 void vse_v_u32m4 (vuint32m4_t value, uint32_t *base)
 
__rv32 void vse_v_u32m8 (vuint32m8_t value, uint32_t *base)
 
__rv32 void vse_v_f32m1 (vfloat32m1_t value, float32_t *base)
 
__rv32 void vse_v_f32m2 (vfloat32m2_t value, float32_t *base)
 
__rv32 void vse_v_f32m4 (vfloat32m4_t value, float32_t *base)
 
__rv32 void vse_v_f32m8 (vfloat32m8_t value, float32_t *base)
 
__rv32 void vse_v_i8m1_m (vmask_t mask, vint8m1_t value, int8_t *base)
 
__rv32 void vse_v_i8m2_m (vmask_t mask, vint8m2_t value, int8_t *base)
 
__rv32 void vse_v_i8m4_m (vmask_t mask, vint8m4_t value, int8_t *base)
 
__rv32 void vse_v_i8m8_m (vmask_t mask, vint8m8_t value, int8_t *base)
 
__rv32 void vse_v_i16m1_m (vmask_t mask, vint16m1_t value, int16_t *base)
 
__rv32 void vse_v_i16m2_m (vmask_t mask, vint16m2_t value, int16_t *base)
 
__rv32 void vse_v_i16m4_m (vmask_t mask, vint16m4_t value, int16_t *base)
 
__rv32 void vse_v_i16m8_m (vmask_t mask, vint16m8_t value, int16_t *base)
 
__rv32 void vse_v_i32m1_m (vmask_t mask, vint32m1_t value, int32_t *base)
 
__rv32 void vse_v_i32m2_m (vmask_t mask, vint32m2_t value, int32_t *base)
 
__rv32 void vse_v_i32m4_m (vmask_t mask, vint32m4_t value, int32_t *base)
 
__rv32 void vse_v_i32m8_m (vmask_t mask, vint32m8_t value, int32_t *base)
 
__rv32 void vse_v_u8m1_m (vmask_t mask, vuint8m1_t value, uint8_t *base)
 
__rv32 void vse_v_u8m2_m (vmask_t mask, vuint8m2_t value, uint8_t *base)
 
__rv32 void vse_v_u8m4_m (vmask_t mask, vuint8m4_t value, uint8_t *base)
 
__rv32 void vse_v_u8m8_m (vmask_t mask, vuint8m8_t value, uint8_t *base)
 
__rv32 void vse_v_u16m1_m (vmask_t mask, vuint16m1_t value, uint16_t *base)
 
__rv32 void vse_v_u16m2_m (vmask_t mask, vuint16m2_t value, uint16_t *base)
 
__rv32 void vse_v_u16m4_m (vmask_t mask, vuint16m4_t value, uint16_t *base)
 
__rv32 void vse_v_u16m8_m (vmask_t mask, vuint16m8_t value, uint16_t *base)
 
__rv32 void vse_v_u32m1_m (vmask_t mask, vuint32m1_t value, uint32_t *base)
 
__rv32 void vse_v_u32m2_m (vmask_t mask, vuint32m2_t value, uint32_t *base)
 
__rv32 void vse_v_u32m4_m (vmask_t mask, vuint32m4_t value, uint32_t *base)
 
__rv32 void vse_v_u32m8_m (vmask_t mask, vuint32m8_t value, uint32_t *base)
 
__rv32 void vse_v_f32m1_m (vmask_t mask, vfloat32m1_t value, float32_t *base)
 
__rv32 void vse_v_f32m2_m (vmask_t mask, vfloat32m2_t value, float32_t *base)
 
__rv32 void vse_v_f32m4_m (vmask_t mask, vfloat32m4_t value, float32_t *base)
 
__rv32 void vse_v_f32m8_m (vmask_t mask, vfloat32m8_t value, float32_t *base)
 
__rv32 vint8m1_t vlse_v_i8m1 (const int8_t *base, const int32_t stride)
 
__rv32 vint8m2_t vlse_v_i8m2 (const int8_t *base, const int32_t stride)
 
__rv32 vint8m4_t vlse_v_i8m4 (const int8_t *base, const int32_t stride)
 
__rv32 vint8m8_t vlse_v_i8m8 (const int8_t *base, const int32_t stride)
 
__rv32 vint16m1_t vlse_v_i16m1 (const int16_t *base, const int32_t stride)
 
__rv32 vint16m2_t vlse_v_i16m2 (const int16_t *base, const int32_t stride)
 
__rv32 vint16m4_t vlse_v_i16m4 (const int16_t *base, const int32_t stride)
 
__rv32 vint16m8_t vlse_v_i16m8 (const int16_t *base, const int32_t stride)
 
__rv32 vint32m1_t vlse_v_i32m1 (const int32_t *base, const int32_t stride)
 
__rv32 vint32m2_t vlse_v_i32m2 (const int32_t *base, const int32_t stride)
 
__rv32 vint32m4_t vlse_v_i32m4 (const int32_t *base, const int32_t stride)
 
__rv32 vint32m8_t vlse_v_i32m8 (const int32_t *base, const int32_t stride)
 
__rv32 vuint8m1_t vlse_v_u8m1 (const uint8_t *base, const int32_t stride)
 
__rv32 vuint8m2_t vlse_v_u8m2 (const uint8_t *base, const int32_t stride)
 
__rv32 vuint8m4_t vlse_v_u8m4 (const uint8_t *base, const int32_t stride)
 
__rv32 vuint8m8_t vlse_v_u8m8 (const uint8_t *base, const int32_t stride)
 
__rv32 vuint16m1_t vlse_v_u16m1 (const uint16_t *base, const int32_t stride)
 
__rv32 vuint16m2_t vlse_v_u16m2 (const uint16_t *base, const int32_t stride)
 
__rv32 vuint16m4_t vlse_v_u16m4 (const uint16_t *base, const int32_t stride)
 
__rv32 vuint16m8_t vlse_v_u16m8 (const uint16_t *base, const int32_t stride)
 
__rv32 vuint32m1_t vlse_v_u32m1 (const uint32_t *base, const int32_t stride)
 
__rv32 vuint32m2_t vlse_v_u32m2 (const uint32_t *base, const int32_t stride)
 
__rv32 vuint32m4_t vlse_v_u32m4 (const uint32_t *base, const int32_t stride)
 
__rv32 vuint32m8_t vlse_v_u32m8 (const uint32_t *base, const int32_t stride)
 
__rv32 vfloat32m1_t vlse_v_f32m1 (const float32_t *base, const int32_t stride)
 
__rv32 vfloat32m2_t vlse_v_f32m2 (const float32_t *base, const int32_t stride)
 
__rv32 vfloat32m4_t vlse_v_f32m4 (const float32_t *base, const int32_t stride)
 
__rv32 vfloat32m8_t vlse_v_f32m8 (const float32_t *base, const int32_t stride)
 
__rv32 vint8m1_t vlse_v_i8m1_m (vmask_t mask, const int8_t *base, const int32_t stride)
 
__rv32 vint8m2_t vlse_v_i8m2_m (vmask_t mask, const int8_t *base, const int32_t stride)
 
__rv32 vint8m4_t vlse_v_i8m4_m (vmask_t mask, const int8_t *base, const int32_t stride)
 
__rv32 vint8m8_t vlse_v_i8m8_m (vmask_t mask, const int8_t *base, const int32_t stride)
 
__rv32 vint16m1_t vlse_v_i16m1_m (vmask_t mask, const int16_t *base, const int32_t stride)
 
__rv32 vint16m2_t vlse_v_i16m2_m (vmask_t mask, const int16_t *base, const int32_t stride)
 
__rv32 vint16m4_t vlse_v_i16m4_m (vmask_t mask, const int16_t *base, const int32_t stride)
 
__rv32 vint16m8_t vlse_v_i16m8_m (vmask_t mask, const int16_t *base, const int32_t stride)
 
__rv32 vint32m1_t vlse_v_i32m1_m (vmask_t mask, const int32_t *base, const int32_t stride)
 
__rv32 vint32m2_t vlse_v_i32m2_m (vmask_t mask, const int32_t *base, const int32_t stride)
 
__rv32 vint32m4_t vlse_v_i32m4_m (vmask_t mask, const int32_t *base, const int32_t stride)
 
__rv32 vint32m8_t vlse_v_i32m8_m (vmask_t mask, const int32_t *base, const int32_t stride)
 
__rv32 vuint8m1_t vlse_v_u8m1_m (vmask_t mask, const uint8_t *base, const int32_t stride)
 
__rv32 vuint8m2_t vlse_v_u8m2_m (vmask_t mask, const uint8_t *base, const int32_t stride)
 
__rv32 vuint8m4_t vlse_v_u8m4_m (vmask_t mask, const uint8_t *base, const int32_t stride)
 
__rv32 vuint8m8_t vlse_v_u8m8_m (vmask_t mask, const uint8_t *base, const int32_t stride)
 
__rv32 vuint16m1_t vlse_v_u16m1_m (vmask_t mask, const uint16_t *base, const int32_t stride)
 
__rv32 vuint16m2_t vlse_v_u16m2_m (vmask_t mask, const uint16_t *base, const int32_t stride)
 
__rv32 vuint16m4_t vlse_v_u16m4_m (vmask_t mask, const uint16_t *base, const int32_t stride)
 
__rv32 vuint16m8_t vlse_v_u16m8_m (vmask_t mask, const uint16_t *base, const int32_t stride)
 
__rv32 vuint32m1_t vlse_v_u32m1_m (vmask_t mask, const uint32_t *base, const int32_t stride)
 
__rv32 vuint32m2_t vlse_v_u32m2_m (vmask_t mask, const uint32_t *base, const int32_t stride)
 
__rv32 vuint32m4_t vlse_v_u32m4_m (vmask_t mask, const uint32_t *base, const int32_t stride)
 
__rv32 vuint32m8_t vlse_v_u32m8_m (vmask_t mask, const uint32_t *base, const int32_t stride)
 
__rv32 vfloat32m1_t vlse_v_f32m1_m (vmask_t mask, const float32_t *base, const int32_t stride)
 
__rv32 vfloat32m2_t vlse_v_f32m2_m (vmask_t mask, const float32_t *base, const int32_t stride)
 
__rv32 vfloat32m4_t vlse_v_f32m4_m (vmask_t mask, const float32_t *base, const int32_t stride)
 
__rv32 vfloat32m8_t vlse_v_f32m8_m (vmask_t mask, const float32_t *base, const int32_t stride)
 
__rv32 void vsse_v_i8m1 (int8_t *base, const int32_t stride, vint8m1_t value)
 
__rv32 void vsse_v_i8m2 (int8_t *base, const int32_t stride, vint8m2_t value)
 
__rv32 void vsse_v_i8m4 (int8_t *base, const int32_t stride, vint8m4_t value)
 
__rv32 void vsse_v_i8m8 (int8_t *base, const int32_t stride, vint8m8_t value)
 
__rv32 void vsse_v_i16m1 (int16_t *base, const int32_t stride, vint16m1_t value)
 
__rv32 void vsse_v_i16m2 (int16_t *base, const int32_t stride, vint16m2_t value)
 
__rv32 void vsse_v_i16m4 (int16_t *base, const int32_t stride, vint16m4_t value)
 
__rv32 void vsse_v_i16m8 (int16_t *base, const int32_t stride, vint16m8_t value)
 
__rv32 void vsse_v_i32m1 (int32_t *base, const int32_t stride, vint32m1_t value)
 
__rv32 void vsse_v_i32m2 (int32_t *base, const int32_t stride, vint32m2_t value)
 
__rv32 void vsse_v_i32m4 (int32_t *base, const int32_t stride, vint32m4_t value)
 
__rv32 void vsse_v_i32m8 (int32_t *base, const int32_t stride, vint32m8_t value)
 
__rv32 void vsse_v_u8m1 (uint8_t *base, const int32_t stride, vuint8m1_t value)
 
__rv32 void vsse_v_u8m2 (uint8_t *base, const int32_t stride, vuint8m2_t value)
 
__rv32 void vsse_v_u8m4 (uint8_t *base, const int32_t stride, vuint8m4_t value)
 
__rv32 void vsse_v_u8m8 (uint8_t *base, const int32_t stride, vuint8m8_t value)
 
__rv32 void vsse_v_u16m1 (uint16_t *base, const int32_t stride, vuint16m1_t value)
 
__rv32 void vsse_v_u16m2 (uint16_t *base, const int32_t stride, vuint16m2_t value)
 
__rv32 void vsse_v_u16m4 (uint16_t *base, const int32_t stride, vuint16m4_t value)
 
__rv32 void vsse_v_u16m8 (uint16_t *base, const int32_t stride, vuint16m8_t value)
 
__rv32 void vsse_v_u32m1 (uint32_t *base, const int32_t stride, vuint32m1_t value)
 
__rv32 void vsse_v_u32m2 (uint32_t *base, const int32_t stride, vuint32m2_t value)
 
__rv32 void vsse_v_u32m4 (uint32_t *base, const int32_t stride, vuint32m4_t value)
 
__rv32 void vsse_v_u32m8 (uint32_t *base, const int32_t stride, vuint32m8_t value)
 
__rv32 void vsse_v_f32m1 (float32_t *base, const int32_t stride, vfloat32m1_t value)
 
__rv32 void vsse_v_f32m2 (float32_t *base, const int32_t stride, vfloat32m2_t value)
 
__rv32 void vsse_v_f32m4 (float32_t *base, const int32_t stride, vfloat32m4_t value)
 
__rv32 void vsse_v_f32m8 (float32_t *base, const int32_t stride, vfloat32m8_t value)
 
__rv32 void vsse_v_i8m1_m (vmask_t mask, int8_t *base, const int32_t stride, vint8m1_t value)
 
__rv32 void vsse_v_i8m2_m (vmask_t mask, int8_t *base, const int32_t stride, vint8m2_t value)
 
__rv32 void vsse_v_i8m4_m (vmask_t mask, int8_t *base, const int32_t stride, vint8m4_t value)
 
__rv32 void vsse_v_i8m8_m (vmask_t mask, int8_t *base, const int32_t stride, vint8m8_t value)
 
__rv32 void vsse_v_i16m1_m (vmask_t mask, int16_t *base, const int32_t stride, vint16m1_t value)
 
__rv32 void vsse_v_i16m2_m (vmask_t mask, int16_t *base, const int32_t stride, vint16m2_t value)
 
__rv32 void vsse_v_i16m4_m (vmask_t mask, int16_t *base, const int32_t stride, vint16m4_t value)
 
__rv32 void vsse_v_i16m8_m (vmask_t mask, int16_t *base, const int32_t stride, vint16m8_t value)
 
__rv32 void vsse_v_i32m1_m (vmask_t mask, int32_t *base, const int32_t stride, vint32m1_t value)
 
__rv32 void vsse_v_i32m2_m (vmask_t mask, int32_t *base, const int32_t stride, vint32m2_t value)
 
__rv32 void vsse_v_i32m4_m (vmask_t mask, int32_t *base, const int32_t stride, vint32m4_t value)
 
__rv32 void vsse_v_i32m8_m (vmask_t mask, int32_t *base, const int32_t stride, vint32m8_t value)
 
__rv32 void vsse_v_u8m1_m (vmask_t mask, uint8_t *base, const int32_t stride, vuint8m1_t value)
 
__rv32 void vsse_v_u8m2_m (vmask_t mask, uint8_t *base, const int32_t stride, vuint8m2_t value)
 
__rv32 void vsse_v_u8m4_m (vmask_t mask, uint8_t *base, const int32_t stride, vuint8m4_t value)
 
__rv32 void vsse_v_u8m8_m (vmask_t mask, uint8_t *base, const int32_t stride, vuint8m8_t value)
 
__rv32 void vsse_v_u16m1_m (vmask_t mask, uint16_t *base, const int32_t stride, vuint16m1_t value)
 
__rv32 void vsse_v_u16m2_m (vmask_t mask, uint16_t *base, const int32_t stride, vuint16m2_t value)
 
__rv32 void vsse_v_u16m4_m (vmask_t mask, uint16_t *base, const int32_t stride, vuint16m4_t value)
 
__rv32 void vsse_v_u16m8_m (vmask_t mask, uint16_t *base, const int32_t stride, vuint16m8_t value)
 
__rv32 void vsse_v_u32m1_m (vmask_t mask, uint32_t *base, const int32_t stride, vuint32m1_t value)
 
__rv32 void vsse_v_u32m2_m (vmask_t mask, uint32_t *base, const int32_t stride, vuint32m2_t value)
 
__rv32 void vsse_v_u32m4_m (vmask_t mask, uint32_t *base, const int32_t stride, vuint32m4_t value)
 
__rv32 void vsse_v_u32m8_m (vmask_t mask, uint32_t *base, const int32_t stride, vuint32m8_t value)
 
__rv32 void vsse_v_f32m1_m (vmask_t mask, float32_t *base, const int32_t stride, vfloat32m1_t value)
 
__rv32 void vsse_v_f32m2_m (vmask_t mask, float32_t *base, const int32_t stride, vfloat32m2_t value)
 
__rv32 void vsse_v_f32m4_m (vmask_t mask, float32_t *base, const int32_t stride, vfloat32m4_t value)
 
__rv32 void vsse_v_f32m8_m (vmask_t mask, float32_t *base, const int32_t stride, vfloat32m8_t value)
 
__rv32 vint8m1_t vlxe_v_i8m1 (const int8_t *base, vuint8m1_t index)
 
__rv32 vint8m2_t vlxe_v_i8m2 (const int8_t *base, vuint8m2_t index)
 
__rv32 vint8m4_t vlxe_v_i8m4 (const int8_t *base, vuint8m4_t index)
 
__rv32 vint8m8_t vlxe_v_i8m8 (const int8_t *base, vuint8m8_t index)
 
__rv32 vint16m1_t vlxe_v_i16m1 (const int16_t *base, vuint16m1_t index)
 
__rv32 vint16m2_t vlxe_v_i16m2 (const int16_t *base, vuint16m2_t index)
 
__rv32 vint16m4_t vlxe_v_i16m4 (const int16_t *base, vuint16m4_t index)
 
__rv32 vint16m8_t vlxe_v_i16m8 (const int16_t *base, vuint16m8_t index)
 
__rv32 vint32m1_t vlxe_v_i32m1 (const int32_t *base, vuint32m1_t index)
 
__rv32 vint32m2_t vlxe_v_i32m2 (const int32_t *base, vuint32m2_t index)
 
__rv32 vint32m4_t vlxe_v_i32m4 (const int32_t *base, vuint32m4_t index)
 
__rv32 vint32m8_t vlxe_v_i32m8 (const int32_t *base, vuint32m8_t index)
 
__rv32 vuint8m1_t vlxe_v_u8m1 (const uint8_t *base, vuint8m1_t index)
 
__rv32 vuint8m2_t vlxe_v_u8m2 (const uint8_t *base, vuint8m2_t index)
 
__rv32 vuint8m4_t vlxe_v_u8m4 (const uint8_t *base, vuint8m4_t index)
 
__rv32 vuint8m8_t vlxe_v_u8m8 (const uint8_t *base, vuint8m8_t index)
 
__rv32 vuint16m1_t vlxe_v_u16m1 (const uint16_t *base, vuint16m1_t index)
 
__rv32 vuint16m2_t vlxe_v_u16m2 (const uint16_t *base, vuint16m2_t index)
 
__rv32 vuint16m4_t vlxe_v_u16m4 (const uint16_t *base, vuint16m4_t index)
 
__rv32 vuint16m8_t vlxe_v_u16m8 (const uint16_t *base, vuint16m8_t index)
 
__rv32 vuint32m1_t vlxe_v_u32m1 (const uint32_t *base, vuint32m1_t index)
 
__rv32 vuint32m2_t vlxe_v_u32m2 (const uint32_t *base, vuint32m2_t index)
 
__rv32 vuint32m4_t vlxe_v_u32m4 (const uint32_t *base, vuint32m4_t index)
 
__rv32 vuint32m8_t vlxe_v_u32m8 (const uint32_t *base, vuint32m8_t index)
 
__rv32 vfloat32m1_t vlxe_v_f32m1 (const float32_t *base, vuint32m1_t index)
 
__rv32 vfloat32m2_t vlxe_v_f32m2 (const float32_t *base, vuint32m2_t index)
 
__rv32 vfloat32m4_t vlxe_v_f32m4 (const float32_t *base, vuint32m4_t index)
 
__rv32 vfloat32m8_t vlxe_v_f32m8 (const float32_t *base, vuint32m8_t index)
 
__rv32 vint8m1_t vlxe_v_i8m1_m (vmask_t mask, const int8_t *base, vuint8m1_t index)
 
__rv32 vint8m2_t vlxe_v_i8m2_m (vmask_t mask, const int8_t *base, vuint8m2_t index)
 
__rv32 vint8m4_t vlxe_v_i8m4_m (vmask_t mask, const int8_t *base, vuint8m4_t index)
 
__rv32 vint8m8_t vlxe_v_i8m8_m (vmask_t mask, const int8_t *base, vuint8m8_t index)
 
__rv32 vint16m1_t vlxe_v_i16m1_m (vmask_t mask, const int16_t *base, vuint16m1_t index)
 
__rv32 vint16m2_t vlxe_v_i16m2_m (vmask_t mask, const int16_t *base, vuint16m2_t index)
 
__rv32 vint16m4_t vlxe_v_i16m4_m (vmask_t mask, const int16_t *base, vuint16m4_t index)
 
__rv32 vint16m8_t vlxe_v_i16m8_m (vmask_t mask, const int16_t *base, vuint16m8_t index)
 
__rv32 vint32m1_t vlxe_v_i32m1_m (vmask_t mask, const int32_t *base, vuint32m1_t index)
 
__rv32 vint32m2_t vlxe_v_i32m2_m (vmask_t mask, const int32_t *base, vuint32m2_t index)
 
__rv32 vint32m4_t vlxe_v_i32m4_m (vmask_t mask, const int32_t *base, vuint32m4_t index)
 
__rv32 vint32m8_t vlxe_v_i32m8_m (vmask_t mask, const int32_t *base, vuint32m8_t index)
 
__rv32 vuint8m1_t vlxe_v_u8m1_m (vmask_t mask, const uint8_t *base, vuint8m1_t index)
 
__rv32 vuint8m2_t vlxe_v_u8m2_m (vmask_t mask, const uint8_t *base, vuint8m2_t index)
 
__rv32 vuint8m4_t vlxe_v_u8m4_m (vmask_t mask, const uint8_t *base, vuint8m4_t index)
 
__rv32 vuint8m8_t vlxe_v_u8m8_m (vmask_t mask, const uint8_t *base, vuint8m8_t index)
 
__rv32 vuint16m1_t vlxe_v_u16m1_m (vmask_t mask, const uint16_t *base, vuint16m1_t index)
 
__rv32 vuint16m2_t vlxe_v_u16m2_m (vmask_t mask, const uint16_t *base, vuint16m2_t index)
 
__rv32 vuint16m4_t vlxe_v_u16m4_m (vmask_t mask, const uint16_t *base, vuint16m4_t index)
 
__rv32 vuint16m8_t vlxe_v_u16m8_m (vmask_t mask, const uint16_t *base, vuint16m8_t index)
 
__rv32 vuint32m1_t vlxe_v_u32m1_m (vmask_t mask, const uint32_t *base, vuint32m1_t index)
 
__rv32 vuint32m2_t vlxe_v_u32m2_m (vmask_t mask, const uint32_t *base, vuint32m2_t index)
 
__rv32 vuint32m4_t vlxe_v_u32m4_m (vmask_t mask, const uint32_t *base, vuint32m4_t index)
 
__rv32 vuint32m8_t vlxe_v_u32m8_m (vmask_t mask, const uint32_t *base, vuint32m8_t index)
 
__rv32 vfloat32m1_t vlxe_v_f32m1_m (vmask_t mask, const float32_t *base, vuint32m1_t index)
 
__rv32 vfloat32m2_t vlxe_v_f32m2_m (vmask_t mask, const float32_t *base, vuint32m2_t index)
 
__rv32 vfloat32m4_t vlxe_v_f32m4_m (vmask_t mask, const float32_t *base, vuint32m4_t index)
 
__rv32 vfloat32m8_t vlxe_v_f32m8_m (vmask_t mask, const float32_t *base, vuint32m8_t index)
 
__rv32 void vsxe_v_i8m1 (int8_t *base, vuint8m1_t index, vint8m1_t value)
 
__rv32 void vsxe_v_i8m2 (int8_t *base, vuint8m2_t index, vint8m2_t value)
 
__rv32 void vsxe_v_i8m4 (int8_t *base, vuint8m4_t index, vint8m4_t value)
 
__rv32 void vsxe_v_i8m8 (int8_t *base, vuint8m8_t index, vint8m8_t value)
 
__rv32 void vsxe_v_i16m1 (int16_t *base, vuint16m1_t index, vint16m1_t value)
 
__rv32 void vsxe_v_i16m2 (int16_t *base, vuint16m2_t index, vint16m2_t value)
 
__rv32 void vsxe_v_i16m4 (int16_t *base, vuint16m4_t index, vint16m4_t value)
 
__rv32 void vsxe_v_i16m8 (int16_t *base, vuint16m8_t index, vint16m8_t value)
 
__rv32 void vsxe_v_i32m1 (int32_t *base, vuint32m1_t index, vint32m1_t value)
 
__rv32 void vsxe_v_i32m2 (int32_t *base, vuint32m2_t index, vint32m2_t value)
 
__rv32 void vsxe_v_i32m4 (int32_t *base, vuint32m4_t index, vint32m4_t value)
 
__rv32 void vsxe_v_i32m8 (int32_t *base, vuint32m8_t index, vint32m8_t value)
 
__rv32 void vsxe_v_u8m1 (uint8_t *base, vuint8m1_t index, vuint8m1_t value)
 
__rv32 void vsxe_v_u8m2 (uint8_t *base, vuint8m2_t index, vuint8m2_t value)
 
__rv32 void vsxe_v_u8m4 (uint8_t *base, vuint8m4_t index, vuint8m4_t value)
 
__rv32 void vsxe_v_u8m8 (uint8_t *base, vuint8m8_t index, vuint8m8_t value)
 
__rv32 void vsxe_v_u16m1 (uint16_t *base, vuint16m1_t index, vuint16m1_t value)
 
__rv32 void vsxe_v_u16m2 (uint16_t *base, vuint16m2_t index, vuint16m2_t value)
 
__rv32 void vsxe_v_u16m4 (uint16_t *base, vuint16m4_t index, vuint16m4_t value)
 
__rv32 void vsxe_v_u16m8 (uint16_t *base, vuint16m8_t index, vuint16m8_t value)
 
__rv32 void vsxe_v_u32m1 (uint32_t *base, vuint32m1_t index, vuint32m1_t value)
 
__rv32 void vsxe_v_u32m2 (uint32_t *base, vuint32m2_t index, vuint32m2_t value)
 
__rv32 void vsxe_v_u32m4 (uint32_t *base, vuint32m4_t index, vuint32m4_t value)
 
__rv32 void vsxe_v_u32m8 (uint32_t *base, vuint32m8_t index, vuint32m8_t value)
 
__rv32 void vsxe_v_f32m1 (float32_t *base, vuint32m1_t index, vfloat32m1_t value)
 
__rv32 void vsxe_v_f32m2 (float32_t *base, vuint32m2_t index, vfloat32m2_t value)
 
__rv32 void vsxe_v_f32m4 (float32_t *base, vuint32m4_t index, vfloat32m4_t value)
 
__rv32 void vsxe_v_f32m8 (float32_t *base, vuint32m8_t index, vfloat32m8_t value)
 
__rv32 void vsxe_v_i8m1_m (vmask_t mask, int8_t *base, vuint8m1_t index, vint8m1_t value)
 
__rv32 void vsxe_v_i8m2_m (vmask_t mask, int8_t *base, vuint8m2_t index, vint8m2_t value)
 
__rv32 void vsxe_v_i8m4_m (vmask_t mask, int8_t *base, vuint8m4_t index, vint8m4_t value)
 
__rv32 void vsxe_v_i8m8_m (vmask_t mask, int8_t *base, vuint8m8_t index, vint8m8_t value)
 
__rv32 void vsxe_v_i16m1_m (vmask_t mask, int16_t *base, vuint16m1_t index, vint16m1_t value)
 
__rv32 void vsxe_v_i16m2_m (vmask_t mask, int16_t *base, vuint16m2_t index, vint16m2_t value)
 
__rv32 void vsxe_v_i16m4_m (vmask_t mask, int16_t *base, vuint16m4_t index, vint16m4_t value)
 
__rv32 void vsxe_v_i16m8_m (vmask_t mask, int16_t *base, vuint16m8_t index, vint16m8_t value)
 
__rv32 void vsxe_v_i32m1_m (vmask_t mask, int32_t *base, vuint32m1_t index, vint32m1_t value)
 
__rv32 void vsxe_v_i32m2_m (vmask_t mask, int32_t *base, vuint32m2_t index, vint32m2_t value)
 
__rv32 void vsxe_v_i32m4_m (vmask_t mask, int32_t *base, vuint32m4_t index, vint32m4_t value)
 
__rv32 void vsxe_v_i32m8_m (vmask_t mask, int32_t *base, vuint32m8_t index, vint32m8_t value)
 
__rv32 void vsxe_v_u8m1_m (vmask_t mask, uint8_t *base, vuint8m1_t index, vuint8m1_t value)
 
__rv32 void vsxe_v_u8m2_m (vmask_t mask, uint8_t *base, vuint8m2_t index, vuint8m2_t value)
 
__rv32 void vsxe_v_u8m4_m (vmask_t mask, uint8_t *base, vuint8m4_t index, vuint8m4_t value)
 
__rv32 void vsxe_v_u8m8_m (vmask_t mask, uint8_t *base, vuint8m8_t index, vuint8m8_t value)
 
__rv32 void vsxe_v_u16m1_m (vmask_t mask, uint16_t *base, vuint16m1_t index, vuint16m1_t value)
 
__rv32 void vsxe_v_u16m2_m (vmask_t mask, uint16_t *base, vuint16m2_t index, vuint16m2_t value)
 
__rv32 void vsxe_v_u16m4_m (vmask_t mask, uint16_t *base, vuint16m4_t index, vuint16m4_t value)
 
__rv32 void vsxe_v_u16m8_m (vmask_t mask, uint16_t *base, vuint16m8_t index, vuint16m8_t value)
 
__rv32 void vsxe_v_u32m1_m (vmask_t mask, uint32_t *base, vuint32m1_t index, vuint32m1_t value)
 
__rv32 void vsxe_v_u32m2_m (vmask_t mask, uint32_t *base, vuint32m2_t index, vuint32m2_t value)
 
__rv32 void vsxe_v_u32m4_m (vmask_t mask, uint32_t *base, vuint32m4_t index, vuint32m4_t value)
 
__rv32 void vsxe_v_u32m8_m (vmask_t mask, uint32_t *base, vuint32m8_t index, vuint32m8_t value)
 
__rv32 void vsxe_v_f32m1_m (vmask_t mask, float32_t *base, vuint32m1_t index, vfloat32m1_t value)
 
__rv32 void vsxe_v_f32m2_m (vmask_t mask, float32_t *base, vuint32m2_t index, vfloat32m2_t value)
 
__rv32 void vsxe_v_f32m4_m (vmask_t mask, float32_t *base, vuint32m4_t index, vfloat32m4_t value)
 
__rv32 void vsxe_v_f32m8_m (vmask_t mask, float32_t *base, vuint32m8_t index, vfloat32m8_t value)
 
__rv32 void vsuxe_v_i8m1 (int8_t *base, vuint8m1_t index, vint8m1_t value)
 
__rv32 void vsuxe_v_i8m2 (int8_t *base, vuint8m2_t index, vint8m2_t value)
 
__rv32 void vsuxe_v_i8m4 (int8_t *base, vuint8m4_t index, vint8m4_t value)
 
__rv32 void vsuxe_v_i8m8 (int8_t *base, vuint8m8_t index, vint8m8_t value)
 
__rv32 void vsuxe_v_i16m1 (int16_t *base, vuint16m1_t index, vint16m1_t value)
 
__rv32 void vsuxe_v_i16m2 (int16_t *base, vuint16m2_t index, vint16m2_t value)
 
__rv32 void vsuxe_v_i16m4 (int16_t *base, vuint16m4_t index, vint16m4_t value)
 
__rv32 void vsuxe_v_i16m8 (int16_t *base, vuint16m8_t index, vint16m8_t value)
 
__rv32 void vsuxe_v_i32m1 (int32_t *base, vuint32m1_t index, vint32m1_t value)
 
__rv32 void vsuxe_v_i32m2 (int32_t *base, vuint32m2_t index, vint32m2_t value)
 
__rv32 void vsuxe_v_i32m4 (int32_t *base, vuint32m4_t index, vint32m4_t value)
 
__rv32 void vsuxe_v_i32m8 (int32_t *base, vuint32m8_t index, vint32m8_t value)
 
__rv32 void vsuxe_v_u8m1 (uint8_t *base, vuint8m1_t index, vuint8m1_t value)
 
__rv32 void vsuxe_v_u8m2 (uint8_t *base, vuint8m2_t index, vuint8m2_t value)
 
__rv32 void vsuxe_v_u8m4 (uint8_t *base, vuint8m4_t index, vuint8m4_t value)
 
__rv32 void vsuxe_v_u8m8 (uint8_t *base, vuint8m8_t index, vuint8m8_t value)
 
__rv32 void vsuxe_v_u16m1 (uint16_t *base, vuint16m1_t index, vuint16m1_t value)
 
__rv32 void vsuxe_v_u16m2 (uint16_t *base, vuint16m2_t index, vuint16m2_t value)
 
__rv32 void vsuxe_v_u16m4 (uint16_t *base, vuint16m4_t index, vuint16m4_t value)
 
__rv32 void vsuxe_v_u16m8 (uint16_t *base, vuint16m8_t index, vuint16m8_t value)
 
__rv32 void vsuxe_v_u32m1 (uint32_t *base, vuint32m1_t index, vuint32m1_t value)
 
__rv32 void vsuxe_v_u32m2 (uint32_t *base, vuint32m2_t index, vuint32m2_t value)
 
__rv32 void vsuxe_v_u32m4 (uint32_t *base, vuint32m4_t index, vuint32m4_t value)
 
__rv32 void vsuxe_v_u32m8 (uint32_t *base, vuint32m8_t index, vuint32m8_t value)
 
__rv32 void vsuxe_v_f32m1 (float32_t *base, vuint32m1_t index, vfloat32m1_t value)
 
__rv32 void vsuxe_v_f32m2 (float32_t *base, vuint32m2_t index, vfloat32m2_t value)
 
__rv32 void vsuxe_v_f32m4 (float32_t *base, vuint32m4_t index, vfloat32m4_t value)
 
__rv32 void vsuxe_v_f32m8 (float32_t *base, vuint32m8_t index, vfloat32m8_t value)
 
__rv32 void vsuxe_v_i8m1_m (vmask_t mask, int8_t *base, vuint8m1_t index, vint8m1_t value)
 
__rv32 void vsuxe_v_i8m2_m (vmask_t mask, int8_t *base, vuint8m2_t index, vint8m2_t value)
 
__rv32 void vsuxe_v_i8m4_m (vmask_t mask, int8_t *base, vuint8m4_t index, vint8m4_t value)
 
__rv32 void vsuxe_v_i8m8_m (vmask_t mask, int8_t *base, vuint8m8_t index, vint8m8_t value)
 
__rv32 void vsuxe_v_i16m1_m (vmask_t mask, int16_t *base, vuint16m1_t index, vint16m1_t value)
 
__rv32 void vsuxe_v_i16m2_m (vmask_t mask, int16_t *base, vuint16m2_t index, vint16m2_t value)
 
__rv32 void vsuxe_v_i16m4_m (vmask_t mask, int16_t *base, vuint16m4_t index, vint16m4_t value)
 
__rv32 void vsuxe_v_i16m8_m (vmask_t mask, int16_t *base, vuint16m8_t index, vint16m8_t value)
 
__rv32 void vsuxe_v_i32m1_m (vmask_t mask, int32_t *base, vuint32m1_t index, vint32m1_t value)
 
__rv32 void vsuxe_v_i32m2_m (vmask_t mask, int32_t *base, vuint32m2_t index, vint32m2_t value)
 
__rv32 void vsuxe_v_i32m4_m (vmask_t mask, int32_t *base, vuint32m4_t index, vint32m4_t value)
 
__rv32 void vsuxe_v_i32m8_m (vmask_t mask, int32_t *base, vuint32m8_t index, vint32m8_t value)
 
__rv32 void vsuxe_v_u8m1_m (vmask_t mask, uint8_t *base, vuint8m1_t index, vuint8m1_t value)
 
__rv32 void vsuxe_v_u8m2_m (vmask_t mask, uint8_t *base, vuint8m2_t index, vuint8m2_t value)
 
__rv32 void vsuxe_v_u8m4_m (vmask_t mask, uint8_t *base, vuint8m4_t index, vuint8m4_t value)
 
__rv32 void vsuxe_v_u8m8_m (vmask_t mask, uint8_t *base, vuint8m8_t index, vuint8m8_t value)
 
__rv32 void vsuxe_v_u16m1_m (vmask_t mask, uint16_t *base, vuint16m1_t index, vuint16m1_t value)
 
__rv32 void vsuxe_v_u16m2_m (vmask_t mask, uint16_t *base, vuint16m2_t index, vuint16m2_t value)
 
__rv32 void vsuxe_v_u16m4_m (vmask_t mask, uint16_t *base, vuint16m4_t index, vuint16m4_t value)
 
__rv32 void vsuxe_v_u16m8_m (vmask_t mask, uint16_t *base, vuint16m8_t index, vuint16m8_t value)
 
__rv32 void vsuxe_v_u32m1_m (vmask_t mask, uint32_t *base, vuint32m1_t index, vuint32m1_t value)
 
__rv32 void vsuxe_v_u32m2_m (vmask_t mask, uint32_t *base, vuint32m2_t index, vuint32m2_t value)
 
__rv32 void vsuxe_v_u32m4_m (vmask_t mask, uint32_t *base, vuint32m4_t index, vuint32m4_t value)
 
__rv32 void vsuxe_v_u32m8_m (vmask_t mask, uint32_t *base, vuint32m8_t index, vuint32m8_t value)
 
__rv32 void vsuxe_v_f32m1_m (vmask_t mask, float32_t *base, vuint32m1_t index, vfloat32m1_t value)
 
__rv32 void vsuxe_v_f32m2_m (vmask_t mask, float32_t *base, vuint32m2_t index, vfloat32m2_t value)
 
__rv32 void vsuxe_v_f32m4_m (vmask_t mask, float32_t *base, vuint32m4_t index, vfloat32m4_t value)
 
__rv32 void vsuxe_v_f32m8_m (vmask_t mask, float32_t *base, vuint32m8_t index, vfloat32m8_t value)
 
__rv32 vint8m1_t vleff_v_i8m1 (const int8_t *base)
 
__rv32 vint8m2_t vleff_v_i8m2 (const int8_t *base)
 
__rv32 vint8m4_t vleff_v_i8m4 (const int8_t *base)
 
__rv32 vint8m8_t vleff_v_i8m8 (const int8_t *base)
 
__rv32 vint16m1_t vleff_v_i16m1 (const int16_t *base)
 
__rv32 vint16m2_t vleff_v_i16m2 (const int16_t *base)
 
__rv32 vint16m4_t vleff_v_i16m4 (const int16_t *base)
 
__rv32 vint16m8_t vleff_v_i16m8 (const int16_t *base)
 
__rv32 vint32m1_t vleff_v_i32m1 (const int32_t *base)
 
__rv32 vint32m2_t vleff_v_i32m2 (const int32_t *base)
 
__rv32 vint32m4_t vleff_v_i32m4 (const int32_t *base)
 
__rv32 vint32m8_t vleff_v_i32m8 (const int32_t *base)
 
__rv32 vuint8m1_t vleff_v_u8m1 (const uint8_t *base)
 
__rv32 vuint8m2_t vleff_v_u8m2 (const uint8_t *base)
 
__rv32 vuint8m4_t vleff_v_u8m4 (const uint8_t *base)
 
__rv32 vuint8m8_t vleff_v_u8m8 (const uint8_t *base)
 
__rv32 vuint16m1_t vleff_v_u16m1 (const uint16_t *base)
 
__rv32 vuint16m2_t vleff_v_u16m2 (const uint16_t *base)
 
__rv32 vuint16m4_t vleff_v_u16m4 (const uint16_t *base)
 
__rv32 vuint16m8_t vleff_v_u16m8 (const uint16_t *base)
 
__rv32 vuint32m1_t vleff_v_u32m1 (const uint32_t *base)
 
__rv32 vuint32m2_t vleff_v_u32m2 (const uint32_t *base)
 
__rv32 vuint32m4_t vleff_v_u32m4 (const uint32_t *base)
 
__rv32 vuint32m8_t vleff_v_u32m8 (const uint32_t *base)
 
__rv32 vfloat32m1_t vleff_v_f32m1 (const float32_t *base)
 
__rv32 vfloat32m2_t vleff_v_f32m2 (const float32_t *base)
 
__rv32 vfloat32m4_t vleff_v_f32m4 (const float32_t *base)
 
__rv32 vfloat32m8_t vleff_v_f32m8 (const float32_t *base)
 
__rv32 vint8m1_t vleff_v_i8m1_m (vmask_t mask, const int8_t *base)
 
__rv32 vint8m2_t vleff_v_i8m2_m (vmask_t mask, const int8_t *base)
 
__rv32 vint8m4_t vleff_v_i8m4_m (vmask_t mask, const int8_t *base)
 
__rv32 vint8m8_t vleff_v_i8m8_m (vmask_t mask, const int8_t *base)
 
__rv32 vint16m1_t vleff_v_i16m1_m (vmask_t mask, const int16_t *base)
 
__rv32 vint16m2_t vleff_v_i16m2_m (vmask_t mask, const int16_t *base)
 
__rv32 vint16m4_t vleff_v_i16m4_m (vmask_t mask, const int16_t *base)
 
__rv32 vint16m8_t vleff_v_i16m8_m (vmask_t mask, const int16_t *base)
 
__rv32 vint32m1_t vleff_v_i32m1_m (vmask_t mask, const int32_t *base)
 
__rv32 vint32m2_t vleff_v_i32m2_m (vmask_t mask, const int32_t *base)
 
__rv32 vint32m4_t vleff_v_i32m4_m (vmask_t mask, const int32_t *base)
 
__rv32 vint32m8_t vleff_v_i32m8_m (vmask_t mask, const int32_t *base)
 
__rv32 vuint8m1_t vleff_v_u8m1_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint8m2_t vleff_v_u8m2_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint8m4_t vleff_v_u8m4_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint8m8_t vleff_v_u8m8_m (vmask_t mask, const uint8_t *base)
 
__rv32 vuint16m1_t vleff_v_u16m1_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint16m2_t vleff_v_u16m2_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint16m4_t vleff_v_u16m4_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint16m8_t vleff_v_u16m8_m (vmask_t mask, const uint16_t *base)
 
__rv32 vuint32m1_t vleff_v_u32m1_m (vmask_t mask, const uint32_t *base)
 
__rv32 vuint32m2_t vleff_v_u32m2_m (vmask_t mask, const uint32_t *base)
 
__rv32 vuint32m4_t vleff_v_u32m4_m (vmask_t mask, const uint32_t *base)
 
__rv32 vuint32m8_t vleff_v_u32m8_m (vmask_t mask, const uint32_t *base)
 
__rv32 vfloat32m1_t vleff_v_f32m1_m (vmask_t mask, const float32_t *base)
 
__rv32 vfloat32m2_t vleff_v_f32m2_m (vmask_t mask, const float32_t *base)
 
__rv32 vfloat32m4_t vleff_v_f32m4_m (vmask_t mask, const float32_t *base)
 
__rv32 vfloat32m8_t vleff_v_f32m8_m (vmask_t mask, const float32_t *base)
 
__rv32 vint8m1_t vadd_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vadd_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vadd_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vadd_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vadd_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vadd_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vadd_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vadd_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vadd_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vadd_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vadd_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vadd_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vadd_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vadd_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vadd_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vadd_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vadd_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vadd_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vadd_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vadd_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vadd_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vadd_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vadd_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vadd_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vadd_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vadd_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vadd_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vadd_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vadd_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vadd_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vadd_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vadd_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vadd_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vadd_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vadd_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vadd_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vadd_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vadd_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vadd_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vadd_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vadd_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vadd_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vadd_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vadd_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vadd_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vadd_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vadd_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vadd_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vsub_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vsub_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vsub_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vsub_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vsub_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vsub_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vsub_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vsub_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vsub_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vsub_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vsub_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vsub_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vsub_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsub_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsub_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsub_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsub_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsub_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsub_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsub_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsub_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsub_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsub_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsub_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vsub_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vsub_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vsub_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vsub_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vsub_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vsub_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vsub_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vsub_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vsub_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vsub_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vsub_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vsub_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vsub_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsub_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsub_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsub_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsub_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vsub_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vsub_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vsub_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vsub_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vsub_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vsub_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vsub_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vrsub_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vrsub_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vrsub_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vrsub_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vrsub_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vrsub_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vrsub_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vrsub_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vrsub_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vrsub_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vrsub_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vrsub_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vrsub_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vrsub_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vrsub_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vrsub_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vrsub_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vrsub_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vrsub_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vrsub_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vrsub_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vrsub_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vrsub_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vrsub_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vadd_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vadd_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vadd_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vadd_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vadd_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vadd_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vadd_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vadd_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vadd_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vadd_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vadd_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vadd_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vadd_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vadd_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vadd_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vadd_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vadd_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vadd_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vadd_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vadd_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vadd_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vadd_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vadd_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vadd_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vadd_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vadd_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vadd_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vadd_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vadd_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vadd_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vadd_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vadd_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vadd_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vadd_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vadd_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vadd_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vadd_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vadd_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vadd_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vadd_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vadd_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vadd_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vadd_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vadd_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vadd_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vadd_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vadd_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vadd_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vsub_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vsub_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vsub_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vsub_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vsub_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vsub_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vsub_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vsub_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vsub_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vsub_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vsub_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vsub_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vsub_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsub_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsub_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsub_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsub_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsub_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsub_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsub_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsub_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsub_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsub_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsub_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vsub_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vsub_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vsub_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vsub_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vsub_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vsub_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vsub_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vsub_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vsub_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vsub_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vsub_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vsub_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vsub_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsub_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsub_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsub_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsub_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vsub_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vsub_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vsub_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vsub_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vsub_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vsub_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vsub_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vrsub_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vrsub_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vrsub_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vrsub_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vrsub_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vrsub_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vrsub_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vrsub_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vrsub_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vrsub_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vrsub_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vrsub_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vrsub_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vrsub_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vrsub_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vrsub_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vrsub_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vrsub_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vrsub_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vrsub_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vrsub_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vrsub_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vrsub_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vrsub_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vuint16m2_t vwaddu_vv_u16m2 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwaddu_vv_u16m4 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwaddu_vv_u16m8 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwaddu_vv_u32m2 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwaddu_vv_u32m4 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwaddu_vv_u32m8 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwaddu_vx_u16m2 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwaddu_vx_u16m4 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwaddu_vx_u16m8 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwaddu_vx_u32m2 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwaddu_vx_u32m4 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwaddu_vx_u32m8 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vwsubu_vv_u16m2 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwsubu_vv_u16m4 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwsubu_vv_u16m8 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwsubu_vv_u32m2 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwsubu_vv_u32m4 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwsubu_vv_u32m8 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwsubu_vx_u16m2 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwsubu_vx_u16m4 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwsubu_vx_u16m8 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwsubu_vx_u32m2 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwsubu_vx_u32m4 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwsubu_vx_u32m8 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vint16m2_t vwadd_vv_i16m2 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwadd_vv_i16m4 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwadd_vv_i16m8 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwadd_vv_i32m2 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwadd_vv_i32m4 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwadd_vv_i32m8 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwadd_vx_i16m2 (vint8m1_t op1, int8_t op2)
 
__rv32 vint16m4_t vwadd_vx_i16m4 (vint8m2_t op1, int8_t op2)
 
__rv32 vint16m8_t vwadd_vx_i16m8 (vint8m4_t op1, int8_t op2)
 
__rv32 vint32m2_t vwadd_vx_i32m2 (vint16m1_t op1, int16_t op2)
 
__rv32 vint32m4_t vwadd_vx_i32m4 (vint16m2_t op1, int16_t op2)
 
__rv32 vint32m8_t vwadd_vx_i32m8 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m2_t vwsub_vv_i16m2 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwsub_vv_i16m4 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwsub_vv_i16m8 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwsub_vv_i32m2 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwsub_vv_i32m4 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwsub_vv_i32m8 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwsub_vx_i16m2 (vint8m1_t op1, int8_t op2)
 
__rv32 vint16m4_t vwsub_vx_i16m4 (vint8m2_t op1, int8_t op2)
 
__rv32 vint16m8_t vwsub_vx_i16m8 (vint8m4_t op1, int8_t op2)
 
__rv32 vint32m2_t vwsub_vx_i32m2 (vint16m1_t op1, int16_t op2)
 
__rv32 vint32m4_t vwsub_vx_i32m4 (vint16m2_t op1, int16_t op2)
 
__rv32 vint32m8_t vwsub_vx_i32m8 (vint16m4_t op1, int16_t op2)
 
__rv32 vuint16m2_t vwaddu_wv_u16m2 (vuint16m2_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwaddu_wv_u16m4 (vuint16m4_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwaddu_wv_u16m8 (vuint16m8_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwaddu_wv_u32m2 (vuint32m2_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwaddu_wv_u32m4 (vuint32m4_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwaddu_wv_u32m8 (vuint32m8_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwaddu_wx_u16m2 (vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwaddu_wx_u16m4 (vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwaddu_wx_u16m8 (vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwaddu_wx_u32m2 (vuint32m2_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwaddu_wx_u32m4 (vuint32m4_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwaddu_wx_u32m8 (vuint32m8_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vwsubu_wv_u16m2 (vuint16m2_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwsubu_wv_u16m4 (vuint16m4_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwsubu_wv_u16m8 (vuint16m8_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwsubu_wv_u32m2 (vuint32m2_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwsubu_wv_u32m4 (vuint32m4_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwsubu_wv_u32m8 (vuint32m8_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwsubu_wx_u16m2 (vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwsubu_wx_u16m4 (vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwsubu_wx_u16m8 (vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwsubu_wx_u32m2 (vuint32m2_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwsubu_wx_u32m4 (vuint32m4_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwsubu_wx_u32m8 (vuint32m8_t op1, uint16_t op2)
 
__rv32 vint16m2_t vwadd_wv_i16m2 (vint16m2_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwadd_wv_i16m4 (vint16m4_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwadd_wv_i16m8 (vint16m8_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwadd_wv_i32m2 (vint32m2_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwadd_wv_i32m4 (vint32m4_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwadd_wv_i32m8 (vint32m8_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwadd_wx_i16m2 (vint16m2_t op1, int8_t op2)
 
__rv32 vint16m4_t vwadd_wx_i16m4 (vint16m4_t op1, int8_t op2)
 
__rv32 vint16m8_t vwadd_wx_i16m8 (vint16m8_t op1, int8_t op2)
 
__rv32 vint32m2_t vwadd_wx_i32m2 (vint32m2_t op1, int16_t op2)
 
__rv32 vint32m4_t vwadd_wx_i32m4 (vint32m4_t op1, int16_t op2)
 
__rv32 vint32m8_t vwadd_wx_i32m8 (vint32m8_t op1, int16_t op2)
 
__rv32 vint16m2_t vwsub_wv_i16m2 (vint16m2_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwsub_wv_i16m4 (vint16m4_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwsub_wv_i16m8 (vint16m8_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwsub_wv_i32m2 (vint32m2_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwsub_wv_i32m4 (vint32m4_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwsub_wv_i32m8 (vint32m8_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwsub_wx_i16m2 (vint16m2_t op1, int8_t op2)
 
__rv32 vint16m4_t vwsub_wx_i16m4 (vint16m4_t op1, int8_t op2)
 
__rv32 vint16m8_t vwsub_wx_i16m8 (vint16m8_t op1, int8_t op2)
 
__rv32 vint32m2_t vwsub_wx_i32m2 (vint32m2_t op1, int16_t op2)
 
__rv32 vint32m4_t vwsub_wx_i32m4 (vint32m4_t op1, int16_t op2)
 
__rv32 vint32m8_t vwsub_wx_i32m8 (vint32m8_t op1, int16_t op2)
 
__rv32 vuint16m2_t vwaddu_vv_u16m2_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwaddu_vv_u16m4_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwaddu_vv_u16m8_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwaddu_vv_u32m2_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwaddu_vv_u32m4_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwaddu_vv_u32m8_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwaddu_vx_u16m2_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwaddu_vx_u16m4_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwaddu_vx_u16m8_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwaddu_vx_u32m2_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwaddu_vx_u32m4_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwaddu_vx_u32m8_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vwsubu_vv_u16m2_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwsubu_vv_u16m4_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwsubu_vv_u16m8_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwsubu_vv_u32m2_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwsubu_vv_u32m4_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwsubu_vv_u32m8_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwsubu_vx_u16m2_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwsubu_vx_u16m4_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwsubu_vx_u16m8_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwsubu_vx_u32m2_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwsubu_vx_u32m4_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwsubu_vx_u32m8_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vint16m2_t vwadd_vv_i16m2_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwadd_vv_i16m4_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwadd_vv_i16m8_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwadd_vv_i32m2_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwadd_vv_i32m4_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwadd_vv_i32m8_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwadd_vx_i16m2_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint16m4_t vwadd_vx_i16m4_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint16m8_t vwadd_vx_i16m8_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint32m2_t vwadd_vx_i32m2_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint32m4_t vwadd_vx_i32m4_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint32m8_t vwadd_vx_i32m8_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m2_t vwsub_vv_i16m2_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwsub_vv_i16m4_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwsub_vv_i16m8_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwsub_vv_i32m2_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwsub_vv_i32m4_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwsub_vv_i32m8_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwsub_vx_i16m2_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint16m4_t vwsub_vx_i16m4_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint16m8_t vwsub_vx_i16m8_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint32m2_t vwsub_vx_i32m2_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint32m4_t vwsub_vx_i32m4_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint32m8_t vwsub_vx_i32m8_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vuint16m2_t vwaddu_wv_u16m2_m (vmask_t mask, vuint16m2_t op1, vint8m1_t op2)
 
__rv32 vuint16m4_t vwaddu_wv_u16m4_m (vmask_t mask, vuint16m4_t op1, vint8m2_t op2)
 
__rv32 vuint16m8_t vwaddu_wv_u16m8_m (vmask_t mask, vuint16m8_t op1, vint8m4_t op2)
 
__rv32 vuint32m2_t vwaddu_wv_u32m2_m (vmask_t mask, vuint32m2_t op1, vint16m1_t op2)
 
__rv32 vuint32m4_t vwaddu_wv_u32m4_m (vmask_t mask, vuint32m4_t op1, vint16m2_t op2)
 
__rv32 vuint32m8_t vwaddu_wv_u32m8_m (vmask_t mask, vuint32m8_t op1, vint16m4_t op2)
 
__rv32 vuint16m2_t vwaddu_wx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwaddu_wx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwaddu_wx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwaddu_wx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwaddu_wx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwaddu_wx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vwsubu_wv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwsubu_wv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwsubu_wv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwsubu_wv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwsubu_wv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwsubu_wv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwsubu_wx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwsubu_wx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwsubu_wx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwsubu_wx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwsubu_wx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwsubu_wx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint16_t op2)
 
__rv32 vint16m2_t vwadd_wv_i16m2_m (vmask_t mask, vint16m2_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwadd_wv_i16m4_m (vmask_t mask, vint16m4_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwadd_wv_i16m8_m (vmask_t mask, vint16m8_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwadd_wv_i32m2_m (vmask_t mask, vint32m2_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwadd_wv_i32m4_m (vmask_t mask, vint32m4_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwadd_wv_i32m8_m (vmask_t mask, vint32m8_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwadd_wx_i16m2_m (vmask_t mask, vint16m2_t op1, int8_t op2)
 
__rv32 vint16m4_t vwadd_wx_i16m4_m (vmask_t mask, vint16m4_t op1, int8_t op2)
 
__rv32 vint16m8_t vwadd_wx_i16m8_m (vmask_t mask, vint16m8_t op1, int8_t op2)
 
__rv32 vint32m2_t vwadd_wx_i32m2_m (vmask_t mask, vint32m2_t op1, int16_t op2)
 
__rv32 vint32m4_t vwadd_wx_i32m4_m (vmask_t mask, vint32m4_t op1, int16_t op2)
 
__rv32 vint32m8_t vwadd_wx_i32m8_m (vmask_t mask, vint32m8_t op1, int16_t op2)
 
__rv32 vint16m2_t vwsub_wv_i16m2_m (vmask_t mask, vint16m2_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwsub_wv_i16m4_m (vmask_t mask, vint16m4_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwsub_wv_i16m8_m (vmask_t mask, vint16m8_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwsub_wv_i32m2_m (vmask_t mask, vint32m2_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwsub_wv_i32m4_m (vmask_t mask, vint32m4_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwsub_wv_i32m8_m (vmask_t mask, vint32m8_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwsub_wx_i16m2_m (vmask_t mask, vint16m2_t op1, int8_t op2)
 
__rv32 vint16m4_t vwsub_wx_i16m4_m (vmask_t mask, vint16m4_t op1, int8_t op2)
 
__rv32 vint16m8_t vwsub_wx_i16m8_m (vmask_t mask, vint16m8_t op1, int8_t op2)
 
__rv32 vint32m2_t vwsub_wx_i32m2_m (vmask_t mask, vint32m2_t op1, int16_t op2)
 
__rv32 vint32m4_t vwsub_wx_i32m4_m (vmask_t mask, vint32m4_t op1, int16_t op2)
 
__rv32 vint32m8_t vwsub_wx_i32m8_m (vmask_t mask, vint32m8_t op1, int16_t op2)
 
__rv32 vint8m1_t vadc_vvm_i8m1 (vint8m1_t op1, vint8m1_t op2, vmask_t carryin)
 
__rv32 vint8m2_t vadc_vvm_i8m2 (vint8m2_t op1, vint8m2_t op2, vmask_t carryin)
 
__rv32 vint8m4_t vadc_vvm_i8m4 (vint8m4_t op1, vint8m4_t op2, vmask_t carryin)
 
__rv32 vint8m8_t vadc_vvm_i8m8 (vint8m8_t op1, vint8m8_t op2, vmask_t carryin)
 
__rv32 vint16m1_t vadc_vvm_i16m1 (vint16m1_t op1, vint16m1_t op2, vmask_t carryin)
 
__rv32 vint16m2_t vadc_vvm_i16m2 (vint16m2_t op1, vint16m2_t op2, vmask_t carryin)
 
__rv32 vint16m4_t vadc_vvm_i16m4 (vint16m4_t op1, vint16m4_t op2, vmask_t carryin)
 
__rv32 vint16m8_t vadc_vvm_i16m8 (vint16m8_t op1, vint16m8_t op2, vmask_t carryin)
 
__rv32 vint32m1_t vadc_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vmask_t carryin)
 
__rv32 vint32m2_t vadc_vvm_i32m2 (vint32m2_t op1, vint32m2_t op2, vmask_t carryin)
 
__rv32 vint32m4_t vadc_vvm_i32m4 (vint32m4_t op1, vint32m4_t op2, vmask_t carryin)
 
__rv32 vint32m8_t vadc_vvm_i32m8 (vint32m8_t op1, vint32m8_t op2, vmask_t carryin)
 
__rv32 vuint8m1_t vadc_vvm_u8m1 (vuint8m1_t op1, vuint8m1_t op2, vmask_t carryin)
 
__rv32 vuint8m2_t vadc_vvm_u8m2 (vuint8m2_t op1, vuint8m2_t op2, vmask_t carryin)
 
__rv32 vuint8m4_t vadc_vvm_u8m4 (vuint8m4_t op1, vuint8m4_t op2, vmask_t carryin)
 
__rv32 vuint8m8_t vadc_vvm_u8m8 (vuint8m8_t op1, vuint8m8_t op2, vmask_t carryin)
 
__rv32 vuint16m1_t vadc_vvm_u16m1 (vuint16m1_t op1, vuint16m1_t op2, vmask_t carryin)
 
__rv32 vuint16m2_t vadc_vvm_u16m2 (vuint16m2_t op1, vuint16m2_t op2, vmask_t carryin)
 
__rv32 vuint16m4_t vadc_vvm_u16m4 (vuint16m4_t op1, vuint16m4_t op2, vmask_t carryin)
 
__rv32 vuint16m8_t vadc_vvm_u16m8 (vuint16m8_t op1, vuint16m8_t op2, vmask_t carryin)
 
__rv32 vuint32m1_t vadc_vvm_u32m1 (vuint32m1_t op1, vuint32m1_t op2, vmask_t carryin)
 
__rv32 vuint32m2_t vadc_vvm_u32m2 (vuint32m2_t op1, vuint32m2_t op2, vmask_t carryin)
 
__rv32 vuint32m4_t vadc_vvm_u32m4 (vuint32m4_t op1, vuint32m4_t op2, vmask_t carryin)
 
__rv32 vuint32m8_t vadc_vvm_u32m8 (vuint32m8_t op1, vuint32m8_t op2, vmask_t carryin)
 
__rv32 vint8m1_t vadc_vxm_i8m1 (vint8m1_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vint8m2_t vadc_vxm_i8m2 (vint8m2_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vint8m4_t vadc_vxm_i8m4 (vint8m4_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vint8m8_t vadc_vxm_i8m8 (vint8m8_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vint16m1_t vadc_vxm_i16m1 (vint16m1_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vint16m2_t vadc_vxm_i16m2 (vint16m2_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vint16m4_t vadc_vxm_i16m4 (vint16m4_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vint16m8_t vadc_vxm_i16m8 (vint16m8_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vint32m1_t vadc_vxm_i32m1 (vint32m1_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vint32m2_t vadc_vxm_i32m2 (vint32m2_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vint32m4_t vadc_vxm_i32m4 (vint32m4_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vint32m8_t vadc_vxm_i32m8 (vint32m8_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vuint8m1_t vadc_vxm_u8m1 (vuint8m1_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vuint8m2_t vadc_vxm_u8m2 (vuint8m2_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vuint8m4_t vadc_vxm_u8m4 (vuint8m4_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vuint8m8_t vadc_vxm_u8m8 (vuint8m8_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vuint16m1_t vadc_vxm_u16m1 (vuint16m1_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vuint16m2_t vadc_vxm_u16m2 (vuint16m2_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vuint16m4_t vadc_vxm_u16m4 (vuint16m4_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vuint16m8_t vadc_vxm_u16m8 (vuint16m8_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vuint32m1_t vadc_vxm_u32m1 (vuint32m1_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vuint32m2_t vadc_vxm_u32m2 (vuint32m2_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vuint32m4_t vadc_vxm_u32m4 (vuint32m4_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vuint32m8_t vadc_vxm_u32m8 (vuint32m8_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i8m1 (vint8m1_t op1, vint8m1_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i8m2 (vint8m2_t op1, vint8m2_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i8m4 (vint8m4_t op1, vint8m4_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i8m8 (vint8m8_t op1, vint8m8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i16m1 (vint16m1_t op1, vint16m1_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i16m2 (vint16m2_t op1, vint16m2_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i16m4 (vint16m4_t op1, vint16m4_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i16m8 (vint16m8_t op1, vint16m8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i32m2 (vint32m2_t op1, vint32m2_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i32m4 (vint32m4_t op1, vint32m4_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_i32m8 (vint32m8_t op1, vint32m8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u8m1 (vuint8m1_t op1, vuint8m1_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u8m2 (vuint8m2_t op1, vuint8m2_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u8m4 (vuint8m4_t op1, vuint8m4_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u8m8 (vuint8m8_t op1, vuint8m8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u16m1 (vuint16m1_t op1, vuint16m1_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u16m2 (vuint16m2_t op1, vuint16m2_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u16m4 (vuint16m4_t op1, vuint16m4_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u16m8 (vuint16m8_t op1, vuint16m8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u32m1 (vuint32m1_t op1, vuint32m1_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u32m2 (vuint32m2_t op1, vuint32m2_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u32m4 (vuint32m4_t op1, vuint32m4_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vvm_u32m8 (vuint32m8_t op1, vuint32m8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i8m1 (vint8m1_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i8m2 (vint8m2_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i8m4 (vint8m4_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i8m8 (vint8m8_t op1, int8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i16m1 (vint16m1_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i16m2 (vint16m2_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i16m4 (vint16m4_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i16m8 (vint16m8_t op1, int16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i32m1 (vint32m1_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i32m2 (vint32m2_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i32m4 (vint32m4_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_i32m8 (vint32m8_t op1, int32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u8m1 (vuint8m1_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u8m2 (vuint8m2_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u8m4 (vuint8m4_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u8m8 (vuint8m8_t op1, uint8_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u16m1 (vuint16m1_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u16m2 (vuint16m2_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u16m4 (vuint16m4_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u16m8 (vuint16m8_t op1, uint16_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u32m1 (vuint32m1_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u32m2 (vuint32m2_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u32m4 (vuint32m4_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vxm_u32m8 (vuint32m8_t op1, uint32_t op2, vmask_t carryin)
 
__rv32 vmask_t vmadc_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmadc_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmadc_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmadc_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmadc_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmadc_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmadc_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmadc_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmadc_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmadc_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmadc_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmadc_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmadc_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmadc_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmadc_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmadc_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmadc_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmadc_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmadc_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmadc_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmadc_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmadc_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmadc_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmadc_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmadc_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmadc_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmadc_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmadc_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmadc_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmadc_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmadc_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmadc_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmadc_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmadc_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmadc_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmadc_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmadc_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmadc_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmadc_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmadc_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmadc_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmadc_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmadc_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmadc_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmadc_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmadc_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmadc_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmadc_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vsbc_vvm_i8m1 (vint8m1_t op1, vint8m1_t op2, vmask_t borrowin)
 
__rv32 vint8m2_t vsbc_vvm_i8m2 (vint8m2_t op1, vint8m2_t op2, vmask_t borrowin)
 
__rv32 vint8m4_t vsbc_vvm_i8m4 (vint8m4_t op1, vint8m4_t op2, vmask_t borrowin)
 
__rv32 vint8m8_t vsbc_vvm_i8m8 (vint8m8_t op1, vint8m8_t op2, vmask_t borrowin)
 
__rv32 vint16m1_t vsbc_vvm_i16m1 (vint16m1_t op1, vint16m1_t op2, vmask_t borrowin)
 
__rv32 vint16m2_t vsbc_vvm_i16m2 (vint16m2_t op1, vint16m2_t op2, vmask_t borrowin)
 
__rv32 vint16m4_t vsbc_vvm_i16m4 (vint16m4_t op1, vint16m4_t op2, vmask_t borrowin)
 
__rv32 vint16m8_t vsbc_vvm_i16m8 (vint16m8_t op1, vint16m8_t op2, vmask_t borrowin)
 
__rv32 vint32m1_t vsbc_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vmask_t borrowin)
 
__rv32 vint32m2_t vsbc_vvm_i32m2 (vint32m2_t op1, vint32m2_t op2, vmask_t borrowin)
 
__rv32 vint32m4_t vsbc_vvm_i32m4 (vint32m4_t op1, vint32m4_t op2, vmask_t borrowin)
 
__rv32 vint32m8_t vsbc_vvm_i32m8 (vint32m8_t op1, vint32m8_t op2, vmask_t borrowin)
 
__rv32 vuint8m1_t vsbc_vvm_u8m1 (vuint8m1_t op1, vuint8m1_t op2, vmask_t borrowin)
 
__rv32 vuint8m2_t vsbc_vvm_u8m2 (vuint8m2_t op1, vuint8m2_t op2, vmask_t borrowin)
 
__rv32 vuint8m4_t vsbc_vvm_u8m4 (vuint8m4_t op1, vuint8m4_t op2, vmask_t borrowin)
 
__rv32 vuint8m8_t vsbc_vvm_u8m8 (vuint8m8_t op1, vuint8m8_t op2, vmask_t borrowin)
 
__rv32 vuint16m1_t vsbc_vvm_u16m1 (vuint16m1_t op1, vuint16m1_t op2, vmask_t borrowin)
 
__rv32 vuint16m2_t vsbc_vvm_u16m2 (vuint16m2_t op1, vuint16m2_t op2, vmask_t borrowin)
 
__rv32 vuint16m4_t vsbc_vvm_u16m4 (vuint16m4_t op1, vuint16m4_t op2, vmask_t borrowin)
 
__rv32 vuint16m8_t vsbc_vvm_u16m8 (vuint16m8_t op1, vuint16m8_t op2, vmask_t borrowin)
 
__rv32 vuint32m1_t vsbc_vvm_u32m1 (vuint32m1_t op1, vuint32m1_t op2, vmask_t borrowin)
 
__rv32 vuint32m2_t vsbc_vvm_u32m2 (vuint32m2_t op1, vuint32m2_t op2, vmask_t borrowin)
 
__rv32 vuint32m4_t vsbc_vvm_u32m4 (vuint32m4_t op1, vuint32m4_t op2, vmask_t borrowin)
 
__rv32 vuint32m8_t vsbc_vvm_u32m8 (vuint32m8_t op1, vuint32m8_t op2, vmask_t borrowin)
 
__rv32 vint8m1_t vsbc_vxm_i8m1 (vint8m1_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vint8m2_t vsbc_vxm_i8m2 (vint8m2_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vint8m4_t vsbc_vxm_i8m4 (vint8m4_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vint8m8_t vsbc_vxm_i8m8 (vint8m8_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vint16m1_t vsbc_vxm_i16m1 (vint16m1_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vint16m2_t vsbc_vxm_i16m2 (vint16m2_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vint16m4_t vsbc_vxm_i16m4 (vint16m4_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vint16m8_t vsbc_vxm_i16m8 (vint16m8_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vint32m1_t vsbc_vxm_i32m1 (vint32m1_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vint32m2_t vsbc_vxm_i32m2 (vint32m2_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vint32m4_t vsbc_vxm_i32m4 (vint32m4_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vint32m8_t vsbc_vxm_i32m8 (vint32m8_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vuint8m1_t vsbc_vxm_u8m1 (vuint8m1_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vuint8m2_t vsbc_vxm_u8m2 (vuint8m2_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vuint8m4_t vsbc_vxm_u8m4 (vuint8m4_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vuint8m8_t vsbc_vxm_u8m8 (vuint8m8_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vuint16m1_t vsbc_vxm_u16m1 (vuint16m1_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vuint16m2_t vsbc_vxm_u16m2 (vuint16m2_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vuint16m4_t vsbc_vxm_u16m4 (vuint16m4_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vuint16m8_t vsbc_vxm_u16m8 (vuint16m8_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vuint32m1_t vsbc_vxm_u32m1 (vuint32m1_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vuint32m2_t vsbc_vxm_u32m2 (vuint32m2_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vuint32m4_t vsbc_vxm_u32m4 (vuint32m4_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vuint32m8_t vsbc_vxm_u32m8 (vuint32m8_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i8m1 (vint8m1_t op1, vint8m1_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i8m2 (vint8m2_t op1, vint8m2_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i8m4 (vint8m4_t op1, vint8m4_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i8m8 (vint8m8_t op1, vint8m8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i16m1 (vint16m1_t op1, vint16m1_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i16m2 (vint16m2_t op1, vint16m2_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i16m4 (vint16m4_t op1, vint16m4_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i16m8 (vint16m8_t op1, vint16m8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i32m2 (vint32m2_t op1, vint32m2_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i32m4 (vint32m4_t op1, vint32m4_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_i32m8 (vint32m8_t op1, vint32m8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u8m1 (vuint8m1_t op1, vuint8m1_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u8m2 (vuint8m2_t op1, vuint8m2_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u8m4 (vuint8m4_t op1, vuint8m4_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u8m8 (vuint8m8_t op1, vuint8m8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u16m1 (vuint16m1_t op1, vuint16m1_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u16m2 (vuint16m2_t op1, vuint16m2_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u16m4 (vuint16m4_t op1, vuint16m4_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u16m8 (vuint16m8_t op1, vuint16m8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u32m1 (vuint32m1_t op1, vuint32m1_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u32m2 (vuint32m2_t op1, vuint32m2_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u32m4 (vuint32m4_t op1, vuint32m4_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vvm_u32m8 (vuint32m8_t op1, vuint32m8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i8m1 (vint8m1_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i8m2 (vint8m2_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i8m4 (vint8m4_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i8m8 (vint8m8_t op1, int8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i16m1 (vint16m1_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i16m2 (vint16m2_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i16m4 (vint16m4_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i16m8 (vint16m8_t op1, int16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i32m1 (vint32m1_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i32m2 (vint32m2_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i32m4 (vint32m4_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_i32m8 (vint32m8_t op1, int32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u8m1 (vuint8m1_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u8m2 (vuint8m2_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u8m4 (vuint8m4_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u8m8 (vuint8m8_t op1, uint8_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u16m1 (vuint16m1_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u16m2 (vuint16m2_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u16m4 (vuint16m4_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u16m8 (vuint16m8_t op1, uint16_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u32m1 (vuint32m1_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u32m2 (vuint32m2_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u32m4 (vuint32m4_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vxm_u32m8 (vuint32m8_t op1, uint32_t op2, vmask_t borrowin)
 
__rv32 vmask_t vmsbc_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmsbc_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmsbc_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmsbc_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmsbc_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmsbc_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmsbc_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmsbc_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmsbc_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmsbc_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmsbc_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmsbc_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmsbc_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmsbc_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmsbc_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmsbc_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmsbc_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmsbc_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmsbc_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmsbc_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmsbc_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmsbc_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmsbc_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmsbc_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmsbc_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmsbc_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmsbc_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmsbc_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmsbc_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmsbc_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmsbc_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmsbc_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmsbc_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmsbc_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmsbc_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmsbc_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmsbc_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsbc_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsbc_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsbc_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsbc_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsbc_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsbc_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsbc_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsbc_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsbc_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsbc_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsbc_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vand_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vand_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vand_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vand_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vand_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vand_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vand_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vand_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vand_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vand_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vand_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vand_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vand_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vand_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vand_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vand_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vand_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vand_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vand_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vand_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vand_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vand_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vand_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vand_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vand_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vand_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vand_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vand_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vand_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vand_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vand_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vand_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vand_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vand_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vand_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vand_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vand_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vand_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vand_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vand_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vand_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vand_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vand_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vand_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vand_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vand_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vand_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vand_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vor_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vor_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vor_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vor_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vor_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vor_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vor_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vor_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vor_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vor_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vor_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vor_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vor_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vor_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vor_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vor_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vor_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vor_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vor_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vor_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vor_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vor_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vor_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vor_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vor_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vor_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vor_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vor_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vor_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vor_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vor_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vor_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vor_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vor_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vor_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vor_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vor_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vor_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vor_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vor_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vor_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vor_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vor_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vor_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vor_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vor_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vor_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vor_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vxor_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vxor_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vxor_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vxor_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vxor_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vxor_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vxor_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vxor_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vxor_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vxor_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vxor_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vxor_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vxor_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vxor_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vxor_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vxor_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vxor_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vxor_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vxor_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vxor_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vxor_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vxor_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vxor_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vxor_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vxor_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vxor_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vxor_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vxor_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vxor_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vxor_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vxor_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vxor_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vxor_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vxor_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vxor_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vxor_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vxor_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vxor_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vxor_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vxor_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vxor_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vxor_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vxor_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vxor_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vxor_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vxor_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vxor_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vxor_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vand_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vand_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vand_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vand_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vand_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vand_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vand_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vand_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vand_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vand_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vand_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vand_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vand_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vand_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vand_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vand_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vand_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vand_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vand_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vand_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vand_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vand_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vand_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vand_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vand_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vand_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vand_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vand_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vand_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vand_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vand_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vand_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vand_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vand_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vand_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vand_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vand_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vand_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vand_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vand_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vand_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vand_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vand_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vand_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vand_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vand_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vand_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vand_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vor_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vor_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vor_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vor_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vor_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vor_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vor_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vor_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vor_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vor_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vor_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vor_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vor_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vor_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vor_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vor_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vor_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vor_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vor_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vor_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vor_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vor_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vor_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vor_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vor_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vor_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vor_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vor_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vor_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vor_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vor_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vor_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vor_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vor_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vor_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vor_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vor_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vor_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vor_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vor_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vor_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vor_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vor_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vor_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vor_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vor_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vor_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vor_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vxor_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vxor_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vxor_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vxor_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vxor_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vxor_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vxor_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vxor_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vxor_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vxor_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vxor_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vxor_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vxor_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vxor_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vxor_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vxor_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vxor_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vxor_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vxor_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vxor_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vxor_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vxor_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vxor_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vxor_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vxor_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vxor_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vxor_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vxor_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vxor_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vxor_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vxor_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vxor_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vxor_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vxor_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vxor_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vxor_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vxor_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vxor_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vxor_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vxor_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vxor_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vxor_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vxor_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vxor_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vxor_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vxor_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vxor_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vxor_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vsll_vv_i8m1 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vsll_vv_i8m2 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vsll_vv_i8m4 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vsll_vv_i8m8 (vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vsll_vv_i16m1 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vsll_vv_i16m2 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vsll_vv_i16m4 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vsll_vv_i16m8 (vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vsll_vv_i32m1 (vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vsll_vv_i32m2 (vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vsll_vv_i32m4 (vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vsll_vv_i32m8 (vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vsll_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsll_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsll_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsll_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsll_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsll_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsll_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsll_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsll_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsll_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsll_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsll_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vsll_vx_i8m1 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vsll_vx_i8m2 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vsll_vx_i8m4 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vsll_vx_i8m8 (vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vsll_vx_i16m1 (vint16m1_t op1, uint8_t op2)
 
__rv32 vint16m2_t vsll_vx_i16m2 (vint16m2_t op1, uint8_t op2)
 
__rv32 vint16m4_t vsll_vx_i16m4 (vint16m4_t op1, uint8_t op2)
 
__rv32 vint16m8_t vsll_vx_i16m8 (vint16m8_t op1, uint8_t op2)
 
__rv32 vint32m1_t vsll_vx_i32m1 (vint32m1_t op1, uint8_t op2)
 
__rv32 vint32m2_t vsll_vx_i32m2 (vint32m2_t op1, uint8_t op2)
 
__rv32 vint32m4_t vsll_vx_i32m4 (vint32m4_t op1, uint8_t op2)
 
__rv32 vint32m8_t vsll_vx_i32m8 (vint32m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vsll_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsll_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsll_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsll_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsll_vx_u16m1 (vuint16m1_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vsll_vx_u16m2 (vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vsll_vx_u16m4 (vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vsll_vx_u16m8 (vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m1_t vsll_vx_u32m1 (vuint32m1_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vsll_vx_u32m2 (vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint32m4_t vsll_vx_u32m4 (vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint32m8_t vsll_vx_u32m8 (vuint32m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vsrl_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsrl_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsrl_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsrl_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsrl_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsrl_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsrl_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsrl_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsrl_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsrl_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsrl_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsrl_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vsrl_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsrl_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsrl_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsrl_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsrl_vx_u16m1 (vuint16m1_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vsrl_vx_u16m2 (vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vsrl_vx_u16m4 (vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vsrl_vx_u16m8 (vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m1_t vsrl_vx_u32m1 (vuint32m1_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vsrl_vx_u32m2 (vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint32m4_t vsrl_vx_u32m4 (vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint32m8_t vsrl_vx_u32m8 (vuint32m8_t op1, uint8_t op2)
 
__rv32 vint8m1_t vsra_vv_i8m1 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vsra_vv_i8m2 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vsra_vv_i8m4 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vsra_vv_i8m8 (vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vsra_vv_i16m1 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vsra_vv_i16m2 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vsra_vv_i16m4 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vsra_vv_i16m8 (vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vsra_vv_i32m1 (vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vsra_vv_i32m2 (vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vsra_vv_i32m4 (vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vsra_vv_i32m8 (vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vsra_vx_i8m1 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vsra_vx_i8m2 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vsra_vx_i8m4 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vsra_vx_i8m8 (vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vsra_vx_i16m1 (vint16m1_t op1, uint8_t op2)
 
__rv32 vint16m2_t vsra_vx_i16m2 (vint16m2_t op1, uint8_t op2)
 
__rv32 vint16m4_t vsra_vx_i16m4 (vint16m4_t op1, uint8_t op2)
 
__rv32 vint16m8_t vsra_vx_i16m8 (vint16m8_t op1, uint8_t op2)
 
__rv32 vint32m1_t vsra_vx_i32m1 (vint32m1_t op1, uint8_t op2)
 
__rv32 vint32m2_t vsra_vx_i32m2 (vint32m2_t op1, uint8_t op2)
 
__rv32 vint32m4_t vsra_vx_i32m4 (vint32m4_t op1, uint8_t op2)
 
__rv32 vint32m8_t vsra_vx_i32m8 (vint32m8_t op1, uint8_t op2)
 
__rv32 vint8m1_t vsll_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vsll_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vsll_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vsll_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vsll_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vsll_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vsll_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vsll_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vsll_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vsll_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vsll_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vsll_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vsll_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsll_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsll_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsll_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsll_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsll_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsll_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsll_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsll_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsll_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsll_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsll_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vsll_vx_i8m1_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vsll_vx_i8m2_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vsll_vx_i8m4_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vsll_vx_i8m8_m (vmask_t mask, vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vsll_vx_i16m1_m (vmask_t mask, vint16m1_t op1, uint8_t op2)
 
__rv32 vint16m2_t vsll_vx_i16m2_m (vmask_t mask, vint16m2_t op1, uint8_t op2)
 
__rv32 vint16m4_t vsll_vx_i16m4_m (vmask_t mask, vint16m4_t op1, uint8_t op2)
 
__rv32 vint16m8_t vsll_vx_i16m8_m (vmask_t mask, vint16m8_t op1, uint8_t op2)
 
__rv32 vint32m1_t vsll_vx_i32m1_m (vmask_t mask, vint32m1_t op1, uint8_t op2)
 
__rv32 vint32m2_t vsll_vx_i32m2_m (vmask_t mask, vint32m2_t op1, uint8_t op2)
 
__rv32 vint32m4_t vsll_vx_i32m4_m (vmask_t mask, vint32m4_t op1, uint8_t op2)
 
__rv32 vint32m8_t vsll_vx_i32m8_m (vmask_t mask, vint32m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vsll_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsll_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsll_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsll_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsll_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vsll_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vsll_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vsll_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m1_t vsll_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vsll_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint32m4_t vsll_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint32m8_t vsll_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vsrl_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsrl_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsrl_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsrl_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsrl_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsrl_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsrl_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsrl_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsrl_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsrl_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsrl_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsrl_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vsrl_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsrl_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsrl_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsrl_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsrl_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vsrl_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vsrl_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vsrl_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m1_t vsrl_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vsrl_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint32m4_t vsrl_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint32m8_t vsrl_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint8_t op2)
 
__rv32 vint8m1_t vsra_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vsra_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vsra_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vsra_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vsra_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vsra_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vsra_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vsra_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsra_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsra_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsra_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsra_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vsra_vx_i8m1_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vsra_vx_i8m2_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vsra_vx_i8m4_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vsra_vx_i8m8_m (vmask_t mask, vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vsra_vx_i16m1_m (vmask_t mask, vint16m1_t op1, uint8_t op2)
 
__rv32 vint16m2_t vsra_vx_i16m2_m (vmask_t mask, vint16m2_t op1, uint8_t op2)
 
__rv32 vint16m4_t vsra_vx_i16m4_m (vmask_t mask, vint16m4_t op1, uint8_t op2)
 
__rv32 vint16m8_t vsra_vx_i16m8_m (vmask_t mask, vint16m8_t op1, uint8_t op2)
 
__rv32 vint32m1_t vsra_vx_i32m1_m (vmask_t mask, vint32m1_t op1, uint8_t op2)
 
__rv32 vint32m2_t vsra_vx_i32m2_m (vmask_t mask, vint32m2_t op1, uint8_t op2)
 
__rv32 vint32m4_t vsra_vx_i32m4_m (vmask_t mask, vint32m4_t op1, uint8_t op2)
 
__rv32 vint32m8_t vsra_vx_i32m8_m (vmask_t mask, vint32m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vnsrl_wv_u8m1 (vuint16m2_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnsrl_wv_u8m2 (vuint16m4_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnsrl_wv_u8m4 (vuint16m8_t op1, vuint8m4_t op2)
 
__rv32 vuint16m1_t vnsrl_wv_u16m1 (vuint32m2_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnsrl_wv_u16m2 (vuint32m4_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnsrl_wv_u16m4 (vuint32m8_t op1, vuint16m4_t op2)
 
__rv32 vuint8m1_t vnsrl_wx_u8m1 (vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vnsrl_wx_u8m2 (vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vnsrl_wx_u8m4 (vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vnsrl_wx_u16m1 (vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vnsrl_wx_u16m2 (vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vnsrl_wx_u16m4 (vuint32m8_t op1, uint8_t op2)
 
__rv32 vint8m1_t vnsra_wv_i8m1 (vint16m2_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vnsra_wv_i8m2 (vint16m4_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vnsra_wv_i8m4 (vint16m8_t op1, vuint8m4_t op2)
 
__rv32 vint16m1_t vnsra_wv_i16m1 (vint32m2_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vnsra_wv_i16m2 (vint32m4_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vnsra_wv_i16m4 (vint32m8_t op1, vuint16m4_t op2)
 
__rv32 vint8m1_t vnsra_wx_i8m1 (vint16m2_t op1, uint8_t op2)
 
__rv32 vint8m2_t vnsra_wx_i8m2 (vint16m4_t op1, uint8_t op2)
 
__rv32 vint8m4_t vnsra_wx_i8m4 (vint16m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vnsra_wx_i16m1 (vint32m2_t op1, uint8_t op2)
 
__rv32 vint16m2_t vnsra_wx_i16m2 (vint32m4_t op1, uint8_t op2)
 
__rv32 vint16m4_t vnsra_wx_i16m4 (vint32m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vnsrl_wv_u8m1_m (vmask_t mask, vuint16m2_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnsrl_wv_u8m2_m (vmask_t mask, vuint16m4_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnsrl_wv_u8m4_m (vmask_t mask, vuint16m8_t op1, vuint8m4_t op2)
 
__rv32 vuint16m1_t vnsrl_wv_u16m1_m (vmask_t mask, vuint32m2_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnsrl_wv_u16m2_m (vmask_t mask, vuint32m4_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnsrl_wv_u16m4_m (vmask_t mask, vuint32m8_t op1, vuint16m4_t op2)
 
__rv32 vuint8m1_t vnsrl_wx_u8m1_m (vmask_t mask, vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vnsrl_wx_u8m2_m (vmask_t mask, vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vnsrl_wx_u8m4_m (vmask_t mask, vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vnsrl_wx_u16m1_m (vmask_t mask, vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vnsrl_wx_u16m2_m (vmask_t mask, vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vnsrl_wx_u16m4_m (vmask_t mask, vuint32m8_t op1, uint8_t op2)
 
__rv32 vint8m1_t vnsra_wv_i8m1_m (vmask_t mask, vint16m2_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vnsra_wv_i8m2_m (vmask_t mask, vint16m4_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vnsra_wv_i8m4_m (vmask_t mask, vint16m8_t op1, vuint8m4_t op2)
 
__rv32 vint16m1_t vnsra_wv_i16m1_m (vmask_t mask, vint32m2_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vnsra_wv_i16m2_m (vmask_t mask, vint32m4_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vnsra_wv_i16m4_m (vmask_t mask, vint32m8_t op1, vuint16m4_t op2)
 
__rv32 vint8m1_t vnsra_wx_i8m1_m (vmask_t mask, vint16m2_t op1, uint8_t op2)
 
__rv32 vint8m2_t vnsra_wx_i8m2_m (vmask_t mask, vint16m4_t op1, uint8_t op2)
 
__rv32 vint8m4_t vnsra_wx_i8m4_m (vmask_t mask, vint16m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vnsra_wx_i16m1_m (vmask_t mask, vint32m2_t op1, uint8_t op2)
 
__rv32 vint16m2_t vnsra_wx_i16m2_m (vmask_t mask, vint32m4_t op1, uint8_t op2)
 
__rv32 vint16m4_t vnsra_wx_i16m4_m (vmask_t mask, vint32m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmseq_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmseq_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmseq_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmseq_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmseq_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmseq_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmseq_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmseq_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmseq_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmseq_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmseq_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmseq_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmseq_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmseq_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmseq_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmseq_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmseq_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmseq_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmseq_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmseq_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmseq_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmseq_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmseq_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmseq_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmseq_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmseq_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmsne_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmsne_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmsne_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmsne_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmsne_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmsne_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmsne_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmsne_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmsne_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmsne_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmsne_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmsne_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmsne_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmsne_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmsne_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmsne_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmsne_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmsne_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmsne_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmsne_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmsne_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmsne_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmsne_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmslt_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmslt_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmslt_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmslt_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmslt_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmslt_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmslt_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmslt_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmslt_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmslt_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmslt_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmslt_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmslt_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmslt_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmslt_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsle_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmsle_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmsle_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmsle_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmsle_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmsle_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmsle_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmsle_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmsle_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmsle_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmsle_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmsle_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmsle_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmsle_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmsle_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmseq_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmseq_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmseq_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmseq_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmseq_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmseq_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmseq_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmseq_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmseq_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmseq_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmseq_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmseq_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmseq_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmseq_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmseq_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmseq_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmseq_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmseq_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmseq_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmseq_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmseq_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmseq_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmseq_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmseq_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmseq_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmseq_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmseq_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmseq_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmseq_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmseq_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmseq_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmsne_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmsne_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmsne_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmsne_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmsne_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmsne_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmsne_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmsne_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmsne_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmsne_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmsne_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmsne_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmsne_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmsne_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmsne_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmsne_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmsne_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmsne_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmsne_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmsne_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmsne_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmsne_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmsne_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmsne_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmsne_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmsne_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsne_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsne_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsne_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmsltu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmsltu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmsltu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsltu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmslt_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmslt_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmslt_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmslt_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmslt_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmslt_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmslt_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmslt_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmslt_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmslt_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmslt_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmslt_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmslt_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmslt_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmslt_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmslt_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmslt_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vmask_t vmsleu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vmask_t vmsleu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vmask_t vmsleu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsleu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsle_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vmask_t vmsle_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vmask_t vmsle_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vmask_t vmsle_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vmask_t vmsle_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vmask_t vmsle_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vmask_t vmsle_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vmask_t vmsle_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vmask_t vmsle_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vmask_t vmsle_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vmask_t vmsle_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vmask_t vmsle_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmsle_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmsle_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmsle_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmsle_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmsle_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgtu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vmask_t vmsgt_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vminu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vminu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vminu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vminu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vminu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vminu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vminu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vminu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vminu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vminu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vminu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vminu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vminu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vminu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vminu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vminu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vminu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vminu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vminu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vminu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vminu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vminu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vminu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vminu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmin_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmin_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmin_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmin_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmin_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmin_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmin_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmin_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmin_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmin_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmin_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmin_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vmin_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vmin_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vmin_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vmin_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vmin_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vmin_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vmin_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vmin_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vmin_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vmin_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vmin_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vmin_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vmaxu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmaxu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmaxu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmaxu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmaxu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmaxu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmaxu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmaxu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmaxu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmaxu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmaxu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmaxu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vmaxu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vmaxu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vmaxu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vmaxu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vmaxu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vmaxu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vmaxu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vmaxu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vmaxu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vmaxu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vmaxu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vmaxu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmax_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmax_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmax_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmax_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmax_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmax_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmax_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmax_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmax_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmax_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmax_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmax_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vmax_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vmax_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vmax_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vmax_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vmax_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vmax_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vmax_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vmax_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vmax_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vmax_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vmax_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vmax_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vminu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vminu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vminu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vminu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vminu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vminu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vminu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vminu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vminu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vminu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vminu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vminu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vminu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vminu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vminu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vminu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vminu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vminu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vminu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vminu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vminu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vminu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vminu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vminu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmin_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmin_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmin_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmin_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmin_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmin_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmin_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmin_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmin_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmin_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmin_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmin_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vmin_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vmin_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vmin_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vmin_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vmin_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vmin_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vmin_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vmin_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vmin_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vmin_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vmin_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vmin_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vmaxu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmaxu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmaxu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmaxu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmaxu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmaxu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmaxu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmaxu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmaxu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmaxu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmaxu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmaxu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vmaxu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vmaxu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vmaxu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vmaxu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vmaxu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vmaxu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vmaxu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vmaxu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vmaxu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vmaxu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vmaxu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vmaxu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmax_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmax_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmax_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmax_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmax_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmax_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmax_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmax_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmax_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmax_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmax_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmax_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vmax_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vmax_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vmax_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vmax_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vmax_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vmax_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vmax_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vmax_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vmax_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vmax_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vmax_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vmax_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vint8m1_t vmul_vv_i8m1 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vmul_vv_i8m2 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vmul_vv_i8m4 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vmul_vv_i8m8 (vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vmul_vv_i16m1 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vmul_vv_i16m2 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vmul_vv_i16m4 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vmul_vv_i16m8 (vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vmul_vv_i32m1 (vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vmul_vv_i32m2 (vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vmul_vv_i32m4 (vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vmul_vv_i32m8 (vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vmul_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmul_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmul_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmul_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmul_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmul_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmul_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmul_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmul_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmul_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmul_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmul_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmul_vx_i8m1 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vmul_vx_i8m2 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vmul_vx_i8m4 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vmul_vx_i8m8 (vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vmul_vx_i16m1 (vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vmul_vx_i16m2 (vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vmul_vx_i16m4 (vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vmul_vx_i16m8 (vint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vmul_vx_i32m1 (vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vmul_vx_i32m2 (vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vmul_vx_i32m4 (vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vmul_vx_i32m8 (vint32m8_t op1, uint32_t op2)
 
__rv32 vuint8m1_t vmul_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vmul_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vmul_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vmul_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vmul_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vmul_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vmul_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vmul_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vmul_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vmul_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vmul_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vmul_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmulh_vv_i8m1 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vmulh_vv_i8m2 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vmulh_vv_i8m4 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vmulh_vv_i8m8 (vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vmulh_vv_i16m1 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vmulh_vv_i16m2 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vmulh_vv_i16m4 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vmulh_vv_i16m8 (vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vmulh_vv_i32m1 (vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vmulh_vv_i32m2 (vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vmulh_vv_i32m4 (vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vmulh_vv_i32m8 (vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmulh_vx_i8m1 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vmulh_vx_i8m2 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vmulh_vx_i8m4 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vmulh_vx_i8m8 (vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vmulh_vx_i16m1 (vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vmulh_vx_i16m2 (vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vmulh_vx_i16m4 (vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vmulh_vx_i16m8 (vint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vmulh_vx_i32m1 (vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vmulh_vx_i32m2 (vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vmulh_vx_i32m4 (vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vmulh_vx_i32m8 (vint32m8_t op1, uint32_t op2)
 
__rv32 vuint8m1_t vmulhu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmulhu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmulhu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmulhu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmulhu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmulhu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmulhu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmulhu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmulhu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmulhu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmulhu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmulhu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vmulhu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vmulhu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vmulhu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vmulhu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vmulhu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vmulhu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vmulhu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vmulhu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vmulhu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vmulhu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vmulhu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vmulhu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmulhsu_vv_i8m1 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vmulhsu_vv_i8m2 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vmulhsu_vv_i8m4 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vmulhsu_vv_i8m8 (vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vmulhsu_vv_i16m1 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vmulhsu_vv_i16m2 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vmulhsu_vv_i16m4 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vmulhsu_vv_i16m8 (vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vmulhsu_vv_i32m1 (vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vmulhsu_vv_i32m2 (vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vmulhsu_vv_i32m4 (vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vmulhsu_vv_i32m8 (vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmulhsu_vx_i8m1 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vmulhsu_vx_i8m2 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vmulhsu_vx_i8m4 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vmulhsu_vx_i8m8 (vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vmulhsu_vx_i16m1 (vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vmulhsu_vx_i16m2 (vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vmulhsu_vx_i16m4 (vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vmulhsu_vx_i16m8 (vint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vmulhsu_vx_i32m1 (vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vmulhsu_vx_i32m2 (vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vmulhsu_vx_i32m4 (vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vmulhsu_vx_i32m8 (vint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmul_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vmul_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vmul_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vmul_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vmul_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vmul_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vmul_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vmul_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vmul_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vmul_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vmul_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vmul_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vmul_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmul_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmul_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmul_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmul_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmul_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmul_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmul_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmul_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmul_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmul_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmul_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmul_vx_i8m1_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vmul_vx_i8m2_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vmul_vx_i8m4_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vmul_vx_i8m8_m (vmask_t mask, vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vmul_vx_i16m1_m (vmask_t mask, vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vmul_vx_i16m2_m (vmask_t mask, vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vmul_vx_i16m4_m (vmask_t mask, vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vmul_vx_i16m8_m (vmask_t mask, vint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vmul_vx_i32m1_m (vmask_t mask, vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vmul_vx_i32m2_m (vmask_t mask, vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vmul_vx_i32m4_m (vmask_t mask, vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vmul_vx_i32m8_m (vmask_t mask, vint32m8_t op1, uint32_t op2)
 
__rv32 vuint8m1_t vmul_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vmul_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vmul_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vmul_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vmul_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vmul_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vmul_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vmul_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vmul_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vmul_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vmul_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vmul_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmulh_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vmulh_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vmulh_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vmulh_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vmulh_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vmulh_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vmulh_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vmulh_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vmulh_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vmulh_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vmulh_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vmulh_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmulh_vx_i8m1_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vmulh_vx_i8m2_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vmulh_vx_i8m4_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vmulh_vx_i8m8_m (vmask_t mask, vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vmulh_vx_i16m1_m (vmask_t mask, vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vmulh_vx_i16m2_m (vmask_t mask, vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vmulh_vx_i16m4_m (vmask_t mask, vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vmulh_vx_i16m8_m (vmask_t mask, vint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vmulh_vx_i32m1_m (vmask_t mask, vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vmulh_vx_i32m2_m (vmask_t mask, vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vmulh_vx_i32m4_m (vmask_t mask, vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vmulh_vx_i32m8_m (vmask_t mask, vint32m8_t op1, uint32_t op2)
 
__rv32 vuint8m1_t vmulhu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmulhu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmulhu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmulhu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmulhu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmulhu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmulhu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmulhu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmulhu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmulhu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmulhu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmulhu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vmulhu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vmulhu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vmulhu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vmulhu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vmulhu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vmulhu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vmulhu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vmulhu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vmulhu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vmulhu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vmulhu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vmulhu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vmulhsu_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vmulhsu_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vmulhsu_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vmulhsu_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vmulhsu_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vmulhsu_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vmulhsu_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vmulhsu_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vmulhsu_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vmulhsu_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vmulhsu_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vmulhsu_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmulhsu_vx_i8m1_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vmulhsu_vx_i8m2_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vmulhsu_vx_i8m4_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vmulhsu_vx_i8m8_m (vmask_t mask, vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vmulhsu_vx_i16m1_m (vmask_t mask, vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vmulhsu_vx_i16m2_m (vmask_t mask, vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vmulhsu_vx_i16m4_m (vmask_t mask, vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vmulhsu_vx_i16m8_m (vmask_t mask, vint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vmulhsu_vx_i32m1_m (vmask_t mask, vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vmulhsu_vx_i32m2_m (vmask_t mask, vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vmulhsu_vx_i32m4_m (vmask_t mask, vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vmulhsu_vx_i32m8_m (vmask_t mask, vint32m8_t op1, uint32_t op2)
 
__rv32 vuint8m1_t vdivu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vdivu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vdivu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vdivu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vdivu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vdivu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vdivu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vdivu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vdivu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vdivu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vdivu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vdivu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vdivu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vdivu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vdivu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vdivu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vdivu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vdivu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vdivu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vdivu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vdivu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vdivu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vdivu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vdivu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vdiv_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vdiv_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vdiv_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vdiv_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vdiv_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vdiv_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vdiv_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vdiv_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vdiv_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vdiv_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vdiv_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vdiv_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vdiv_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vdiv_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vdiv_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vdiv_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vdiv_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vdiv_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vdiv_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vdiv_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vdiv_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vdiv_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vdiv_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vdiv_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vremu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vremu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vremu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vremu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vremu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vremu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vremu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vremu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vremu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vremu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vremu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vremu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vremu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vremu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vremu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vremu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vremu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vremu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vremu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vremu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vremu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vremu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vremu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vremu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vrem_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vrem_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vrem_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vrem_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vrem_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vrem_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vrem_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vrem_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vrem_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vrem_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vrem_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vrem_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vrem_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vrem_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vrem_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vrem_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vrem_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vrem_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vrem_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vrem_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vrem_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vrem_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vrem_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vrem_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vdivu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vdivu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vdivu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vdivu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vdivu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vdivu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vdivu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vdivu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vdivu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vdivu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vdivu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vdivu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vdivu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vdivu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vdivu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vdivu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vdivu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vdivu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vdivu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vdivu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vdivu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vdivu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vdivu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vdivu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vdiv_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vdiv_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vdiv_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vdiv_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vdiv_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vdiv_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vdiv_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vdiv_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vdiv_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vdiv_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vdiv_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vdiv_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vdiv_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vdiv_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vdiv_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vdiv_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vdiv_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vdiv_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vdiv_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vdiv_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vdiv_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vdiv_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vdiv_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vdiv_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vremu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vremu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vremu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vremu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vremu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vremu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vremu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vremu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vremu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vremu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vremu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vremu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vremu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vremu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vremu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vremu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vremu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vremu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vremu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vremu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vremu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vremu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vremu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vremu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vrem_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vrem_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vrem_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vrem_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vrem_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vrem_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vrem_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vrem_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vrem_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vrem_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vrem_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vrem_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vrem_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vrem_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vrem_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vrem_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vrem_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vrem_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vrem_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vrem_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vrem_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vrem_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vrem_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vrem_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vint16m2_t vwmul_vv_i16m2 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwmul_vv_i16m4 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwmul_vv_i16m8 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwmul_vv_i32m2 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwmul_vv_i32m4 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwmul_vv_i32m8 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwmul_vx_i16m2 (vint8m1_t op1, int8_t op2)
 
__rv32 vint16m4_t vwmul_vx_i16m4 (vint8m2_t op1, int8_t op2)
 
__rv32 vint16m8_t vwmul_vx_i16m8 (vint8m4_t op1, int8_t op2)
 
__rv32 vint32m2_t vwmul_vx_i32m2 (vint16m1_t op1, int16_t op2)
 
__rv32 vint32m4_t vwmul_vx_i32m4 (vint16m2_t op1, int16_t op2)
 
__rv32 vint32m8_t vwmul_vx_i32m8 (vint16m4_t op1, int16_t op2)
 
__rv32 vuint16m2_t vwmulu_vv_u16m2 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwmulu_vv_u16m4 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwmulu_vv_u16m8 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwmulu_vv_u32m2 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwmulu_vv_u32m4 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwmulu_vv_u32m8 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwmulu_vx_u16m2 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwmulu_vx_u16m4 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwmulu_vx_u16m8 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwmulu_vx_u32m2 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwmulu_vx_u32m4 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwmulu_vx_u32m8 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vint16m2_t vwmulsu_vv_i16m2 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint16m4_t vwmulsu_vv_i16m4 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint16m8_t vwmulsu_vv_i16m8 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint32m2_t vwmulsu_vv_i32m2 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint32m4_t vwmulsu_vv_i32m4 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint32m8_t vwmulsu_vv_i32m8 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m2_t vwmulsu_vx_i16m2 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint16m4_t vwmulsu_vx_i16m4 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint16m8_t vwmulsu_vx_i16m8 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint32m2_t vwmulsu_vx_i32m2 (vint16m1_t op1, uint16_t op2)
 
__rv32 vint32m4_t vwmulsu_vx_i32m4 (vint16m2_t op1, uint16_t op2)
 
__rv32 vint32m8_t vwmulsu_vx_i32m8 (vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m2_t vwmul_vv_i16m2_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwmul_vv_i16m4_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwmul_vv_i16m8_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwmul_vv_i32m2_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwmul_vv_i32m4_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwmul_vv_i32m8_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwmul_vx_i16m2_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint16m4_t vwmul_vx_i16m4_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint16m8_t vwmul_vx_i16m8_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint32m2_t vwmul_vx_i32m2_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint32m4_t vwmul_vx_i32m4_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint32m8_t vwmul_vx_i32m8_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vuint16m2_t vwmulu_vv_u16m2_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwmulu_vv_u16m4_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwmulu_vv_u16m8_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwmulu_vv_u32m2_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwmulu_vv_u32m4_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwmulu_vv_u32m8_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwmulu_vx_u16m2_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vwmulu_vx_u16m4_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vwmulu_vx_u16m8_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vwmulu_vx_u32m2_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint32m4_t vwmulu_vx_u32m4_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint32m8_t vwmulu_vx_u32m8_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vint16m2_t vwmulsu_vv_i16m2_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint16m4_t vwmulsu_vv_i16m4_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint16m8_t vwmulsu_vv_i16m8_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint32m2_t vwmulsu_vv_i32m2_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint32m4_t vwmulsu_vv_i32m4_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint32m8_t vwmulsu_vv_i32m8_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m2_t vwmulsu_vx_i16m2_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint16m4_t vwmulsu_vx_i16m4_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint16m8_t vwmulsu_vx_i16m8_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint32m2_t vwmulsu_vx_i32m2_m (vmask_t mask, vint16m1_t op1, uint16_t op2)
 
__rv32 vint32m4_t vwmulsu_vx_i32m4_m (vmask_t mask, vint16m2_t op1, uint16_t op2)
 
__rv32 vint32m8_t vwmulsu_vx_i32m8_m (vmask_t mask, vint16m4_t op1, uint16_t op2)
 
__rv32 vint8m1_t vmacc_vv_i8m1 (vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmacc_vv_i8m2 (vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmacc_vv_i8m4 (vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmacc_vv_i8m8 (vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmacc_vv_i16m1 (vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmacc_vv_i16m2 (vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmacc_vv_i16m4 (vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmacc_vv_i16m8 (vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmacc_vv_i32m1 (vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmacc_vv_i32m2 (vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmacc_vv_i32m4 (vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmacc_vv_i32m8 (vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmacc_vv_u8m1 (vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmacc_vv_u8m2 (vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmacc_vv_u8m4 (vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmacc_vv_u8m8 (vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmacc_vv_u16m1 (vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmacc_vv_u16m2 (vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmacc_vv_u16m4 (vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmacc_vv_u16m8 (vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmacc_vv_u32m1 (vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmacc_vv_u32m2 (vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmacc_vv_u32m4 (vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmacc_vv_u32m8 (vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmacc_vx_i8m1 (vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmacc_vx_i8m2 (vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmacc_vx_i8m4 (vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmacc_vx_i8m8 (vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmacc_vx_i16m1 (vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmacc_vx_i16m2 (vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmacc_vx_i16m4 (vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmacc_vx_i16m8 (vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmacc_vx_i32m1 (vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmacc_vx_i32m2 (vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmacc_vx_i32m4 (vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmacc_vx_i32m8 (vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmacc_vx_u8m1 (vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmacc_vx_u8m2 (vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmacc_vx_u8m4 (vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmacc_vx_u8m8 (vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmacc_vx_u16m1 (vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmacc_vx_u16m2 (vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmacc_vx_u16m4 (vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmacc_vx_u16m8 (vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmacc_vx_u32m1 (vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmacc_vx_u32m2 (vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmacc_vx_u32m4 (vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmacc_vx_u32m8 (vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsac_vv_i8m1 (vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsac_vv_i8m2 (vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsac_vv_i8m4 (vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsac_vv_i8m8 (vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsac_vv_i16m1 (vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsac_vv_i16m2 (vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsac_vv_i16m4 (vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsac_vv_i16m8 (vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsac_vv_i32m1 (vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsac_vv_i32m2 (vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsac_vv_i32m4 (vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsac_vv_i32m8 (vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsac_vv_u8m1 (vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsac_vv_u8m2 (vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsac_vv_u8m4 (vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsac_vv_u8m8 (vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsac_vv_u16m1 (vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsac_vv_u16m2 (vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsac_vv_u16m4 (vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsac_vv_u16m8 (vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsac_vv_u32m1 (vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsac_vv_u32m2 (vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsac_vv_u32m4 (vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsac_vv_u32m8 (vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsac_vx_i8m1 (vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsac_vx_i8m2 (vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsac_vx_i8m4 (vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsac_vx_i8m8 (vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsac_vx_i16m1 (vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsac_vx_i16m2 (vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsac_vx_i16m4 (vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsac_vx_i16m8 (vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsac_vx_i32m1 (vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsac_vx_i32m2 (vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsac_vx_i32m4 (vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsac_vx_i32m8 (vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsac_vx_u8m1 (vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsac_vx_u8m2 (vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsac_vx_u8m4 (vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsac_vx_u8m8 (vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsac_vx_u16m1 (vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsac_vx_u16m2 (vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsac_vx_u16m4 (vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsac_vx_u16m8 (vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsac_vx_u32m1 (vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsac_vx_u32m2 (vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsac_vx_u32m4 (vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsac_vx_u32m8 (vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmadd_vv_i8m1 (vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmadd_vv_i8m2 (vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmadd_vv_i8m4 (vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmadd_vv_i8m8 (vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmadd_vv_i16m1 (vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmadd_vv_i16m2 (vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmadd_vv_i16m4 (vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmadd_vv_i16m8 (vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmadd_vv_i32m1 (vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmadd_vv_i32m2 (vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmadd_vv_i32m4 (vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmadd_vv_i32m8 (vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmadd_vv_u8m1 (vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmadd_vv_u8m2 (vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmadd_vv_u8m4 (vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmadd_vv_u8m8 (vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmadd_vv_u16m1 (vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmadd_vv_u16m2 (vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmadd_vv_u16m4 (vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmadd_vv_u16m8 (vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmadd_vv_u32m1 (vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmadd_vv_u32m2 (vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmadd_vv_u32m4 (vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmadd_vv_u32m8 (vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmadd_vx_i8m1 (vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmadd_vx_i8m2 (vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmadd_vx_i8m4 (vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmadd_vx_i8m8 (vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmadd_vx_i16m1 (vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmadd_vx_i16m2 (vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmadd_vx_i16m4 (vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmadd_vx_i16m8 (vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmadd_vx_i32m1 (vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmadd_vx_i32m2 (vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmadd_vx_i32m4 (vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmadd_vx_i32m8 (vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmadd_vx_u8m1 (vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmadd_vx_u8m2 (vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmadd_vx_u8m4 (vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmadd_vx_u8m8 (vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmadd_vx_u16m1 (vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmadd_vx_u16m2 (vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmadd_vx_u16m4 (vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmadd_vx_u16m8 (vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmadd_vx_u32m1 (vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmadd_vx_u32m2 (vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmadd_vx_u32m4 (vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmadd_vx_u32m8 (vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsub_vv_i8m1 (vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsub_vv_i8m2 (vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsub_vv_i8m4 (vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsub_vv_i8m8 (vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsub_vv_i16m1 (vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsub_vv_i16m2 (vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsub_vv_i16m4 (vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsub_vv_i16m8 (vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsub_vv_i32m1 (vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsub_vv_i32m2 (vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsub_vv_i32m4 (vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsub_vv_i32m8 (vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsub_vv_u8m1 (vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsub_vv_u8m2 (vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsub_vv_u8m4 (vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsub_vv_u8m8 (vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsub_vv_u16m1 (vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsub_vv_u16m2 (vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsub_vv_u16m4 (vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsub_vv_u16m8 (vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsub_vv_u32m1 (vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsub_vv_u32m2 (vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsub_vv_u32m4 (vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsub_vv_u32m8 (vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsub_vx_i8m1 (vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsub_vx_i8m2 (vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsub_vx_i8m4 (vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsub_vx_i8m8 (vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsub_vx_i16m1 (vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsub_vx_i16m2 (vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsub_vx_i16m4 (vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsub_vx_i16m8 (vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsub_vx_i32m1 (vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsub_vx_i32m2 (vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsub_vx_i32m4 (vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsub_vx_i32m8 (vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsub_vx_u8m1 (vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsub_vx_u8m2 (vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsub_vx_u8m4 (vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsub_vx_u8m8 (vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsub_vx_u16m1 (vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsub_vx_u16m2 (vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsub_vx_u16m4 (vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsub_vx_u16m8 (vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsub_vx_u32m1 (vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsub_vx_u32m2 (vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsub_vx_u32m4 (vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsub_vx_u32m8 (vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmacc_vv_i8m1_m (vmask_t mask, vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmacc_vv_i8m2_m (vmask_t mask, vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmacc_vv_i8m4_m (vmask_t mask, vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmacc_vv_i8m8_m (vmask_t mask, vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmacc_vv_i16m1_m (vmask_t mask, vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmacc_vv_i16m2_m (vmask_t mask, vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmacc_vv_i16m4_m (vmask_t mask, vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmacc_vv_i16m8_m (vmask_t mask, vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmacc_vv_i32m1_m (vmask_t mask, vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmacc_vv_i32m2_m (vmask_t mask, vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmacc_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmacc_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmacc_vv_u8m1_m (vmask_t mask, vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmacc_vv_u8m2_m (vmask_t mask, vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmacc_vv_u8m4_m (vmask_t mask, vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmacc_vv_u8m8_m (vmask_t mask, vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmacc_vv_u16m1_m (vmask_t mask, vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmacc_vv_u16m2_m (vmask_t mask, vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmacc_vv_u16m4_m (vmask_t mask, vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmacc_vv_u16m8_m (vmask_t mask, vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmacc_vv_u32m1_m (vmask_t mask, vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmacc_vv_u32m2_m (vmask_t mask, vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmacc_vv_u32m4_m (vmask_t mask, vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmacc_vv_u32m8_m (vmask_t mask, vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmacc_vx_i8m1_m (vmask_t mask, vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmacc_vx_i8m2_m (vmask_t mask, vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmacc_vx_i8m4_m (vmask_t mask, vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmacc_vx_i8m8_m (vmask_t mask, vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmacc_vx_i16m1_m (vmask_t mask, vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmacc_vx_i16m2_m (vmask_t mask, vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmacc_vx_i16m4_m (vmask_t mask, vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmacc_vx_i16m8_m (vmask_t mask, vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmacc_vx_i32m1_m (vmask_t mask, vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmacc_vx_i32m2_m (vmask_t mask, vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmacc_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmacc_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmacc_vx_u8m1_m (vmask_t mask, vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmacc_vx_u8m2_m (vmask_t mask, vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmacc_vx_u8m4_m (vmask_t mask, vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmacc_vx_u8m8_m (vmask_t mask, vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmacc_vx_u16m1_m (vmask_t mask, vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmacc_vx_u16m2_m (vmask_t mask, vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmacc_vx_u16m4_m (vmask_t mask, vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmacc_vx_u16m8_m (vmask_t mask, vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmacc_vx_u32m1_m (vmask_t mask, vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmacc_vx_u32m2_m (vmask_t mask, vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmacc_vx_u32m4_m (vmask_t mask, vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmacc_vx_u32m8_m (vmask_t mask, vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsac_vv_i8m1_m (vmask_t mask, vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsac_vv_i8m2_m (vmask_t mask, vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsac_vv_i8m4_m (vmask_t mask, vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsac_vv_i8m8_m (vmask_t mask, vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsac_vv_i16m1_m (vmask_t mask, vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsac_vv_i16m2_m (vmask_t mask, vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsac_vv_i16m4_m (vmask_t mask, vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsac_vv_i16m8_m (vmask_t mask, vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsac_vv_i32m1_m (vmask_t mask, vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsac_vv_i32m2_m (vmask_t mask, vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsac_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsac_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsac_vv_u8m1_m (vmask_t mask, vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsac_vv_u8m2_m (vmask_t mask, vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsac_vv_u8m4_m (vmask_t mask, vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsac_vv_u8m8_m (vmask_t mask, vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsac_vv_u16m1_m (vmask_t mask, vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsac_vv_u16m2_m (vmask_t mask, vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsac_vv_u16m4_m (vmask_t mask, vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsac_vv_u16m8_m (vmask_t mask, vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsac_vv_u32m1_m (vmask_t mask, vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsac_vv_u32m2_m (vmask_t mask, vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsac_vv_u32m4_m (vmask_t mask, vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsac_vv_u32m8_m (vmask_t mask, vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsac_vx_i8m1_m (vmask_t mask, vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsac_vx_i8m2_m (vmask_t mask, vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsac_vx_i8m4_m (vmask_t mask, vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsac_vx_i8m8_m (vmask_t mask, vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsac_vx_i16m1_m (vmask_t mask, vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsac_vx_i16m2_m (vmask_t mask, vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsac_vx_i16m4_m (vmask_t mask, vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsac_vx_i16m8_m (vmask_t mask, vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsac_vx_i32m1_m (vmask_t mask, vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsac_vx_i32m2_m (vmask_t mask, vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsac_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsac_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsac_vx_u8m1_m (vmask_t mask, vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsac_vx_u8m2_m (vmask_t mask, vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsac_vx_u8m4_m (vmask_t mask, vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsac_vx_u8m8_m (vmask_t mask, vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsac_vx_u16m1_m (vmask_t mask, vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsac_vx_u16m2_m (vmask_t mask, vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsac_vx_u16m4_m (vmask_t mask, vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsac_vx_u16m8_m (vmask_t mask, vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsac_vx_u32m1_m (vmask_t mask, vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsac_vx_u32m2_m (vmask_t mask, vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsac_vx_u32m4_m (vmask_t mask, vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsac_vx_u32m8_m (vmask_t mask, vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmadd_vv_i8m1_m (vmask_t mask, vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmadd_vv_i8m2_m (vmask_t mask, vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmadd_vv_i8m4_m (vmask_t mask, vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmadd_vv_i8m8_m (vmask_t mask, vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmadd_vv_i16m1_m (vmask_t mask, vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmadd_vv_i16m2_m (vmask_t mask, vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmadd_vv_i16m4_m (vmask_t mask, vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmadd_vv_i16m8_m (vmask_t mask, vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmadd_vv_i32m1_m (vmask_t mask, vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmadd_vv_i32m2_m (vmask_t mask, vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmadd_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmadd_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmadd_vv_u8m1_m (vmask_t mask, vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmadd_vv_u8m2_m (vmask_t mask, vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmadd_vv_u8m4_m (vmask_t mask, vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmadd_vv_u8m8_m (vmask_t mask, vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmadd_vv_u16m1_m (vmask_t mask, vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmadd_vv_u16m2_m (vmask_t mask, vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmadd_vv_u16m4_m (vmask_t mask, vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmadd_vv_u16m8_m (vmask_t mask, vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmadd_vv_u32m1_m (vmask_t mask, vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmadd_vv_u32m2_m (vmask_t mask, vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmadd_vv_u32m4_m (vmask_t mask, vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmadd_vv_u32m8_m (vmask_t mask, vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vmadd_vx_i8m1_m (vmask_t mask, vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmadd_vx_i8m2_m (vmask_t mask, vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmadd_vx_i8m4_m (vmask_t mask, vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmadd_vx_i8m8_m (vmask_t mask, vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmadd_vx_i16m1_m (vmask_t mask, vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmadd_vx_i16m2_m (vmask_t mask, vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmadd_vx_i16m4_m (vmask_t mask, vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmadd_vx_i16m8_m (vmask_t mask, vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmadd_vx_i32m1_m (vmask_t mask, vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmadd_vx_i32m2_m (vmask_t mask, vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmadd_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmadd_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vmadd_vx_u8m1_m (vmask_t mask, vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vmadd_vx_u8m2_m (vmask_t mask, vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vmadd_vx_u8m4_m (vmask_t mask, vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vmadd_vx_u8m8_m (vmask_t mask, vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vmadd_vx_u16m1_m (vmask_t mask, vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vmadd_vx_u16m2_m (vmask_t mask, vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vmadd_vx_u16m4_m (vmask_t mask, vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vmadd_vx_u16m8_m (vmask_t mask, vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vmadd_vx_u32m1_m (vmask_t mask, vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vmadd_vx_u32m2_m (vmask_t mask, vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vmadd_vx_u32m4_m (vmask_t mask, vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vmadd_vx_u32m8_m (vmask_t mask, vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsub_vv_i8m1_m (vmask_t mask, vint8m1_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsub_vv_i8m2_m (vmask_t mask, vint8m2_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsub_vv_i8m4_m (vmask_t mask, vint8m4_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsub_vv_i8m8_m (vmask_t mask, vint8m8_t acc, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsub_vv_i16m1_m (vmask_t mask, vint16m1_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsub_vv_i16m2_m (vmask_t mask, vint16m2_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsub_vv_i16m4_m (vmask_t mask, vint16m4_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsub_vv_i16m8_m (vmask_t mask, vint16m8_t acc, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsub_vv_i32m1_m (vmask_t mask, vint32m1_t acc, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsub_vv_i32m2_m (vmask_t mask, vint32m2_t acc, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsub_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsub_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsub_vv_u8m1_m (vmask_t mask, vuint8m1_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsub_vv_u8m2_m (vmask_t mask, vuint8m2_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsub_vv_u8m4_m (vmask_t mask, vuint8m4_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsub_vv_u8m8_m (vmask_t mask, vuint8m8_t acc, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsub_vv_u16m1_m (vmask_t mask, vuint16m1_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsub_vv_u16m2_m (vmask_t mask, vuint16m2_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsub_vv_u16m4_m (vmask_t mask, vuint16m4_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsub_vv_u16m8_m (vmask_t mask, vuint16m8_t acc, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsub_vv_u32m1_m (vmask_t mask, vuint32m1_t acc, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsub_vv_u32m2_m (vmask_t mask, vuint32m2_t acc, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsub_vv_u32m4_m (vmask_t mask, vuint32m4_t acc, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsub_vv_u32m8_m (vmask_t mask, vuint32m8_t acc, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vnmsub_vx_i8m1_m (vmask_t mask, vint8m1_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnmsub_vx_i8m2_m (vmask_t mask, vint8m2_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnmsub_vx_i8m4_m (vmask_t mask, vint8m4_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vnmsub_vx_i8m8_m (vmask_t mask, vint8m8_t acc, int8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vnmsub_vx_i16m1_m (vmask_t mask, vint16m1_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnmsub_vx_i16m2_m (vmask_t mask, vint16m2_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnmsub_vx_i16m4_m (vmask_t mask, vint16m4_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vnmsub_vx_i16m8_m (vmask_t mask, vint16m8_t acc, int16_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vnmsub_vx_i32m1_m (vmask_t mask, vint32m1_t acc, int32_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vnmsub_vx_i32m2_m (vmask_t mask, vint32m2_t acc, int32_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vnmsub_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int32_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vnmsub_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int32_t op1, vint32m8_t op2)
 
__rv32 vuint8m1_t vnmsub_vx_u8m1_m (vmask_t mask, vuint8m1_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnmsub_vx_u8m2_m (vmask_t mask, vuint8m2_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnmsub_vx_u8m4_m (vmask_t mask, vuint8m4_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vnmsub_vx_u8m8_m (vmask_t mask, vuint8m8_t acc, uint8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vnmsub_vx_u16m1_m (vmask_t mask, vuint16m1_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnmsub_vx_u16m2_m (vmask_t mask, vuint16m2_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnmsub_vx_u16m4_m (vmask_t mask, vuint16m4_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vnmsub_vx_u16m8_m (vmask_t mask, vuint16m8_t acc, uint16_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vnmsub_vx_u32m1_m (vmask_t mask, vuint32m1_t acc, uint32_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vnmsub_vx_u32m2_m (vmask_t mask, vuint32m2_t acc, uint32_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vnmsub_vx_u32m4_m (vmask_t mask, vuint32m4_t acc, uint32_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vnmsub_vx_u32m8_m (vmask_t mask, vuint32m8_t acc, uint32_t op1, vuint32m8_t op2)
 
__rv32 vuint16m2_t vwmaccu_vv_u16m2 (vuint16m2_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwmaccu_vv_u16m4 (vuint16m4_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwmaccu_vv_u16m8 (vuint16m8_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwmaccu_vv_u32m2 (vuint32m2_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwmaccu_vv_u32m4 (vuint32m4_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwmaccu_vv_u32m8 (vuint32m8_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwmaccu_vx_u16m2 (vuint16m2_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwmaccu_vx_u16m4 (vuint16m4_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwmaccu_vx_u16m8 (vuint16m8_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwmaccu_vx_u32m2 (vuint32m2_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwmaccu_vx_u32m4 (vuint32m4_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwmaccu_vx_u32m8 (vuint32m8_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwmacc_vv_i16m2 (vint16m2_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vuint16m4_t vwmacc_vv_i16m4 (vint16m4_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vuint16m8_t vwmacc_vv_i16m8 (vint16m8_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vuint32m2_t vwmacc_vv_i32m2 (vint32m2_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vuint32m4_t vwmacc_vv_i32m4 (vint32m4_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vuint32m8_t vwmacc_vv_i32m8 (vint32m8_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vuint16m2_t vwmacc_vx_i16m2 (vint16m2_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vuint16m4_t vwmacc_vx_i16m4 (vint16m4_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vuint16m8_t vwmacc_vx_i16m8 (vint16m8_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vuint32m2_t vwmacc_vx_i32m2 (vint32m2_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vuint32m4_t vwmacc_vx_i32m4 (vint32m4_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vuint32m8_t vwmacc_vx_i32m8 (vint32m8_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwmaccsu_vv_i16m2 (vint16m2_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwmaccsu_vv_i16m4 (vint16m4_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwmaccsu_vv_i16m8 (vint16m8_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwmaccsu_vv_i32m2 (vint32m2_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwmaccsu_vv_i32m4 (vint32m4_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwmaccsu_vv_i32m8 (vint32m8_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vuint16m2_t vwmaccsu_vx_i16m2 (vint16m2_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vuint16m4_t vwmaccsu_vx_i16m4 (vint16m4_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vuint16m8_t vwmaccsu_vx_i16m8 (vint16m8_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vuint32m2_t vwmaccsu_vx_i32m2 (vint32m2_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vuint32m4_t vwmaccsu_vx_i32m4 (vint32m4_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vuint32m8_t vwmaccsu_vx_i32m8 (vint32m8_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vuint16m2_t vwmaccus_vx_i16m2 (vint16m2_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vuint16m4_t vwmaccus_vx_i16m4 (vint16m4_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vuint16m8_t vwmaccus_vx_i16m8 (vint16m8_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vuint32m2_t vwmaccus_vx_i32m2 (vint32m2_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vuint32m4_t vwmaccus_vx_i32m4 (vint32m4_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vuint32m8_t vwmaccus_vx_i32m8 (vint32m8_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vuint16m2_t vwmaccu_vv_u16m2_m (vmask_t mask, vuint16m2_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwmaccu_vv_u16m4_m (vmask_t mask, vuint16m4_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwmaccu_vv_u16m8_m (vmask_t mask, vuint16m8_t acc, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwmaccu_vv_u32m2_m (vmask_t mask, vuint32m2_t acc, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwmaccu_vv_u32m4_m (vmask_t mask, vuint32m4_t acc, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwmaccu_vv_u32m8_m (vmask_t mask, vuint32m8_t acc, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m2_t vwmaccu_vx_u16m2_m (vmask_t mask, vuint16m2_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint16m4_t vwmaccu_vx_u16m4_m (vmask_t mask, vuint16m4_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vuint16m8_t vwmaccu_vx_u16m8_m (vmask_t mask, vuint16m8_t acc, uint8_t op1, vuint8m4_t op2)
 
__rv32 vuint32m2_t vwmaccu_vx_u32m2_m (vmask_t mask, vuint32m2_t acc, uint16_t op1, vuint16m1_t op2)
 
__rv32 vuint32m4_t vwmaccu_vx_u32m4_m (vmask_t mask, vuint32m4_t acc, uint16_t op1, vuint16m2_t op2)
 
__rv32 vuint32m8_t vwmaccu_vx_u32m8_m (vmask_t mask, vuint32m8_t acc, uint16_t op1, vuint16m4_t op2)
 
__rv32 vint16m2_t vwmacc_vv_i16m2_m (vmask_t mask, vint16m2_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwmacc_vv_i16m4_m (vmask_t mask, vint16m4_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwmacc_vv_i16m8_m (vmask_t mask, vint16m8_t acc, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwmacc_vv_i32m2_m (vmask_t mask, vint32m2_t acc, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwmacc_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwmacc_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwmacc_vx_i16m2_m (vmask_t mask, vint16m2_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwmacc_vx_i16m4_m (vmask_t mask, vint16m4_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwmacc_vx_i16m8_m (vmask_t mask, vint16m8_t acc, int8_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwmacc_vx_i32m2_m (vmask_t mask, vint32m2_t acc, int16_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwmacc_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int16_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwmacc_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int16_t op1, vint16m4_t op2)
 
__rv32 vint16m2_t vwmaccsu_vv_i16m2_m (vmask_t mask, vint16m2_t acc, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint16m4_t vwmaccsu_vv_i16m4_m (vmask_t mask, vint16m4_t acc, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint16m8_t vwmaccsu_vv_i16m8_m (vmask_t mask, vint16m8_t acc, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint32m2_t vwmaccsu_vv_i32m2_m (vmask_t mask, vint32m2_t acc, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint32m4_t vwmaccsu_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint32m8_t vwmaccsu_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m2_t vwmaccsu_vx_i16m2_m (vmask_t mask, vint16m2_t acc, int8_t op1, vuint8m1_t op2)
 
__rv32 vint16m4_t vwmaccsu_vx_i16m4_m (vmask_t mask, vint16m4_t acc, int8_t op1, vuint8m2_t op2)
 
__rv32 vint16m8_t vwmaccsu_vx_i16m8_m (vmask_t mask, vint16m8_t acc, int8_t op1, vuint8m4_t op2)
 
__rv32 vint32m2_t vwmaccsu_vx_i32m2_m (vmask_t mask, vint32m2_t acc, int16_t op1, vuint16m1_t op2)
 
__rv32 vint32m4_t vwmaccsu_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int16_t op1, vuint16m2_t op2)
 
__rv32 vint32m8_t vwmaccsu_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int16_t op1, vuint16m4_t op2)
 
__rv32 vint16m2_t vwmaccus_vx_i16m2_m (vmask_t mask, vint16m2_t acc, uint8_t op1, vint8m1_t op2)
 
__rv32 vint16m4_t vwmaccus_vx_i16m4_m (vmask_t mask, vint16m4_t acc, uint8_t op1, vint8m2_t op2)
 
__rv32 vint16m8_t vwmaccus_vx_i16m8_m (vmask_t mask, vint16m8_t acc, uint8_t op1, vint8m4_t op2)
 
__rv32 vint32m2_t vwmaccus_vx_i32m2_m (vmask_t mask, vint32m2_t acc, uint16_t op1, vint16m1_t op2)
 
__rv32 vint32m4_t vwmaccus_vx_i32m4_m (vmask_t mask, vint32m4_t acc, uint16_t op1, vint16m2_t op2)
 
__rv32 vint32m8_t vwmaccus_vx_i32m8_m (vmask_t mask, vint32m8_t acc, uint16_t op1, vint16m4_t op2)
 
__rv32 vuint32m4_t vqmaccu_vv_u32m4 (vuint32m4_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint32m8_t vqmaccu_vv_u32m8 (vuint32m8_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint32m4_t vqmaccu_vx_u32m4 (vuint32m4_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint32m8_t vqmaccu_vx_u32m8 (vuint32m8_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vint32m4_t vqmacc_vv_i32m4 (vint32m4_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint32m8_t vqmacc_vv_i32m8 (vint32m8_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint32m4_t vqmacc_vx_i32m4 (vint32m4_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint32m8_t vqmacc_vx_i32m8 (vint32m8_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint32m4_t vqmaccsu_vv_i32m4 (vint32m4_t acc, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint32m8_t vqmaccsu_vv_i32m8 (vint32m8_t acc, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint32m4_t vqmaccsu_vx_i32m4 (vint32m4_t acc, int8_t op1, vuint8m1_t op2)
 
__rv32 vint32m8_t vqmaccsu_vx_i32m8 (vint32m8_t acc, int8_t op1, vuint8m2_t op2)
 
__rv32 vint32m4_t vqmaccus_vx_i32m4 (vint32m4_t acc, uint8_t op1, vint8m1_t op2)
 
__rv32 vint32m8_t vqmaccus_vx_i32m8 (vint32m8_t acc, uint8_t op1, vint8m2_t op2)
 
__rv32 vuint32m4_t vqmaccu_vv_u32m4_m (vmask_t mask, vuint32m4_t acc, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint32m8_t vqmaccu_vv_u32m8_m (vmask_t mask, vuint32m8_t acc, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint32m4_t vqmaccu_vx_u32m4_m (vmask_t mask, vuint32m4_t acc, uint8_t op1, vuint8m1_t op2)
 
__rv32 vuint32m8_t vqmaccu_vx_u32m8_m (vmask_t mask, vuint32m8_t acc, uint8_t op1, vuint8m2_t op2)
 
__rv32 vint32m4_t vqmacc_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint32m8_t vqmacc_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint32m4_t vqmacc_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int8_t op1, vint8m1_t op2)
 
__rv32 vint32m8_t vqmacc_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int8_t op1, vint8m2_t op2)
 
__rv32 vint32m4_t vqmaccsu_vv_i32m4_m (vmask_t mask, vint32m4_t acc, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint32m8_t vqmaccsu_vv_i32m8_m (vmask_t mask, vint32m8_t acc, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint32m4_t vqmaccsu_vx_i32m4_m (vmask_t mask, vint32m4_t acc, int8_t op1, vuint8m1_t op2)
 
__rv32 vint32m8_t vqmaccsu_vx_i32m8_m (vmask_t mask, vint32m8_t acc, int8_t op1, vuint8m2_t op2)
 
__rv32 vint32m4_t vqmaccus_vx_i32m4_m (vmask_t mask, vint32m4_t acc, uint8_t op1, vint8m1_t op2)
 
__rv32 vint32m8_t vqmaccus_vx_i32m8_m (vmask_t mask, vint32m8_t acc, uint8_t op1, vint8m2_t op2)
 
__rv32 vint8m1_t vmerge_vvm_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vmerge_vvm_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vmerge_vvm_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vmerge_vvm_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vmerge_vvm_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vmerge_vvm_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vmerge_vvm_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vmerge_vvm_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vmerge_vvm_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vmerge_vvm_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vmerge_vvm_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vmerge_vvm_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vmerge_vxm_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vmerge_vxm_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vmerge_vxm_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vmerge_vxm_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vmerge_vxm_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vmerge_vxm_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vmerge_vxm_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vmerge_vxm_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vmerge_vxm_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vmerge_vxm_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vmerge_vxm_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vmerge_vxm_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vint8m1_t vmv_v_v_i8m1 (vint8m1_t src)
 
__rv32 vint8m2_t vmv_v_v_i8m2 (vint8m2_t src)
 
__rv32 vint8m4_t vmv_v_v_i8m4 (vint8m4_t src)
 
__rv32 vint8m8_t vmv_v_v_i8m8 (vint8m8_t src)
 
__rv32 vint16m1_t vmv_v_v_i16m1 (vint16m1_t src)
 
__rv32 vint16m2_t vmv_v_v_i16m2 (vint16m2_t src)
 
__rv32 vint16m4_t vmv_v_v_i16m4 (vint16m4_t src)
 
__rv32 vint16m8_t vmv_v_v_i16m8 (vint16m8_t src)
 
__rv32 vint32m1_t vmv_v_v_i32m1 (vint32m1_t src)
 
__rv32 vint32m2_t vmv_v_v_i32m2 (vint32m2_t src)
 
__rv32 vint32m4_t vmv_v_v_i32m4 (vint32m4_t src)
 
__rv32 vint32m8_t vmv_v_v_i32m8 (vint32m8_t src)
 
__rv32 vuint8m1_t vmv_v_v_u8m1 (vuint8m1_t src)
 
__rv32 vuint8m2_t vmv_v_v_u8m2 (vuint8m2_t src)
 
__rv32 vuint8m4_t vmv_v_v_u8m4 (vuint8m4_t src)
 
__rv32 vuint8m8_t vmv_v_v_u8m8 (vuint8m8_t src)
 
__rv32 vuint16m1_t vmv_v_v_u16m1 (vuint16m1_t src)
 
__rv32 vuint16m2_t vmv_v_v_u16m2 (vuint16m2_t src)
 
__rv32 vuint16m4_t vmv_v_v_u16m4 (vuint16m4_t src)
 
__rv32 vuint16m8_t vmv_v_v_u16m8 (vuint16m8_t src)
 
__rv32 vuint32m1_t vmv_v_v_u32m1 (vuint32m1_t src)
 
__rv32 vuint32m2_t vmv_v_v_u32m2 (vuint32m2_t src)
 
__rv32 vuint32m4_t vmv_v_v_u32m4 (vuint32m4_t src)
 
__rv32 vuint32m8_t vmv_v_v_u32m8 (vuint32m8_t src)
 
__rv32 vint8m1_t vmv_v_x_i8m1 (int8_t src)
 
__rv32 vint8m2_t vmv_v_x_i8m2 (int8_t src)
 
__rv32 vint8m4_t vmv_v_x_i8m4 (int8_t src)
 
__rv32 vint8m8_t vmv_v_x_i8m8 (int8_t src)
 
__rv32 vint16m1_t vmv_v_x_i16m1 (int16_t src)
 
__rv32 vint16m2_t vmv_v_x_i16m2 (int16_t src)
 
__rv32 vint16m4_t vmv_v_x_i16m4 (int16_t src)
 
__rv32 vint16m8_t vmv_v_x_i16m8 (int16_t src)
 
__rv32 vint32m1_t vmv_v_x_i32m1 (int32_t src)
 
__rv32 vint32m2_t vmv_v_x_i32m2 (int32_t src)
 
__rv32 vint32m4_t vmv_v_x_i32m4 (int32_t src)
 
__rv32 vint32m8_t vmv_v_x_i32m8 (int32_t src)
 
__rv32 vuint8m1_t vmv_v_x_u8m1 (uint8_t src)
 
__rv32 vuint8m2_t vmv_v_x_u8m2 (uint8_t src)
 
__rv32 vuint8m4_t vmv_v_x_u8m4 (uint8_t src)
 
__rv32 vuint8m8_t vmv_v_x_u8m8 (uint8_t src)
 
__rv32 vuint16m1_t vmv_v_x_u16m1 (uint16_t src)
 
__rv32 vuint16m2_t vmv_v_x_u16m2 (uint16_t src)
 
__rv32 vuint16m4_t vmv_v_x_u16m4 (uint16_t src)
 
__rv32 vuint16m8_t vmv_v_x_u16m8 (uint16_t src)
 
__rv32 vuint32m1_t vmv_v_x_u32m1 (uint32_t src)
 
__rv32 vuint32m2_t vmv_v_x_u32m2 (uint32_t src)
 
__rv32 vuint32m4_t vmv_v_x_u32m4 (uint32_t src)
 
__rv32 vuint32m8_t vmv_v_x_u32m8 (uint32_t src)
 
__rv32 vuint8m1_t vsaddu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsaddu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsaddu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsaddu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsaddu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsaddu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsaddu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsaddu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsaddu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsaddu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsaddu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsaddu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vsaddu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsaddu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsaddu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsaddu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsaddu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vsaddu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vsaddu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vsaddu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vsaddu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vsaddu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vsaddu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vsaddu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vsadd_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vsadd_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vsadd_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vsadd_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vsadd_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vsadd_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vsadd_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vsadd_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vsadd_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vsadd_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vsadd_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vsadd_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vsadd_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vsadd_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vsadd_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vsadd_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vsadd_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vsadd_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vsadd_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vsadd_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vsadd_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vsadd_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vsadd_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vsadd_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vssubu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vssubu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vssubu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vssubu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vssubu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vssubu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vssubu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vssubu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vssubu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vssubu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vssubu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vssubu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vssubu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vssubu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vssubu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vssubu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vssubu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vssubu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vssubu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vssubu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vssubu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vssubu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vssubu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vssubu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vssub_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vssub_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vssub_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vssub_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vssub_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vssub_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vssub_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vssub_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vssub_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vssub_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vssub_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vssub_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vssub_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vssub_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vssub_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vssub_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vssub_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vssub_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vssub_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vssub_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vssub_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vssub_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vssub_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vssub_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vsaddu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vsaddu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vsaddu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vsaddu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vsaddu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vsaddu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vsaddu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vsaddu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vsaddu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vsaddu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vsaddu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vsaddu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vsaddu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vsaddu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vsaddu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vsaddu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vsaddu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vsaddu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vsaddu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vsaddu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vsaddu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vsaddu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vsaddu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vsaddu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vsadd_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vsadd_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vsadd_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vsadd_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vsadd_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vsadd_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vsadd_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vsadd_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vsadd_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vsadd_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vsadd_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vsadd_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vsadd_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vsadd_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vsadd_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vsadd_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vsadd_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vsadd_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vsadd_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vsadd_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vsadd_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vsadd_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vsadd_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vsadd_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vssubu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vssubu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vssubu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vssubu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vssubu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vssubu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vssubu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vssubu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vssubu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vssubu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vssubu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vssubu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vssubu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vssubu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vssubu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vssubu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vssubu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vssubu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vssubu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vssubu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vssubu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vssubu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vssubu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vssubu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vssub_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vssub_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vssub_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vssub_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vssub_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vssub_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vssub_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vssub_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vssub_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vssub_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vssub_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vssub_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vssub_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vssub_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vssub_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vssub_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vssub_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vssub_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vssub_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vssub_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vssub_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vssub_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vssub_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vssub_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vaaddu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vaaddu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vaaddu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vaaddu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vaaddu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vaaddu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vaaddu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vaaddu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vaaddu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vaaddu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vaaddu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vaaddu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vaaddu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vaaddu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vaaddu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vaaddu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vaaddu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vaaddu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vaaddu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vaaddu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vaaddu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vaaddu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vaaddu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vaaddu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vaadd_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vaadd_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vaadd_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vaadd_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vaadd_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vaadd_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vaadd_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vaadd_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vaadd_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vaadd_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vaadd_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vaadd_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vaadd_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vaadd_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vaadd_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vaadd_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vaadd_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vaadd_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vaadd_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vaadd_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vuint32m1_t vaadd_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vuint32m2_t vaadd_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vuint32m4_t vaadd_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vuint32m8_t vaadd_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vasubu_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vasubu_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vasubu_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vasubu_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vasubu_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vasubu_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vasubu_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vasubu_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vasubu_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vasubu_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vasubu_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vasubu_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vasubu_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vasubu_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vasubu_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vasubu_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vasubu_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vasubu_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vasubu_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vasubu_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vasubu_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vasubu_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vasubu_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vasubu_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vasub_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vasub_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vasub_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vasub_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vasub_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vasub_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vasub_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vasub_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vasub_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vasub_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vasub_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vasub_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vasub_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vasub_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vasub_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vasub_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vasub_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vasub_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vasub_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vasub_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vuint32m1_t vasub_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vuint32m2_t vasub_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vuint32m4_t vasub_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vuint32m8_t vasub_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vaaddu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vaaddu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vaaddu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vaaddu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vaaddu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vaaddu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vaaddu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vaaddu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vaaddu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vaaddu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vaaddu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vaaddu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vaaddu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vaaddu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vaaddu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vaaddu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vaaddu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vaaddu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vaaddu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vaaddu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vaaddu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vaaddu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vaaddu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vaaddu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vaadd_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vaadd_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vaadd_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vaadd_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vaadd_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vaadd_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vaadd_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vaadd_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vaadd_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vaadd_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vaadd_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vaadd_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vaadd_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vaadd_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vaadd_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vaadd_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vaadd_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vaadd_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vaadd_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vaadd_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vaadd_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vaadd_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vaadd_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vaadd_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vasubu_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vasubu_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vasubu_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vasubu_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vasubu_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vasubu_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vasubu_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vasubu_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vasubu_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vasubu_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vasubu_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vasubu_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vasubu_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vasubu_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vasubu_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vasubu_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vasubu_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vasubu_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vasubu_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vasubu_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vasubu_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vasubu_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vasubu_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vasubu_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vasub_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vasub_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vasub_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vasub_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vasub_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vasub_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vasub_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vasub_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vasub_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vasub_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vasub_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vasub_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vasub_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vasub_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vasub_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vasub_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vasub_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vasub_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vasub_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vasub_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vasub_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vasub_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vasub_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vasub_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vint8m1_t vsmul_vv_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vsmul_vv_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vsmul_vv_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vsmul_vv_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vsmul_vv_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vsmul_vv_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vsmul_vv_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vsmul_vv_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vsmul_vv_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vsmul_vv_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vsmul_vv_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vsmul_vv_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vsmul_vx_i8m1 (vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vsmul_vx_i8m2 (vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vsmul_vx_i8m4 (vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vsmul_vx_i8m8 (vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vsmul_vx_i16m1 (vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vsmul_vx_i16m2 (vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vsmul_vx_i16m4 (vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vsmul_vx_i16m8 (vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vsmul_vx_i32m1 (vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vsmul_vx_i32m2 (vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vsmul_vx_i32m4 (vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vsmul_vx_i32m8 (vint32m8_t op1, int32_t op2)
 
__rv32 vint8m1_t vsmul_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vsmul_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vsmul_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vsmul_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vint16m1_t vsmul_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vsmul_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vsmul_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vsmul_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vint32m1_t vsmul_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vsmul_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vsmul_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vsmul_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vint8m1_t vsmul_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int8_t op2)
 
__rv32 vint8m2_t vsmul_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int8_t op2)
 
__rv32 vint8m4_t vsmul_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int8_t op2)
 
__rv32 vint8m8_t vsmul_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vsmul_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int16_t op2)
 
__rv32 vint16m2_t vsmul_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int16_t op2)
 
__rv32 vint16m4_t vsmul_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int16_t op2)
 
__rv32 vint16m8_t vsmul_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int16_t op2)
 
__rv32 vint32m1_t vsmul_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t op2)
 
__rv32 vint32m2_t vsmul_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t op2)
 
__rv32 vint32m4_t vsmul_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t op2)
 
__rv32 vint32m8_t vsmul_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t op2)
 
__rv32 vuint8m1_t vssrl_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vssrl_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vssrl_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vssrl_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vssrl_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vssrl_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vssrl_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vssrl_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vssrl_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vssrl_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vssrl_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vssrl_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vssrl_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vssrl_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vssrl_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vssrl_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vssrl_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vssrl_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vssrl_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vssrl_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vuint32m1_t vssrl_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vssrl_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vssrl_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vssrl_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vssra_vv_i8m1 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vssra_vv_i8m2 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vssra_vv_i8m4 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vssra_vv_i8m8 (vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vssra_vv_i16m1 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vssra_vv_i16m2 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vssra_vv_i16m4 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vssra_vv_i16m8 (vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vssra_vv_i32m1 (vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vssra_vv_i32m2 (vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vssra_vv_i32m4 (vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vssra_vv_i32m8 (vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vssra_vx_i8m1 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vssra_vx_i8m2 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vssra_vx_i8m4 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vssra_vx_i8m8 (vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vssra_vx_i16m1 (vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vssra_vx_i16m2 (vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vssra_vx_i16m4 (vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vssra_vx_i16m8 (vint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vssra_vx_i32m1 (vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vssra_vx_i32m2 (vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vssra_vx_i32m4 (vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vssra_vx_i32m8 (vint32m8_t op1, uint32_t op2)
 
__rv32 vuint8m1_t vssrl_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vssrl_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vssrl_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vssrl_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint16m1_t vssrl_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vssrl_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vssrl_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vssrl_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint32m1_t vssrl_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vssrl_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vssrl_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vssrl_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint8m1_t vssrl_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vssrl_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vssrl_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vssrl_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vssrl_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vssrl_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vssrl_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint16m8_t vssrl_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint32m1_t vssrl_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint8_t op2)
 
__rv32 vuint32m2_t vssrl_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint32m4_t vssrl_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint32m8_t vssrl_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint8_t op2)
 
__rv32 vint8m1_t vssra_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vssra_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vssra_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vssra_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vssra_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vssra_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vssra_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vssra_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vssra_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vssra_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vssra_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vssra_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vssra_vx_i8m1_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vssra_vx_i8m2_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vssra_vx_i8m4_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vssra_vx_i8m8_m (vmask_t mask, vint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vssra_vx_i16m1_m (vmask_t mask, vint16m1_t op1, uint8_t op2)
 
__rv32 vint16m2_t vssra_vx_i16m2_m (vmask_t mask, vint16m2_t op1, uint8_t op2)
 
__rv32 vint16m4_t vssra_vx_i16m4_m (vmask_t mask, vint16m4_t op1, uint8_t op2)
 
__rv32 vint16m8_t vssra_vx_i16m8_m (vmask_t mask, vint16m8_t op1, uint8_t op2)
 
__rv32 vint32m1_t vssra_vx_i32m1_m (vmask_t mask, vint32m1_t op1, uint8_t op2)
 
__rv32 vint32m2_t vssra_vx_i32m2_m (vmask_t mask, vint32m2_t op1, uint8_t op2)
 
__rv32 vint32m4_t vssra_vx_i32m4_m (vmask_t mask, vint32m4_t op1, uint8_t op2)
 
__rv32 vint32m8_t vssra_vx_i32m8_m (vmask_t mask, vint32m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vnclipu_wv_u8m1 (vuint16m2_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnclipu_wv_u8m2 (vuint16m4_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnclipu_wv_u8m4 (vuint16m8_t op1, vuint8m4_t op2)
 
__rv32 vuint16m1_t vnclipu_wv_u16m1 (vuint32m2_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnclipu_wv_u16m2 (vuint32m4_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnclipu_wv_u16m4 (vuint32m8_t op1, vuint16m4_t op2)
 
__rv32 vuint8m1_t vnclipu_wx_u8m1 (vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vnclipu_wx_u8m2 (vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vnclipu_wx_u8m4 (vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vnclipu_wx_u16m1 (vuint32m2_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vnclipu_wx_u16m2 (vuint32m4_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vnclipu_wx_u16m4 (vuint32m8_t op1, uint16_t op2)
 
__rv32 vint8m1_t vnclip_wv_i8m1 (vint16m2_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnclip_wv_i8m2 (vint16m4_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnclip_wv_i8m4 (vint16m8_t op1, vint8m4_t op2)
 
__rv32 vint16m1_t vnclip_wv_i16m1 (vint32m2_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnclip_wv_i16m2 (vint32m4_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnclip_wv_i16m4 (vint32m8_t op1, vint16m4_t op2)
 
__rv32 vint8m1_t vnclip_wx_i8m1 (vint16m2_t op1, int8_t op2)
 
__rv32 vint8m2_t vnclip_wx_i8m2 (vint16m4_t op1, int8_t op2)
 
__rv32 vint8m4_t vnclip_wx_i8m4 (vint16m8_t op1, int8_t op2)
 
__rv32 vint16m1_t vnclip_wx_i16m1 (vint32m2_t op1, int16_t op2)
 
__rv32 vint16m2_t vnclip_wx_i16m2 (vint32m4_t op1, int16_t op2)
 
__rv32 vint16m4_t vnclip_wx_i16m4 (vint32m8_t op1, int16_t op2)
 
__rv32 vuint8m1_t vnclipu_wv_u8m1_m (vmask_t mask, vuint16m2_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vnclipu_wv_u8m2_m (vmask_t mask, vuint16m4_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vnclipu_wv_u8m4_m (vmask_t mask, vuint16m8_t op1, vuint8m4_t op2)
 
__rv32 vuint16m1_t vnclipu_wv_u16m1_m (vmask_t mask, vuint32m2_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vnclipu_wv_u16m2_m (vmask_t mask, vuint32m4_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vnclipu_wv_u16m4_m (vmask_t mask, vuint32m8_t op1, vuint16m4_t op2)
 
__rv32 vuint8m1_t vnclipu_wx_u8m1_m (vmask_t mask, vuint16m2_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vnclipu_wx_u8m2_m (vmask_t mask, vuint16m4_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vnclipu_wx_u8m4_m (vmask_t mask, vuint16m8_t op1, uint8_t op2)
 
__rv32 vuint16m1_t vnclipu_wx_u16m1_m (vmask_t mask, vuint32m2_t op1, uint8_t op2)
 
__rv32 vuint16m2_t vnclipu_wx_u16m2_m (vmask_t mask, vuint32m4_t op1, uint8_t op2)
 
__rv32 vuint16m4_t vnclipu_wx_u16m4_m (vmask_t mask, vuint32m8_t op1, uint8_t op2)
 
__rv32 vint8m1_t vnclip_wv_i8m1_m (vmask_t mask, vint16m2_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vnclip_wv_i8m2_m (vmask_t mask, vint16m4_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vnclip_wv_i8m4_m (vmask_t mask, vint16m8_t op1, vint8m4_t op2)
 
__rv32 vint16m1_t vnclip_wv_i16m1_m (vmask_t mask, vint32m2_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vnclip_wv_i16m2_m (vmask_t mask, vint32m4_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vnclip_wv_i16m4_m (vmask_t mask, vint32m8_t op1, vint16m4_t op2)
 
__rv32 vint8m1_t vnclip_wx_i8m1_m (vmask_t mask, vint16m2_t op1, uint8_t op2)
 
__rv32 vint8m2_t vnclip_wx_i8m2_m (vmask_t mask, vint16m4_t op1, uint8_t op2)
 
__rv32 vint8m4_t vnclip_wx_i8m4_m (vmask_t mask, vint16m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vnclip_wx_i16m1_m (vmask_t mask, vint32m2_t op1, uint8_t op2)
 
__rv32 vint16m2_t vnclip_wx_i16m2_m (vmask_t mask, vint32m4_t op1, uint8_t op2)
 
__rv32 vint16m4_t vnclip_wx_i16m4_m (vmask_t mask, vint32m8_t op1, uint8_t op2)
 
__rv32 vfloat32m1_t vfadd_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfadd_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfadd_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfadd_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfadd_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfadd_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfadd_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfadd_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsub_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsub_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsub_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsub_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsub_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsub_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsub_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsub_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfrsub_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfrsub_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfrsub_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfrsub_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfadd_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfadd_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfadd_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfadd_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfadd_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfadd_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfadd_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfadd_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsub_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsub_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsub_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsub_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsub_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsub_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsub_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsub_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfrsub_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfrsub_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfrsub_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfrsub_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfmul_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmul_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmul_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmul_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmul_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfmul_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfmul_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfmul_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfdiv_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfdiv_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfdiv_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfdiv_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfdiv_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfdiv_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfdiv_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfdiv_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfrdiv_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfrdiv_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfrdiv_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfrdiv_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfmul_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmul_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmul_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmul_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmul_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfmul_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfmul_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfmul_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfdiv_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfdiv_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfdiv_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfdiv_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfdiv_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfdiv_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfdiv_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfdiv_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfrdiv_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfrdiv_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfrdiv_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfrdiv_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfmacc_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmacc_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmacc_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmacc_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmacc_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmacc_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmacc_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmacc_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmacc_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmacc_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmacc_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmacc_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmacc_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmacc_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmacc_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmacc_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsac_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsac_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsac_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsac_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsac_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsac_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsac_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsac_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsac_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsac_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsac_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsac_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsac_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsac_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsac_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsac_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmadd_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmadd_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmadd_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmadd_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmadd_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmadd_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmadd_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmadd_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmadd_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmadd_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmadd_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmadd_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmadd_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmadd_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmadd_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmadd_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsub_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsub_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsub_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsub_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsub_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsub_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsub_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsub_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsub_vv_f32m1 (vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsub_vv_f32m2 (vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsub_vv_f32m4 (vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsub_vv_f32m8 (vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsub_vf_f32m1 (vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsub_vf_f32m2 (vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsub_vf_f32m4 (vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsub_vf_f32m8 (vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmacc_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmacc_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmacc_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmacc_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmacc_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmacc_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmacc_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmacc_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmacc_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmacc_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmacc_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmacc_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmacc_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmacc_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmacc_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmacc_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsac_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsac_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsac_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsac_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsac_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsac_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsac_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsac_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsac_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsac_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsac_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsac_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsac_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsac_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsac_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsac_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmadd_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmadd_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmadd_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmadd_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmadd_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmadd_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmadd_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmadd_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmadd_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmadd_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmadd_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmadd_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmadd_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmadd_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmadd_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmadd_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsub_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsub_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsub_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsub_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmsub_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmsub_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmsub_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmsub_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsub_vv_f32m1_m (vmask_t mask, vfloat32m1_t acc, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsub_vv_f32m2_m (vmask_t mask, vfloat32m2_t acc, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsub_vv_f32m4_m (vmask_t mask, vfloat32m4_t acc, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsub_vv_f32m8_m (vmask_t mask, vfloat32m8_t acc, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfnmsub_vf_f32m1_m (vmask_t mask, vfloat32m1_t acc, float32_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfnmsub_vf_f32m2_m (vmask_t mask, vfloat32m2_t acc, float32_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfnmsub_vf_f32m4_m (vmask_t mask, vfloat32m4_t acc, float32_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfnmsub_vf_f32m8_m (vmask_t mask, vfloat32m8_t acc, float32_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsqrt_v_f32m1 (vfloat32m1_t op1)
 
__rv32 vfloat32m2_t vfsqrt_v_f32m2 (vfloat32m2_t op1)
 
__rv32 vfloat32m4_t vfsqrt_v_f32m4 (vfloat32m4_t op1)
 
__rv32 vfloat32m8_t vfsqrt_v_f32m8 (vfloat32m8_t op1)
 
__rv32 vfloat32m1_t vfsqrt_v_f32m1_m (vmask_t mask, vfloat32m1_t op1)
 
__rv32 vfloat32m2_t vfsqrt_v_f32m2_m (vmask_t mask, vfloat32m2_t op1)
 
__rv32 vfloat32m4_t vfsqrt_v_f32m4_m (vmask_t mask, vfloat32m4_t op1)
 
__rv32 vfloat32m8_t vfsqrt_v_f32m8_m (vmask_t mask, vfloat32m8_t op1)
 
__rv32 vfloat32m1_t vfmin_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmin_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmin_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmin_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmin_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfmin_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfmin_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfmin_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfmax_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmax_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmax_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmax_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmax_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfmax_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfmax_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfmax_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfmin_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmin_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmin_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmin_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmin_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfmin_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfmin_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfmin_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfmax_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfmax_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfmax_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfmax_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfmax_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfmax_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfmax_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfmax_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsgnj_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsgnj_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsgnj_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsgnj_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsgnj_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsgnj_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsgnj_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsgnj_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsgnjn_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsgnjn_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsgnjn_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsgnjn_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsgnjn_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsgnjn_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsgnjn_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsgnjn_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsgnjx_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsgnjx_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsgnjx_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsgnjx_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsgnjx_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsgnjx_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsgnjx_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsgnjx_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsgnj_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsgnj_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsgnj_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsgnj_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsgnj_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsgnj_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsgnj_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsgnj_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsgnjn_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsgnjn_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsgnjn_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsgnjn_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsgnjn_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsgnjn_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsgnjn_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsgnjn_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfsgnjx_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfsgnjx_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfsgnjx_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfsgnjx_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfsgnjx_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfsgnjx_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfsgnjx_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfsgnjx_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmfne_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmfne_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmfne_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmfne_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmflt_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmflt_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmflt_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmflt_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vv_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmfle_vv_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmfle_vv_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmfle_vv_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmfle_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m1 (vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m2 (vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m4 (vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m8 (vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmfeq_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfeq_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmfne_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmfne_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmfne_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmfne_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfne_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmflt_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmflt_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmflt_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmflt_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmflt_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vmask_t vmfle_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vmask_t vmfle_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vmask_t vmfle_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmfle_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfle_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfgt_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m1_m (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m2_m (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m4_m (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vmask_t vmfge_vf_f32m8_m (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vuint32m1_t vfclass_v_f32m1 (vfloat32m1_t op1)
 
__rv32 vuint32m2_t vfclass_v_f32m2 (vfloat32m2_t op1)
 
__rv32 vuint32m4_t vfclass_v_f32m4 (vfloat32m4_t op1)
 
__rv32 vuint32m8_t vfclass_v_f32m8 (vfloat32m8_t op1)
 
__rv32 vuint32m1_t vfclass_v_f32m1_m (vmask_t mask, vfloat32m1_t op1)
 
__rv32 vuint32m2_t vfclass_v_f32m2_m (vmask_t mask, vfloat32m2_t op1)
 
__rv32 vuint32m4_t vfclass_v_f32m4_m (vmask_t mask, vfloat32m4_t op1)
 
__rv32 vuint32m8_t vfclass_v_f32m8_m (vmask_t mask, vfloat32m8_t op1)
 
__rv32 vfloat32m1_t vfmerge_vfm_f32m1 (vmask_t mask, vfloat32m1_t op1, float32_t op2)
 
__rv32 vfloat32m2_t vfmerge_vfm_f32m2 (vmask_t mask, vfloat32m2_t op1, float32_t op2)
 
__rv32 vfloat32m4_t vfmerge_vfm_f32m4 (vmask_t mask, vfloat32m4_t op1, float32_t op2)
 
__rv32 vfloat32m8_t vfmerge_vfm_f32m8 (vmask_t mask, vfloat32m8_t op1, float32_t op2)
 
__rv32 vfloat32m1_t vfmv_v_f32m1 (float32_t op1)
 
__rv32 vfloat32m2_t vfmv_v_f32m2 (float32_t op1)
 
__rv32 vfloat32m4_t vfmv_v_f32m4 (float32_t op1)
 
__rv32 vfloat32m8_t vfmv_v_f32m8 (float32_t op1)
 
__rv32 vuint32m1_t vfcvt_xu_f_v_f32m1 (vfloat32m1_t op1)
 
__rv32 vuint32m2_t vfcvt_xu_f_v_f32m2 (vfloat32m2_t op1)
 
__rv32 vuint32m4_t vfcvt_xu_f_v_f32m4 (vfloat32m4_t op1)
 
__rv32 vuint32m8_t vfcvt_xu_f_v_f32m8 (vfloat32m8_t op1)
 
__rv32 vint32m1_t vfcvt_x_f_v_f32m1 (vfloat32m1_t op1)
 
__rv32 vint32m2_t vfcvt_x_f_v_f32m2 (vfloat32m2_t op1)
 
__rv32 vint32m4_t vfcvt_x_f_v_f32m4 (vfloat32m4_t op1)
 
__rv32 vint32m8_t vfcvt_x_f_v_f32m8 (vfloat32m8_t op1)
 
__rv32 vfloat32m1_t vfcvt_f_xu_v_u32m1 (vuint32m1_t op1)
 
__rv32 vfloat32m2_t vfcvt_f_xu_v_u32m2 (vuint32m2_t op1)
 
__rv32 vfloat32m4_t vfcvt_f_xu_v_u32m4 (vuint32m4_t op1)
 
__rv32 vfloat32m8_t vfcvt_f_xu_v_u32m8 (vuint32m8_t op1)
 
__rv32 vfloat32m1_t vfcvt_f_x_v_i32m1 (vint32m1_t op1)
 
__rv32 vfloat32m2_t vfcvt_f_x_v_i32m2 (vint32m2_t op1)
 
__rv32 vfloat32m4_t vfcvt_f_x_v_i32m4 (vint32m4_t op1)
 
__rv32 vfloat32m8_t vfcvt_f_x_v_i32m8 (vint32m8_t op1)
 
__rv32 vuint32m1_t vfcvt_xu_f_v_f32m1_m (vmask_t mask, vfloat32m1_t op1)
 
__rv32 vuint32m2_t vfcvt_xu_f_v_f32m2_m (vmask_t mask, vfloat32m2_t op1)
 
__rv32 vuint32m4_t vfcvt_xu_f_v_f32m4_m (vmask_t mask, vfloat32m4_t op1)
 
__rv32 vuint32m8_t vfcvt_xu_f_v_f32m8_m (vmask_t mask, vfloat32m8_t op1)
 
__rv32 vint32m1_t vfcvt_x_f_v_f32m1_m (vmask_t mask, vfloat32m1_t op1)
 
__rv32 vint32m2_t vfcvt_x_f_v_f32m2_m (vmask_t mask, vfloat32m2_t op1)
 
__rv32 vint32m4_t vfcvt_x_f_v_f32m4_m (vmask_t mask, vfloat32m4_t op1)
 
__rv32 vint32m8_t vfcvt_x_f_v_f32m8_m (vmask_t mask, vfloat32m8_t op1)
 
__rv32 vfloat32m1_t vfcvt_f_xu_v_u32m1_m (vmask_t mask, vuint32m1_t op1)
 
__rv32 vfloat32m2_t vfcvt_f_xu_v_u32m2_m (vmask_t mask, vuint32m2_t op1)
 
__rv32 vfloat32m4_t vfcvt_f_xu_v_u32m4_m (vmask_t mask, vuint32m4_t op1)
 
__rv32 vfloat32m8_t vfcvt_f_xu_v_u32m8_m (vmask_t mask, vuint32m8_t op1)
 
__rv32 vfloat32m1_t vfcvt_f_x_v_i32m1_m (vmask_t mask, vint32m1_t op1)
 
__rv32 vfloat32m2_t vfcvt_f_x_v_i32m2_m (vmask_t mask, vint32m2_t op1)
 
__rv32 vfloat32m4_t vfcvt_f_x_v_i32m4_m (vmask_t mask, vint32m4_t op1)
 
__rv32 vfloat32m8_t vfcvt_f_x_v_i32m8_m (vmask_t mask, vint32m8_t op1)
 
__rv32 vfloat32m2_t vfwcvt_f_xu_v_u16m1 (vuint16m1_t op1)
 
__rv32 vfloat32m4_t vfwcvt_f_xu_v_u16m2 (vuint16m2_t op1)
 
__rv32 vfloat32m8_t vfwcvt_f_xu_v_u16m4 (vuint16m4_t op1)
 
__rv32 vfloat32m2_t vfwcvt_f_x_v_i16m1 (vint16m1_t op1)
 
__rv32 vfloat32m4_t vfwcvt_f_x_v_i16m2 (vint16m2_t op1)
 
__rv32 vfloat32m8_t vfwcvt_f_x_v_i16m4 (vint16m4_t op1)
 
__rv32 vfloat32m2_t vfwcvt_f_xu_v_u16m1_m (vmask_t mask, vuint16m1_t op1)
 
__rv32 vfloat32m4_t vfwcvt_f_xu_v_u16m2_m (vmask_t mask, vuint16m2_t op1)
 
__rv32 vfloat32m8_t vfwcvt_f_xu_v_u16m4_m (vmask_t mask, vuint16m4_t op1)
 
__rv32 vfloat32m2_t vfwcvt_f_x_v_i16m1_m (vmask_t mask, vint16m1_t op1)
 
__rv32 vfloat32m4_t vfwcvt_f_x_v_i16m2_m (vmask_t mask, vint16m2_t op1)
 
__rv32 vfloat32m8_t vfwcvt_f_x_v_i16m4_m (vmask_t mask, vint16m4_t op1)
 
__rv32 vuint16m1_t vfncvt_xu_f_w_f32m2 (vfloat32m2_t op1)
 
__rv32 vuint16m2_t vfncvt_xu_f_w_f32m4 (vfloat32m4_t op1)
 
__rv32 vuint16m4_t vfncvt_xu_f_w_f32m8 (vfloat32m8_t op1)
 
__rv32 vint16m1_t vfncvt_x_f_w_f32m2 (vfloat32m2_t op1)
 
__rv32 vint16m2_t vfncvt_x_f_w_f32m4 (vfloat32m4_t op1)
 
__rv32 vint16m4_t vfncvt_x_f_w_f32m8 (vfloat32m8_t op1)
 
__rv32 vuint16m1_t vfncvt_xu_f_w_f32m2_m (vmask_t mask, vfloat32m2_t op1)
 
__rv32 vuint16m2_t vfncvt_xu_f_w_f32m4_m (vmask_t mask, vfloat32m4_t op1)
 
__rv32 vuint16m4_t vfncvt_xu_f_w_f32m8_m (vmask_t mask, vfloat32m8_t op1)
 
__rv32 vint16m1_t vfncvt_x_f_w_f32m2_m (vmask_t mask, vfloat32m2_t op1)
 
__rv32 vint16m2_t vfncvt_x_f_w_f32m4_m (vmask_t mask, vfloat32m4_t op1)
 
__rv32 vint16m4_t vfncvt_x_f_w_f32m8_m (vmask_t mask, vfloat32m8_t op1)
 
__rv32 vint8m1_t vredsum_vs_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredsum_vs_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredsum_vs_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredsum_vs_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredsum_vs_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredsum_vs_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredsum_vs_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredsum_vs_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredsum_vs_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredsum_vs_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredsum_vs_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredsum_vs_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredsum_vs_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredsum_vs_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredsum_vs_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredsum_vs_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredsum_vs_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredsum_vs_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredsum_vs_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredsum_vs_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredsum_vs_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredsum_vs_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredsum_vs_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredsum_vs_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredand_vs_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredand_vs_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredand_vs_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredand_vs_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredand_vs_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredand_vs_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredand_vs_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredand_vs_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredand_vs_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredand_vs_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredand_vs_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredand_vs_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredand_vs_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredand_vs_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredand_vs_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredand_vs_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredand_vs_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredand_vs_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredand_vs_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredand_vs_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredand_vs_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredand_vs_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredand_vs_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredand_vs_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredor_vs_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredor_vs_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredor_vs_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredor_vs_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredor_vs_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredor_vs_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredor_vs_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredor_vs_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredor_vs_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredor_vs_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredor_vs_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredor_vs_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredor_vs_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredor_vs_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredor_vs_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredor_vs_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredor_vs_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredor_vs_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredor_vs_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredor_vs_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredor_vs_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredor_vs_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredor_vs_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredor_vs_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredxor_vs_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredxor_vs_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredxor_vs_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredxor_vs_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredxor_vs_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredxor_vs_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredxor_vs_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredxor_vs_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredxor_vs_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredxor_vs_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredxor_vs_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredxor_vs_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredxor_vs_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredxor_vs_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredxor_vs_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredxor_vs_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredxor_vs_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredxor_vs_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredxor_vs_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredxor_vs_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredxor_vs_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredxor_vs_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredxor_vs_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredxor_vs_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredmax_vs_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredmax_vs_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredmax_vs_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredmax_vs_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredmaxu_vs_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredmaxu_vs_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredmaxu_vs_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredmaxu_vs_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredmax_vs_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredmax_vs_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredmax_vs_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredmax_vs_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredmaxu_vs_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredmaxu_vs_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredmaxu_vs_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredmaxu_vs_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredmax_vs_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredmax_vs_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredmax_vs_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredmax_vs_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredmaxu_vs_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredmaxu_vs_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredmaxu_vs_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredmaxu_vs_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredmin_vs_i8m1 (vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredmin_vs_i8m2 (vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredmin_vs_i8m4 (vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredmin_vs_i8m8 (vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredminu_vs_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredminu_vs_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredminu_vs_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredminu_vs_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredmin_vs_i16m1 (vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredmin_vs_i16m2 (vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredmin_vs_i16m4 (vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredmin_vs_i16m8 (vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredminu_vs_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredminu_vs_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredminu_vs_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredminu_vs_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredmin_vs_i32m1 (vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredmin_vs_i32m2 (vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredmin_vs_i32m4 (vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredmin_vs_i32m8 (vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredminu_vs_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredminu_vs_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredminu_vs_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredminu_vs_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredsum_vs_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredsum_vs_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredsum_vs_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredsum_vs_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredsum_vs_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredsum_vs_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredsum_vs_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredsum_vs_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredsum_vs_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredsum_vs_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredsum_vs_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredsum_vs_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredsum_vs_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredsum_vs_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredsum_vs_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredsum_vs_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredsum_vs_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredsum_vs_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredsum_vs_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredsum_vs_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredsum_vs_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredsum_vs_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredsum_vs_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredsum_vs_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredand_vs_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredand_vs_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredand_vs_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredand_vs_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredand_vs_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredand_vs_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredand_vs_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredand_vs_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredand_vs_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredand_vs_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredand_vs_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredand_vs_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredand_vs_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredand_vs_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredand_vs_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredand_vs_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredand_vs_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredand_vs_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredand_vs_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredand_vs_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredand_vs_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredand_vs_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredand_vs_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredand_vs_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredor_vs_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredor_vs_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredor_vs_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredor_vs_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredor_vs_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredor_vs_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredor_vs_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredor_vs_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredor_vs_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredor_vs_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredor_vs_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredor_vs_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredor_vs_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredor_vs_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredor_vs_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredor_vs_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredor_vs_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredor_vs_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredor_vs_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredor_vs_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredor_vs_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredor_vs_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredor_vs_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredor_vs_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredxor_vs_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredxor_vs_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredxor_vs_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredxor_vs_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredxor_vs_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredxor_vs_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredxor_vs_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredxor_vs_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredxor_vs_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredxor_vs_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredxor_vs_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredxor_vs_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredxor_vs_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredxor_vs_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredxor_vs_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredxor_vs_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredxor_vs_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredxor_vs_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredxor_vs_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredxor_vs_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredxor_vs_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredxor_vs_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredxor_vs_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredxor_vs_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredmax_vs_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredmax_vs_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredmax_vs_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredmax_vs_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredmaxu_vs_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredmaxu_vs_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredmaxu_vs_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredmaxu_vs_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredmax_vs_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredmax_vs_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredmax_vs_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredmax_vs_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredmaxu_vs_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredmaxu_vs_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredmaxu_vs_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredmaxu_vs_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredmax_vs_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredmax_vs_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredmax_vs_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredmax_vs_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredmaxu_vs_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredmaxu_vs_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredmaxu_vs_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredmaxu_vs_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vredmin_vs_i8m1_m (vmask_t mask, vint8m1_t op1, vint8m1_t op2)
 
__rv32 vint8m2_t vredmin_vs_i8m2_m (vmask_t mask, vint8m2_t op1, vint8m2_t op2)
 
__rv32 vint8m4_t vredmin_vs_i8m4_m (vmask_t mask, vint8m4_t op1, vint8m4_t op2)
 
__rv32 vint8m8_t vredmin_vs_i8m8_m (vmask_t mask, vint8m8_t op1, vint8m8_t op2)
 
__rv32 vuint8m1_t vredminu_vs_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vredminu_vs_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vredminu_vs_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vredminu_vs_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vredmin_vs_i16m1_m (vmask_t mask, vint16m1_t op1, vint16m1_t op2)
 
__rv32 vint16m2_t vredmin_vs_i16m2_m (vmask_t mask, vint16m2_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vredmin_vs_i16m4_m (vmask_t mask, vint16m4_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vredmin_vs_i16m8_m (vmask_t mask, vint16m8_t op1, vint16m8_t op2)
 
__rv32 vuint16m1_t vredminu_vs_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vredminu_vs_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vredminu_vs_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vredminu_vs_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vredmin_vs_i32m1_m (vmask_t mask, vint32m1_t op1, vint32m1_t op2)
 
__rv32 vint32m2_t vredmin_vs_i32m2_m (vmask_t mask, vint32m2_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vredmin_vs_i32m4_m (vmask_t mask, vint32m4_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vredmin_vs_i32m8_m (vmask_t mask, vint32m8_t op1, vint32m8_t op2)
 
__rv32 vuint32m1_t vredminu_vs_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vredminu_vs_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vredminu_vs_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vredminu_vs_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vint16m2_t vwredsum_vs_i8m1 (vint8m1_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vwredsum_vs_i8m2 (vint8m2_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vwredsum_vs_i8m4 (vint8m4_t op1, vint16m8_t op2)
 
__rv32 vuint16m2_t vwredsumu_vs_u8m1 (vuint8m1_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vwredsumu_vs_u8m2 (vuint8m2_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vwredsumu_vs_u8m4 (vuint8m4_t op1, vuint16m8_t op2)
 
__rv32 vint32m2_t vwredsum_vs_i16m1 (vint16m1_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vwredsum_vs_i16m2 (vint16m2_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vwredsum_vs_i16m4 (vint16m4_t op1, vint32m8_t op2)
 
__rv32 vuint32m2_t vwredsumu_vs_u16m1 (vuint16m1_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vwredsumu_vs_u16m2 (vuint16m2_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vwredsumu_vs_u16m4 (vuint16m4_t op1, vuint32m8_t op2)
 
__rv32 vint16m2_t vwredsum_vs_i8m1_m (vmask_t mask, vint8m1_t op1, vint16m2_t op2)
 
__rv32 vint16m4_t vwredsum_vs_i8m2_m (vmask_t mask, vint8m2_t op1, vint16m4_t op2)
 
__rv32 vint16m8_t vwredsum_vs_i8m4_m (vmask_t mask, vint8m4_t op1, vint16m8_t op2)
 
__rv32 vuint16m2_t vwredsumu_vs_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vwredsumu_vs_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vwredsumu_vs_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint16m8_t op2)
 
__rv32 vint32m2_t vwredsum_vs_i16m1_m (vmask_t mask, vint16m1_t op1, vint32m2_t op2)
 
__rv32 vint32m4_t vwredsum_vs_i16m2_m (vmask_t mask, vint16m2_t op1, vint32m4_t op2)
 
__rv32 vint32m8_t vwredsum_vs_i16m4_m (vmask_t mask, vint16m4_t op1, vint32m8_t op2)
 
__rv32 vuint32m2_t vwredsumu_vs_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vwredsumu_vs_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vwredsumu_vs_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint32m8_t op2)
 
__rv32 vfloat32m1_t vfredosum_vs_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredosum_vs_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredosum_vs_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredosum_vs_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfredsum_vs_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredsum_vs_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredsum_vs_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredsum_vs_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfredmax_vs_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredmax_vs_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredmax_vs_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredmax_vs_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfredmin_vs_f32m1 (vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredmin_vs_f32m2 (vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredmin_vs_f32m4 (vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredmin_vs_f32m8 (vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfredosum_vs_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredosum_vs_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredosum_vs_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredosum_vs_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfredsum_vs_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredsum_vs_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredsum_vs_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredsum_vs_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfredmax_vs_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredmax_vs_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredmax_vs_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredmax_vs_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vfloat32m1_t vfredmin_vs_f32m1_m (vmask_t mask, vfloat32m1_t op1, vfloat32m1_t op2)
 
__rv32 vfloat32m2_t vfredmin_vs_f32m2_m (vmask_t mask, vfloat32m2_t op1, vfloat32m2_t op2)
 
__rv32 vfloat32m4_t vfredmin_vs_f32m4_m (vmask_t mask, vfloat32m4_t op1, vfloat32m4_t op2)
 
__rv32 vfloat32m8_t vfredmin_vs_f32m8_m (vmask_t mask, vfloat32m8_t op1, vfloat32m8_t op2)
 
__rv32 vmask_t vmand_mm (vmask_t op1, vmask_t op2)
 
__rv32 vmask_t vmnand_mm (vmask_t op1, vmask_t op2)
 
__rv32 vmask_t vmandnot_mm (vmask_t op1, vmask_t op2)
 
__rv32 vmask_t vmxor_mm (vmask_t op1, vmask_t op2)
 
__rv32 vmask_t vmor_mm (vmask_t op1, vmask_t op2)
 
__rv32 vmask_t vmnor_mm (vmask_t op1, vmask_t op2)
 
__rv32 vmask_t vmornot_mm (vmask_t op1, vmask_t op2)
 
__rv32 vmask_t vmxnor_mm (vmask_t op1, vmask_t op2)
 
__rv32 uint32_t vpopc_m (vmask_t op1)
 
__rv32 uint32_t vpopc_m_m (vmask_t mask, vmask_t op1)
 
__rv32 uint32_t vfirst_m (vmask_t op1)
 
__rv32 uint32_t vfirst_m_m (vmask_t mask, vmask_t op1)
 
__rv32 vmask_t vmsbf_m (vmask_t op1)
 
__rv32 vmask_t vmsbf_m_m (vmask_t mask, vmask_t op1)
 
__rv32 vmask_t vmsif_m (vmask_t op1)
 
__rv32 vmask_t vmsif_m_m (vmask_t mask, vmask_t op1)
 
__rv32 vmask_t vmsof_m (vmask_t op1)
 
__rv32 vmask_t vmsof_m_m (vmask_t mask, vmask_t op1)
 
__rv32 vmask_t viota_m (vmask_t op1)
 
__rv32 vmask_t viota_m_m (vmask_t mask, vmask_t op1)
 
__rv32 vuint8m1_t vid_v_u8m1 (void)
 
__rv32 vuint8m2_t vid_v_u8m2 (void)
 
__rv32 vuint8m4_t vid_v_u8m4 (void)
 
__rv32 vuint8m8_t vid_v_u8m8 (void)
 
__rv32 vuint16m1_t vid_v_u16m1 (void)
 
__rv32 vuint16m2_t vid_v_u16m2 (void)
 
__rv32 vuint16m4_t vid_v_u16m4 (void)
 
__rv32 vuint16m8_t vid_v_u16m8 (void)
 
__rv32 vuint32m1_t vid_v_u32m1 (void)
 
__rv32 vuint32m2_t vid_v_u32m2 (void)
 
__rv32 vuint32m4_t vid_v_u32m4 (void)
 
__rv32 vuint32m8_t vid_v_u32m8 (void)
 
__rv32 vuint8m1_t vid_v_u8m1_m (vmask_t mask)
 
__rv32 vuint8m2_t vid_v_u8m2_m (vmask_t mask)
 
__rv32 vuint8m4_t vid_v_u8m4_m (vmask_t mask)
 
__rv32 vuint8m8_t vid_v_u8m8_m (vmask_t mask)
 
__rv32 vuint16m1_t vid_v_u16m1_m (vmask_t mask)
 
__rv32 vuint16m2_t vid_v_u16m2_m (vmask_t mask)
 
__rv32 vuint16m4_t vid_v_u16m4_m (vmask_t mask)
 
__rv32 vuint16m8_t vid_v_u16m8_m (vmask_t mask)
 
__rv32 vuint32m1_t vid_v_u32m1_m (vmask_t mask)
 
__rv32 vuint32m2_t vid_v_u32m2_m (vmask_t mask)
 
__rv32 vuint32m4_t vid_v_u32m4_m (vmask_t mask)
 
__rv32 vuint32m8_t vid_v_u32m8_m (vmask_t mask)
 
__rv32 float32_t vfmv_f_s_f32m1 (vfloat32m1_t op1)
 
__rv32 float32_t vfmv_f_s_f32m2 (vfloat32m2_t op1)
 
__rv32 float32_t vfmv_f_s_f32m4 (vfloat32m4_t op1)
 
__rv32 float32_t vfmv_f_s_f32m8 (vfloat32m8_t op1)
 
__rv32 vfloat32m1_t vfmv_s_f_f32m1 (float32_t op1)
 
__rv32 vfloat32m2_t vfmv_s_f_f32m2 (float32_t op1)
 
__rv32 vfloat32m4_t vfmv_s_f_f32m4 (float32_t op1)
 
__rv32 vfloat32m8_t vfmv_s_f_f32m8 (float32_t op1)
 
__rv32 vint8m1_t vslideup_vx_i8m1 (vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslideup_vx_i8m2 (vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslideup_vx_i8m4 (vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslideup_vx_i8m8 (vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslideup_vx_u8m1 (vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslideup_vx_u8m2 (vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslideup_vx_u8m4 (vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslideup_vx_u8m8 (vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslideup_vx_i16m1 (vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslideup_vx_i16m2 (vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslideup_vx_i16m4 (vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslideup_vx_i16m8 (vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslideup_vx_u16m1 (vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslideup_vx_u16m2 (vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslideup_vx_u16m4 (vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslideup_vx_u16m8 (vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslideup_vx_i32m1 (vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslideup_vx_i32m2 (vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslideup_vx_i32m4 (vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslideup_vx_i32m8 (vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslideup_vx_u32m1 (vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslideup_vx_u32m2 (vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslideup_vx_u32m4 (vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslideup_vx_u32m8 (vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslideup_vx_f32m1 (vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslideup_vx_f32m2 (vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslideup_vx_f32m4 (vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslideup_vx_f32m8 (vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vslideup_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslideup_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslideup_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslideup_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslideup_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslideup_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslideup_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslideup_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslideup_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslideup_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslideup_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslideup_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslideup_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslideup_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslideup_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslideup_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslideup_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslideup_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslideup_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslideup_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslideup_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslideup_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslideup_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslideup_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslideup_vx_f32m1_m (vmask_t mask, vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslideup_vx_f32m2_m (vmask_t mask, vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslideup_vx_f32m4_m (vmask_t mask, vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslideup_vx_f32m8_m (vmask_t mask, vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vslidedown_vx_i8m1 (vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslidedown_vx_i8m2 (vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslidedown_vx_i8m4 (vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslidedown_vx_i8m8 (vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslidedown_vx_u8m1 (vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslidedown_vx_u8m2 (vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslidedown_vx_u8m4 (vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslidedown_vx_u8m8 (vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslidedown_vx_i16m1 (vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslidedown_vx_i16m2 (vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslidedown_vx_i16m4 (vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslidedown_vx_i16m8 (vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslidedown_vx_u16m1 (vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslidedown_vx_u16m2 (vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslidedown_vx_u16m4 (vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslidedown_vx_u16m8 (vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslidedown_vx_i32m1 (vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslidedown_vx_i32m2 (vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslidedown_vx_i32m4 (vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslidedown_vx_i32m8 (vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslidedown_vx_u32m1 (vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslidedown_vx_u32m2 (vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslidedown_vx_u32m4 (vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslidedown_vx_u32m8 (vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslidedown_vx_f32m1 (vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslidedown_vx_f32m2 (vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslidedown_vx_f32m4 (vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslidedown_vx_f32m8 (vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vslidedown_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslidedown_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslidedown_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslidedown_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslidedown_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslidedown_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslidedown_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslidedown_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslidedown_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslidedown_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslidedown_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslidedown_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslidedown_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslidedown_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslidedown_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslidedown_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslidedown_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslidedown_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslidedown_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslidedown_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslidedown_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslidedown_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslidedown_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslidedown_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslidedown_vx_f32m1_m (vmask_t mask, vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslidedown_vx_f32m2_m (vmask_t mask, vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslidedown_vx_f32m4_m (vmask_t mask, vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslidedown_vx_f32m8_m (vmask_t mask, vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vslide1up_vx_i8m1 (vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslide1up_vx_i8m2 (vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslide1up_vx_i8m4 (vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslide1up_vx_i8m8 (vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslide1up_vx_u8m1 (vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslide1up_vx_u8m2 (vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslide1up_vx_u8m4 (vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslide1up_vx_u8m8 (vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslide1up_vx_i16m1 (vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslide1up_vx_i16m2 (vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslide1up_vx_i16m4 (vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslide1up_vx_i16m8 (vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslide1up_vx_u16m1 (vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslide1up_vx_u16m2 (vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslide1up_vx_u16m4 (vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslide1up_vx_u16m8 (vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslide1up_vx_i32m1 (vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslide1up_vx_i32m2 (vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslide1up_vx_i32m4 (vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslide1up_vx_i32m8 (vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslide1up_vx_u32m1 (vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslide1up_vx_u32m2 (vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslide1up_vx_u32m4 (vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslide1up_vx_u32m8 (vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslide1up_vx_f32m1 (vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslide1up_vx_f32m2 (vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslide1up_vx_f32m4 (vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslide1up_vx_f32m8 (vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vslide1up_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslide1up_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslide1up_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslide1up_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslide1up_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslide1up_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslide1up_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslide1up_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslide1up_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslide1up_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslide1up_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslide1up_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslide1up_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslide1up_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslide1up_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslide1up_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslide1up_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslide1up_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslide1up_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslide1up_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslide1up_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslide1up_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslide1up_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslide1up_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslide1up_vx_f32m1_m (vmask_t mask, vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslide1up_vx_f32m2_m (vmask_t mask, vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslide1up_vx_f32m4_m (vmask_t mask, vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslide1up_vx_f32m8_m (vmask_t mask, vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vslide1down_vx_i8m1 (vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslide1down_vx_i8m2 (vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslide1down_vx_i8m4 (vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslide1down_vx_i8m8 (vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslide1down_vx_u8m1 (vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslide1down_vx_u8m2 (vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslide1down_vx_u8m4 (vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslide1down_vx_u8m8 (vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslide1down_vx_i16m1 (vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslide1down_vx_i16m2 (vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslide1down_vx_i16m4 (vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslide1down_vx_i16m8 (vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslide1down_vx_u16m1 (vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslide1down_vx_u16m2 (vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslide1down_vx_u16m4 (vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslide1down_vx_u16m8 (vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslide1down_vx_i32m1 (vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslide1down_vx_i32m2 (vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslide1down_vx_i32m4 (vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslide1down_vx_i32m8 (vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslide1down_vx_u32m1 (vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslide1down_vx_u32m2 (vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslide1down_vx_u32m4 (vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslide1down_vx_u32m8 (vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslide1down_vx_f32m1 (vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslide1down_vx_f32m2 (vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslide1down_vx_f32m4 (vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslide1down_vx_f32m8 (vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vslide1down_vx_i8m1_m (vmask_t mask, vint8m1_t op1, int32_t offset)
 
__rv32 vint8m2_t vslide1down_vx_i8m2_m (vmask_t mask, vint8m2_t op1, int32_t offset)
 
__rv32 vint8m4_t vslide1down_vx_i8m4_m (vmask_t mask, vint8m4_t op1, int32_t offset)
 
__rv32 vint8m8_t vslide1down_vx_i8m8_m (vmask_t mask, vint8m8_t op1, int32_t offset)
 
__rv32 vuint8m1_t vslide1down_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint32_t offset)
 
__rv32 vuint8m2_t vslide1down_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint32_t offset)
 
__rv32 vuint8m4_t vslide1down_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint32_t offset)
 
__rv32 vuint8m8_t vslide1down_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint32_t offset)
 
__rv32 vint16m1_t vslide1down_vx_i16m1_m (vmask_t mask, vint16m1_t op1, int32_t offset)
 
__rv32 vint16m2_t vslide1down_vx_i16m2_m (vmask_t mask, vint16m2_t op1, int32_t offset)
 
__rv32 vint16m4_t vslide1down_vx_i16m4_m (vmask_t mask, vint16m4_t op1, int32_t offset)
 
__rv32 vint16m8_t vslide1down_vx_i16m8_m (vmask_t mask, vint16m8_t op1, int32_t offset)
 
__rv32 vuint16m1_t vslide1down_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint32_t offset)
 
__rv32 vuint16m2_t vslide1down_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint32_t offset)
 
__rv32 vuint16m4_t vslide1down_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint32_t offset)
 
__rv32 vuint16m8_t vslide1down_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint32_t offset)
 
__rv32 vint32m1_t vslide1down_vx_i32m1_m (vmask_t mask, vint32m1_t op1, int32_t offset)
 
__rv32 vint32m2_t vslide1down_vx_i32m2_m (vmask_t mask, vint32m2_t op1, int32_t offset)
 
__rv32 vint32m4_t vslide1down_vx_i32m4_m (vmask_t mask, vint32m4_t op1, int32_t offset)
 
__rv32 vint32m8_t vslide1down_vx_i32m8_m (vmask_t mask, vint32m8_t op1, int32_t offset)
 
__rv32 vuint32m1_t vslide1down_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t offset)
 
__rv32 vuint32m2_t vslide1down_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t offset)
 
__rv32 vuint32m4_t vslide1down_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t offset)
 
__rv32 vuint32m8_t vslide1down_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t offset)
 
__rv32 vfloat32m1_t vslide1down_vx_f32m1_m (vmask_t mask, vfloat32m1_t op1, uint32_t offset)
 
__rv32 vfloat32m2_t vslide1down_vx_f32m2_m (vmask_t mask, vfloat32m2_t op1, uint32_t offset)
 
__rv32 vfloat32m4_t vslide1down_vx_f32m4_m (vmask_t mask, vfloat32m4_t op1, uint32_t offset)
 
__rv32 vfloat32m8_t vslide1down_vx_f32m8_m (vmask_t mask, vfloat32m8_t op1, uint32_t offset)
 
__rv32 vint8m1_t vrgather_vv_i8m1 (vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vrgather_vv_i8m2 (vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vrgather_vv_i8m4 (vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vrgather_vv_i8m8 (vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint8m1_t vrgather_vv_u8m1 (vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vrgather_vv_u8m2 (vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vrgather_vv_u8m4 (vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vrgather_vv_u8m8 (vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vrgather_vv_i16m1 (vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vrgather_vv_i16m2 (vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vrgather_vv_i16m4 (vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vrgather_vv_i16m8 (vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint16m1_t vrgather_vv_u16m1 (vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vrgather_vv_u16m2 (vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vrgather_vv_u16m4 (vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vrgather_vv_u16m8 (vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vrgather_vv_i32m1 (vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vrgather_vv_i32m2 (vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vrgather_vv_i32m4 (vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vrgather_vv_i32m8 (vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint32m1_t vrgather_vv_u32m1 (vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vrgather_vv_u32m2 (vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vrgather_vv_u32m4 (vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vrgather_vv_u32m8 (vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vfloat32m1_t vrgather_vv_f32m1 (vfloat32m1_t op1, vuint32m1_t op2)
 
__rv32 vfloat32m2_t vrgather_vv_f32m2 (vfloat32m2_t op1, vuint32m2_t op2)
 
__rv32 vfloat32m4_t vrgather_vv_f32m4 (vfloat32m4_t op1, vuint32m4_t op2)
 
__rv32 vfloat32m8_t vrgather_vv_f32m8 (vfloat32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vrgather_vv_i8m1_m (vmask_t mask, vint8m1_t op1, vuint8m1_t op2)
 
__rv32 vint8m2_t vrgather_vv_i8m2_m (vmask_t mask, vint8m2_t op1, vuint8m2_t op2)
 
__rv32 vint8m4_t vrgather_vv_i8m4_m (vmask_t mask, vint8m4_t op1, vuint8m4_t op2)
 
__rv32 vint8m8_t vrgather_vv_i8m8_m (vmask_t mask, vint8m8_t op1, vuint8m8_t op2)
 
__rv32 vuint8m1_t vrgather_vv_u8m1_m (vmask_t mask, vuint8m1_t op1, vuint8m1_t op2)
 
__rv32 vuint8m2_t vrgather_vv_u8m2_m (vmask_t mask, vuint8m2_t op1, vuint8m2_t op2)
 
__rv32 vuint8m4_t vrgather_vv_u8m4_m (vmask_t mask, vuint8m4_t op1, vuint8m4_t op2)
 
__rv32 vuint8m8_t vrgather_vv_u8m8_m (vmask_t mask, vuint8m8_t op1, vuint8m8_t op2)
 
__rv32 vint16m1_t vrgather_vv_i16m1_m (vmask_t mask, vint16m1_t op1, vuint16m1_t op2)
 
__rv32 vint16m2_t vrgather_vv_i16m2_m (vmask_t mask, vint16m2_t op1, vuint16m2_t op2)
 
__rv32 vint16m4_t vrgather_vv_i16m4_m (vmask_t mask, vint16m4_t op1, vuint16m4_t op2)
 
__rv32 vint16m8_t vrgather_vv_i16m8_m (vmask_t mask, vint16m8_t op1, vuint16m8_t op2)
 
__rv32 vuint16m1_t vrgather_vv_u16m1_m (vmask_t mask, vuint16m1_t op1, vuint16m1_t op2)
 
__rv32 vuint16m2_t vrgather_vv_u16m2_m (vmask_t mask, vuint16m2_t op1, vuint16m2_t op2)
 
__rv32 vuint16m4_t vrgather_vv_u16m4_m (vmask_t mask, vuint16m4_t op1, vuint16m4_t op2)
 
__rv32 vuint16m8_t vrgather_vv_u16m8_m (vmask_t mask, vuint16m8_t op1, vuint16m8_t op2)
 
__rv32 vint32m1_t vrgather_vv_i32m1_m (vmask_t mask, vint32m1_t op1, vuint32m1_t op2)
 
__rv32 vint32m2_t vrgather_vv_i32m2_m (vmask_t mask, vint32m2_t op1, vuint32m2_t op2)
 
__rv32 vint32m4_t vrgather_vv_i32m4_m (vmask_t mask, vint32m4_t op1, vuint32m4_t op2)
 
__rv32 vint32m8_t vrgather_vv_i32m8_m (vmask_t mask, vint32m8_t op1, vuint32m8_t op2)
 
__rv32 vuint32m1_t vrgather_vv_u32m1_m (vmask_t mask, vuint32m1_t op1, vuint32m1_t op2)
 
__rv32 vuint32m2_t vrgather_vv_u32m2_m (vmask_t mask, vuint32m2_t op1, vuint32m2_t op2)
 
__rv32 vuint32m4_t vrgather_vv_u32m4_m (vmask_t mask, vuint32m4_t op1, vuint32m4_t op2)
 
__rv32 vuint32m8_t vrgather_vv_u32m8_m (vmask_t mask, vuint32m8_t op1, vuint32m8_t op2)
 
__rv32 vfloat32m1_t vrgather_vv_f32m1_m (vmask_t mask, vfloat32m1_t op1, vuint32m1_t op2)
 
__rv32 vfloat32m2_t vrgather_vv_f32m2_m (vmask_t mask, vfloat32m2_t op1, vuint32m2_t op2)
 
__rv32 vfloat32m4_t vrgather_vv_f32m4_m (vmask_t mask, vfloat32m4_t op1, vuint32m4_t op2)
 
__rv32 vfloat32m8_t vrgather_vv_f32m8_m (vmask_t mask, vfloat32m8_t op1, vuint32m8_t op2)
 
__rv32 vint8m1_t vrgather_vx_i8m1 (vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vrgather_vx_i8m2 (vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vrgather_vx_i8m4 (vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vrgather_vx_i8m8 (vint8m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vrgather_vx_u8m1 (vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vrgather_vx_u8m2 (vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vrgather_vx_u8m4 (vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vrgather_vx_u8m8 (vuint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vrgather_vx_i16m1 (vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vrgather_vx_i16m2 (vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vrgather_vx_i16m4 (vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vrgather_vx_i16m8 (vint16m8_t op1, uint16_t op2)
 
__rv32 vuint16m1_t vrgather_vx_u16m1 (vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vrgather_vx_u16m2 (vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vrgather_vx_u16m4 (vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vrgather_vx_u16m8 (vuint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vrgather_vx_i32m1 (vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vrgather_vx_i32m2 (vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vrgather_vx_i32m4 (vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vrgather_vx_i32m8 (vint32m8_t op1, uint32_t op2)
 
__rv32 vuint32m1_t vrgather_vx_u32m1 (vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vrgather_vx_u32m2 (vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vrgather_vx_u32m4 (vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vrgather_vx_u32m8 (vuint32m8_t op1, uint32_t op2)
 
__rv32 vfloat32m1_t vrgather_vx_f32m1 (vfloat32m1_t op1, uint32_t op2)
 
__rv32 vfloat32m2_t vrgather_vx_f32m2 (vfloat32m2_t op1, uint32_t op2)
 
__rv32 vfloat32m4_t vrgather_vx_f32m4 (vfloat32m4_t op1, uint32_t op2)
 
__rv32 vfloat32m8_t vrgather_vx_f32m8 (vfloat32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vrgather_vx_i8m1_m (vmask_t mask, vint8m1_t op1, uint8_t op2)
 
__rv32 vint8m2_t vrgather_vx_i8m2_m (vmask_t mask, vint8m2_t op1, uint8_t op2)
 
__rv32 vint8m4_t vrgather_vx_i8m4_m (vmask_t mask, vint8m4_t op1, uint8_t op2)
 
__rv32 vint8m8_t vrgather_vx_i8m8_m (vmask_t mask, vint8m8_t op1, uint8_t op2)
 
__rv32 vuint8m1_t vrgather_vx_u8m1_m (vmask_t mask, vuint8m1_t op1, uint8_t op2)
 
__rv32 vuint8m2_t vrgather_vx_u8m2_m (vmask_t mask, vuint8m2_t op1, uint8_t op2)
 
__rv32 vuint8m4_t vrgather_vx_u8m4_m (vmask_t mask, vuint8m4_t op1, uint8_t op2)
 
__rv32 vuint8m8_t vrgather_vx_u8m8_m (vmask_t mask, vuint8m8_t op1, uint8_t op2)
 
__rv32 vint16m1_t vrgather_vx_i16m1_m (vmask_t mask, vint16m1_t op1, uint16_t op2)
 
__rv32 vint16m2_t vrgather_vx_i16m2_m (vmask_t mask, vint16m2_t op1, uint16_t op2)
 
__rv32 vint16m4_t vrgather_vx_i16m4_m (vmask_t mask, vint16m4_t op1, uint16_t op2)
 
__rv32 vint16m8_t vrgather_vx_i16m8_m (vmask_t mask, vint16m8_t op1, uint16_t op2)
 
__rv32 vuint16m1_t vrgather_vx_u16m1_m (vmask_t mask, vuint16m1_t op1, uint16_t op2)
 
__rv32 vuint16m2_t vrgather_vx_u16m2_m (vmask_t mask, vuint16m2_t op1, uint16_t op2)
 
__rv32 vuint16m4_t vrgather_vx_u16m4_m (vmask_t mask, vuint16m4_t op1, uint16_t op2)
 
__rv32 vuint16m8_t vrgather_vx_u16m8_m (vmask_t mask, vuint16m8_t op1, uint16_t op2)
 
__rv32 vint32m1_t vrgather_vx_i32m1_m (vmask_t mask, vint32m1_t op1, uint32_t op2)
 
__rv32 vint32m2_t vrgather_vx_i32m2_m (vmask_t mask, vint32m2_t op1, uint32_t op2)
 
__rv32 vint32m4_t vrgather_vx_i32m4_m (vmask_t mask, vint32m4_t op1, uint32_t op2)
 
__rv32 vint32m8_t vrgather_vx_i32m8_m (vmask_t mask, vint32m8_t op1, uint32_t op2)
 
__rv32 vuint32m1_t vrgather_vx_u32m1_m (vmask_t mask, vuint32m1_t op1, uint32_t op2)
 
__rv32 vuint32m2_t vrgather_vx_u32m2_m (vmask_t mask, vuint32m2_t op1, uint32_t op2)
 
__rv32 vuint32m4_t vrgather_vx_u32m4_m (vmask_t mask, vuint32m4_t op1, uint32_t op2)
 
__rv32 vuint32m8_t vrgather_vx_u32m8_m (vmask_t mask, vuint32m8_t op1, uint32_t op2)
 
__rv32 vfloat32m1_t vrgather_vx_f32m1_m (vmask_t mask, vfloat32m1_t op1, uint32_t op2)
 
__rv32 vfloat32m2_t vrgather_vx_f32m2_m (vmask_t mask, vfloat32m2_t op1, uint32_t op2)
 
__rv32 vfloat32m4_t vrgather_vx_f32m4_m (vmask_t mask, vfloat32m4_t op1, uint32_t op2)
 
__rv32 vfloat32m8_t vrgather_vx_f32m8_m (vmask_t mask, vfloat32m8_t op1, uint32_t op2)
 
__rv32 vint8m1_t vcompress_vm_i8m1 (vmask_t mask, vint8m1_t op1)
 
__rv32 vint8m2_t vcompress_vm_i8m2 (vmask_t mask, vint8m2_t op1)
 
__rv32 vint8m4_t vcompress_vm_i8m4 (vmask_t mask, vint8m4_t op1)
 
__rv32 vint8m8_t vcompress_vm_i8m8 (vmask_t mask, vint8m8_t op1)
 
__rv32 vuint8m1_t vcompress_vm_u8m1 (vmask_t mask, vuint8m1_t op1)
 
__rv32 vuint8m2_t vcompress_vm_u8m2 (vmask_t mask, vuint8m2_t op1)
 
__rv32 vuint8m4_t vcompress_vm_u8m4 (vmask_t mask, vuint8m4_t op1)
 
__rv32 vuint8m8_t vcompress_vm_u8m8 (vmask_t mask, vuint8m8_t op1)
 
__rv32 vint16m1_t vcompress_vm_i16m1 (vmask_t mask, vint16m1_t op1)
 
__rv32 vint16m2_t vcompress_vm_i16m2 (vmask_t mask, vint16m2_t op1)
 
__rv32 vint16m4_t vcompress_vm_i16m4 (vmask_t mask, vint16m4_t op1)
 
__rv32 vint16m8_t vcompress_vm_i16m8 (vmask_t mask, vint16m8_t op1)
 
__rv32 vuint16m1_t vcompress_vm_u16m1 (vmask_t mask, vuint16m1_t op1)
 
__rv32 vuint16m2_t vcompress_vm_u16m2 (vmask_t mask, vuint16m2_t op1)
 
__rv32 vuint16m4_t vcompress_vm_u16m4 (vmask_t mask, vuint16m4_t op1)
 
__rv32 vuint16m8_t vcompress_vm_u16m8 (vmask_t mask, vuint16m8_t op1)
 
__rv32 vint32m1_t vcompress_vm_i32m1 (vmask_t mask, vint32m1_t op1)
 
__rv32 vint32m2_t vcompress_vm_i32m2 (vmask_t mask, vint32m2_t op1)
 
__rv32 vint32m4_t vcompress_vm_i32m4 (vmask_t mask, vint32m4_t op1)
 
__rv32 vint32m8_t vcompress_vm_i32m8 (vmask_t mask, vint32m8_t op1)
 
__rv32 vuint32m1_t vcompress_vm_u32m1 (vmask_t mask, vuint32m1_t op1)
 
__rv32 vuint32m2_t vcompress_vm_u32m2 (vmask_t mask, vuint32m2_t op1)
 
__rv32 vuint32m4_t vcompress_vm_u32m4 (vmask_t mask, vuint32m4_t op1)
 
__rv32 vuint32m8_t vcompress_vm_u32m8 (vmask_t mask, vuint32m8_t op1)
 
__rv32 vfloat32m1_t vcompress_vm_f32m1 (vmask_t mask, vfloat32m1_t op1)
 
__rv32 vfloat32m2_t vcompress_vm_f32m2 (vmask_t mask, vfloat32m2_t op1)
 
__rv32 vfloat32m4_t vcompress_vm_f32m4 (vmask_t mask, vfloat32m4_t op1)
 
__rv32 vfloat32m8_t vcompress_vm_f32m8 (vmask_t mask, vfloat32m8_t op1)
 

详细描述

COMPILER RISCV-V Intrinsic Reference

版本
riscv-v-spec-0.8 @data 20200716
注意


(C) Compiler Inc in Hunan 湖南卡姆派乐信息科技有限公司

宏定义说明

◆ vadc_vim_i16m1

#define vadc_vim_i16m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vadc_vim_i16m1(op1,op2,carryin);\
__ret;\
})


Produce sum with carry

vadc_vim_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint16m8_t

汇编指令:
vadc.vim vd, vs2, imm, v0

◆ vadc_vim_i16m2

#define vadc_vim_i16m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vadc_vim_i16m2(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i16m4

#define vadc_vim_i16m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vadc_vim_i16m4(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i16m8

#define vadc_vim_i16m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vadc_vim_i16m8(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i32m1

#define vadc_vim_i32m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vadc_vim_i32m1(op1,op2,carryin);\
__ret;\
})


Produce sum with carry

vadc_vim_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint32m8_t

汇编指令:
vadc.vim vd, vs2, imm, v0

◆ vadc_vim_i32m2

#define vadc_vim_i32m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vadc_vim_i32m2(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i32m4

#define vadc_vim_i32m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vadc_vim_i32m4(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i32m8

#define vadc_vim_i32m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vadc_vim_i32m8(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i8m1

#define vadc_vim_i8m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vadc_vim_i8m1(op1,op2,carryin);\
__ret;\
})


Produce sum with carry

vadc_vim_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vint8m8_t

汇编指令:
vadc.vim vd, vs2, imm, v0

◆ vadc_vim_i8m2

#define vadc_vim_i8m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vadc_vim_i8m2(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i8m4

#define vadc_vim_i8m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vadc_vim_i8m4(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_i8m8

#define vadc_vim_i8m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vadc_vim_i8m8(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u16m1

#define vadc_vim_u16m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vadc_vim_u16m1(op1,op2,carryin);\
__ret;\
})


Produce sum with carry

vadc_vim_u16:

LMUL = 1
op1: vuint16m1_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint16m8_t

汇编指令:
vadc.vim vd, vs2, imm, v0

◆ vadc_vim_u16m2

#define vadc_vim_u16m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vadc_vim_u16m2(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u16m4

#define vadc_vim_u16m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vadc_vim_u16m4(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u16m8

#define vadc_vim_u16m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vadc_vim_u16m8(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u32m1

#define vadc_vim_u32m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vadc_vim_u32m1(op1,op2,carryin);\
__ret;\
})


Produce sum with carry

vadc_vim_u32:

LMUL = 1
op1: vuint32m1_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint32m8_t

汇编指令:
vadc.vim vd, vs2, imm, v0

◆ vadc_vim_u32m2

#define vadc_vim_u32m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vadc_vim_u32m2(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u32m4

#define vadc_vim_u32m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vadc_vim_u32m4(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u32m8

#define vadc_vim_u32m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vadc_vim_u32m8(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u8m1

#define vadc_vim_u8m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vadc_vim_u8m1(op1,op2,carryin);\
__ret;\
})


Produce sum with carry

vadc_vim_u8:

LMUL = 1
op1: vuint8m1_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: imm [-16,15]
carryin: vmask_t
返回值: vuint8m8_t

汇编指令:
vadc.vim vd, vs2, imm, v0

◆ vadc_vim_u8m2

#define vadc_vim_u8m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vadc_vim_u8m2(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u8m4

#define vadc_vim_u8m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vadc_vim_u8m4(op1,op2,carryin);\
__ret;\
})

◆ vadc_vim_u8m8

#define vadc_vim_u8m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vadc_vim_u8m8(op1,op2,carryin);\
__ret;\
})

◆ vadd_vi_i16m1

#define vadd_vi_i16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m1(op1,op2);\
__ret;\
})


Integer adds

vadd_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: imm [-16,15]
返回值: vint16m8_t

汇编指令:
vadd.vi vd, vs2, imm

◆ vadd_vi_i16m1_m

#define vadd_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Integer adds(带掩码)

vadd_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: imm [-16,15]
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: imm [-16,15]
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: imm [-16,15]
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: imm [-16,15]
返回值: vint16m8_t

汇编指令:
vadd.vi vd, vs2, imm, vm

◆ vadd_vi_i16m2

#define vadd_vi_i16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m2(op1,op2);\
__ret;\
})

◆ vadd_vi_i16m2_m

#define vadd_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i16m4

#define vadd_vi_i16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m4(op1,op2);\
__ret;\
})

◆ vadd_vi_i16m4_m

#define vadd_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i16m8

#define vadd_vi_i16m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m8(op1,op2);\
__ret;\
})

◆ vadd_vi_i16m8_m

#define vadd_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vadd_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i32m1

#define vadd_vi_i32m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m1(op1,op2);\
__ret;\
})


Integer adds

vadd_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: imm [-16,15]
返回值: vint32m8_t

汇编指令:
vadd.vi vd, vs2, imm

◆ vadd_vi_i32m1_m

#define vadd_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Integer adds(带掩码)

vadd_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: imm [-16,15]
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: imm [-16,15]
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: imm [-16,15]
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: imm [-16,15]
返回值: vint32m8_t

汇编指令:
vadd.vi vd, vs2, imm, vm

◆ vadd_vi_i32m2

#define vadd_vi_i32m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m2(op1,op2);\
__ret;\
})

◆ vadd_vi_i32m2_m

#define vadd_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i32m4

#define vadd_vi_i32m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m4(op1,op2);\
__ret;\
})

◆ vadd_vi_i32m4_m

#define vadd_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i32m8

#define vadd_vi_i32m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m8(op1,op2);\
__ret;\
})

◆ vadd_vi_i32m8_m

#define vadd_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vadd_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i8m1

#define vadd_vi_i8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m1(op1,op2);\
__ret;\
})


Integer adds

vadd_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: imm [-16,15]
返回值: vint8m8_t

汇编指令:
vadd.vi vd, vs2, imm

◆ vadd_vi_i8m1_m

#define vadd_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Integer adds(带掩码)

vadd_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: imm [-16,15]
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: imm [-16,15]
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: imm [-16,15]
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: imm [-16,15]
返回值: vint8m8_t

汇编指令:
vadd.vi vd, vs2, imm, vm

◆ vadd_vi_i8m2

#define vadd_vi_i8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m2(op1,op2);\
__ret;\
})

◆ vadd_vi_i8m2_m

#define vadd_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i8m4

#define vadd_vi_i8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m4(op1,op2);\
__ret;\
})

◆ vadd_vi_i8m4_m

#define vadd_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vadd_vi_i8m8

#define vadd_vi_i8m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m8(op1,op2);\
__ret;\
})

◆ vadd_vi_i8m8_m

#define vadd_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vadd_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i16m1

#define vand_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vand_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL =8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vand.vi vd, vs2, imm

◆ vand_vi_i16m1_m

#define vand_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vand_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vand.vx vd, vs2, imm, vm

◆ vand_vi_i16m2

#define vand_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m2(op1,op2);\
__ret;\
})

◆ vand_vi_i16m2_m

#define vand_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i16m4

#define vand_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m4(op1,op2);\
__ret;\
})

◆ vand_vi_i16m4_m

#define vand_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i16m8

#define vand_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m8(op1,op2);\
__ret;\
})

◆ vand_vi_i16m8_m

#define vand_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vand_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i32m1

#define vand_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vand_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL =8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vand.vi vd, vs2, imm

◆ vand_vi_i32m1_m

#define vand_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vand_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vand.vx vd, vs2, imm, vm

◆ vand_vi_i32m2

#define vand_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m2(op1,op2);\
__ret;\
})

◆ vand_vi_i32m2_m

#define vand_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i32m4

#define vand_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m4(op1,op2);\
__ret;\
})

◆ vand_vi_i32m4_m

#define vand_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i32m8

#define vand_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m8(op1,op2);\
__ret;\
})

◆ vand_vi_i32m8_m

#define vand_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vand_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i8m1

#define vand_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vand_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL =8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vand.vi vd, vs2, imm

◆ vand_vi_i8m1_m

#define vand_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vand_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vand.vx vd, vs2, imm, vm

◆ vand_vi_i8m2

#define vand_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m2(op1,op2);\
__ret;\
})

◆ vand_vi_i8m2_m

#define vand_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i8m4

#define vand_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m4(op1,op2);\
__ret;\
})

◆ vand_vi_i8m4_m

#define vand_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vand_vi_i8m8

#define vand_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m8(op1,op2);\
__ret;\
})

◆ vand_vi_i8m8_m

#define vand_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vand_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmadc_vi_i16m1

#define vmadc_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i16m1(op1,op2);\
__ret;\
})


Produce carry out in mask register format

vmadc_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值: vmask_t

汇编指令:
vmadc.vi vd, vs2, imm

◆ vmadc_vi_i16m2

#define vmadc_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i16m2(op1,op2);\
__ret;\
})

◆ vmadc_vi_i16m4

#define vmadc_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i16m4(op1,op2);\
__ret;\
})

◆ vmadc_vi_i16m8

#define vmadc_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i16m8(op1,op2);\
__ret;\
})

◆ vmadc_vi_i32m1

#define vmadc_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i32m1(op1,op2);\
__ret;\
})


Produce carry out in mask register format

vmadc_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值: vmask_t

汇编指令:
vmadc.vi vd, vs2, imm

◆ vmadc_vi_i32m2

#define vmadc_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i32m2(op1,op2);\
__ret;\
})

◆ vmadc_vi_i32m4

#define vmadc_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i32m4(op1,op2);\
__ret;\
})

◆ vmadc_vi_i32m8

#define vmadc_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i32m8(op1,op2);\
__ret;\
})

◆ vmadc_vi_i8m1

#define vmadc_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i8m1(op1,op2);\
__ret;\
})


Produce carry out in mask register format

vmadc_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值: vmask_t

汇编指令:
vmadc.vi vd, vs2, imm

◆ vmadc_vi_i8m2

#define vmadc_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i8m2(op1,op2);\
__ret;\
})

◆ vmadc_vi_i8m4

#define vmadc_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i8m4(op1,op2);\
__ret;\
})

◆ vmadc_vi_i8m8

#define vmadc_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vi_i8m8(op1,op2);\
__ret;\
})

◆ vmadc_vim_i16m1

#define vmadc_vim_i16m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i16m1(op1,op2,carryin);\
__ret;\
})


Produce carry out in mask register format

vmadc_vim_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vim vd, vs2, imm, v0

◆ vmadc_vim_i16m2

#define vmadc_vim_i16m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i16m2(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i16m4

#define vmadc_vim_i16m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i16m4(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i16m8

#define vmadc_vim_i16m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i16m8(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i32m1

#define vmadc_vim_i32m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i32m1(op1,op2,carryin);\
__ret;\
})


Produce carry out in mask register format

vmadc_vim_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vim vd, vs2, imm, v0

◆ vmadc_vim_i32m2

#define vmadc_vim_i32m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i32m2(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i32m4

#define vmadc_vim_i32m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i32m4(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i32m8

#define vmadc_vim_i32m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i32m8(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i8m1

#define vmadc_vim_i8m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i8m1(op1,op2,carryin);\
__ret;\
})


Produce carry out in mask register format

vmadc_vim_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vim vd, vs2, imm, v0

◆ vmadc_vim_i8m2

#define vmadc_vim_i8m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i8m2(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i8m4

#define vmadc_vim_i8m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i8m4(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_i8m8

#define vmadc_vim_i8m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_i8m8(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u16m1

#define vmadc_vim_u16m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u16m1(op1,op2,carryin);\
__ret;\
})


Produce carry out in mask register format

vmadc_vim_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vim vd, vs2, imm, v0

◆ vmadc_vim_u16m2

#define vmadc_vim_u16m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u16m2(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u16m4

#define vmadc_vim_u16m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u16m4(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u16m8

#define vmadc_vim_u16m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u16m8(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u32m1

#define vmadc_vim_u32m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u32m1(op1,op2,carryin);\
__ret;\
})


Produce carry out in mask register format

vmadc_vim_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vim vd, vs2, imm, v0

◆ vmadc_vim_u32m2

#define vmadc_vim_u32m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u32m2(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u32m4

#define vmadc_vim_u32m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u32m4(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u32m8

#define vmadc_vim_u32m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u32m8(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u8m1

#define vmadc_vim_u8m1 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u8m1(op1,op2,carryin);\
__ret;\
})


Produce carry out in mask register format

vmadc_vim_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vim vd, vs2, imm, v0

◆ vmadc_vim_u8m2

#define vmadc_vim_u8m2 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u8m2(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u8m4

#define vmadc_vim_u8m4 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u8m4(op1,op2,carryin);\
__ret;\
})

◆ vmadc_vim_u8m8

#define vmadc_vim_u8m8 (   op1,
  op2,
  carryin 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmadc_vim_u8m8(op1,op2,carryin);\
__ret;\
})

◆ vmerge_vim_i16m1_m

#define vmerge_vim_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Merge Instructions

vmerge_vim_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: imm [-16,15]
返回值: vmask_t

汇编指令:
vmerge.vim vd, vs2, imm, v0

◆ vmerge_vim_i16m2_m

#define vmerge_vim_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i16m4_m

#define vmerge_vim_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i16m8_m

#define vmerge_vim_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i32m1_m

#define vmerge_vim_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Merge Instructions

vmerge_vim_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: imm [-16,15]
返回值: vmask_t

汇编指令:
vmerge.vim vd, vs2, imm, v0

◆ vmerge_vim_i32m2_m

#define vmerge_vim_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i32m4_m

#define vmerge_vim_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i32m8_m

#define vmerge_vim_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i8m1_m

#define vmerge_vim_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Merge Instructions

vmerge_vim_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: imm [-16,15]
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: imm [-16,15]
返回值: vmask_t

汇编指令:
vmerge.vim vd, vs2, imm, v0

◆ vmerge_vim_i8m2_m

#define vmerge_vim_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i8m4_m

#define vmerge_vim_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vmerge_vim_i8m8_m

#define vmerge_vim_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vmerge_vim_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i16m1

#define vmseq_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions equal

vmseq_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmseq.vi vd, vs2, imm

◆ vmseq_vi_i16m1_m

#define vmseq_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vi_i16:

LMUL = 1
op1: vmask_t
op1: vint16m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint16m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint16m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint16m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmseq.vi vd, vs2, imm, vm

◆ vmseq_vi_i16m2

#define vmseq_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m2(op1,op2);\
__ret;\
})

◆ vmseq_vi_i16m2_m

#define vmseq_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i16m4

#define vmseq_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m4(op1,op2);\
__ret;\
})

◆ vmseq_vi_i16m4_m

#define vmseq_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i16m8

#define vmseq_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m8(op1,op2);\
__ret;\
})

◆ vmseq_vi_i16m8_m

#define vmseq_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i32m1

#define vmseq_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions equal

vmseq_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmseq.vi vd, vs2, imm

◆ vmseq_vi_i32m1_m

#define vmseq_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vi_i32:

LMUL = 1
op1: vmask_t
op1: vint32m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint32m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint32m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint32m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmseq.vi vd, vs2, imm, vm

◆ vmseq_vi_i32m2

#define vmseq_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m2(op1,op2);\
__ret;\
})

◆ vmseq_vi_i32m2_m

#define vmseq_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i32m4

#define vmseq_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m4(op1,op2);\
__ret;\
})

◆ vmseq_vi_i32m4_m

#define vmseq_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i32m8

#define vmseq_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m8(op1,op2);\
__ret;\
})

◆ vmseq_vi_i32m8_m

#define vmseq_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i8m1

#define vmseq_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions equal

vmseq_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmseq.vi vd, vs2, imm

◆ vmseq_vi_i8m1_m

#define vmseq_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vi_i8:

LMUL = 1
op1: vmask_t
op1: vint8m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint8m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint8m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint8m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmseq.vi vd, vs2, imm, vm

◆ vmseq_vi_i8m2

#define vmseq_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m2(op1,op2);\
__ret;\
})

◆ vmseq_vi_i8m2_m

#define vmseq_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i8m4

#define vmseq_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m4(op1,op2);\
__ret;\
})

◆ vmseq_vi_i8m4_m

#define vmseq_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vmseq_vi_i8m8

#define vmseq_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m8(op1,op2);\
__ret;\
})

◆ vmseq_vi_i8m8_m

#define vmseq_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmseq_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i16m1

#define vmsgt_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, signed

vmsgt_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgt.vi vd, vs2, imm

◆ vmsgt_vi_i16m1_m

#define vmsgt_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, signed(带掩码)

vmsgt_vi_i16:

LMUL = 1
op1: vmask_t
op1: vint16m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint16m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint16m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint16m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgt.vi vd, vs2, imm, vm

◆ vmsgt_vi_i16m2

#define vmsgt_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m2(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i16m2_m

#define vmsgt_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i16m4

#define vmsgt_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m4(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i16m4_m

#define vmsgt_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i16m8

#define vmsgt_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m8(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i16m8_m

#define vmsgt_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i32m1

#define vmsgt_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, signed

vmsgt_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgt.vi vd, vs2, imm

◆ vmsgt_vi_i32m1_m

#define vmsgt_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, signed(带掩码)

vmsgt_vi_i32:

LMUL = 1
op1: vmask_t
op1: vint32m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint32m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint32m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint32m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgt.vi vd, vs2, imm, vm

◆ vmsgt_vi_i32m2

#define vmsgt_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m2(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i32m2_m

#define vmsgt_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i32m4

#define vmsgt_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m4(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i32m4_m

#define vmsgt_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i32m8

#define vmsgt_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m8(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i32m8_m

#define vmsgt_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i8m1

#define vmsgt_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, signed

vmsgt_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgt.vi vd, vs2, imm

◆ vmsgt_vi_i8m1_m

#define vmsgt_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, signed(带掩码)

vmsgt_vi_i8:

LMUL = 1
op1: vmask_t
op1: vint8m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint8m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint8m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint8m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgt.vi vd, vs2, imm, vm

◆ vmsgt_vi_i8m2

#define vmsgt_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m2(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i8m2_m

#define vmsgt_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i8m4

#define vmsgt_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m4(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i8m4_m

#define vmsgt_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsgt_vi_i8m8

#define vmsgt_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m8(op1,op2);\
__ret;\
})

◆ vmsgt_vi_i8m8_m

#define vmsgt_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgt_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u16m1

#define vmsgtu_vi_u16m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, unsigned

vmsgtu_vi_u16:

LMUL = 1
op1: vuint16m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgtu.vi vd, vs2, imm

◆ vmsgtu_vi_u16m1_m

#define vmsgtu_vi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, unsigned(带掩码)

vmsgtu_vi_u16:

LMUL = 1
op1: vmask_t
op1: vuint16m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vuint16m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vuint16m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vuint16m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgtu.vi vd, vs2, imm, vm

◆ vmsgtu_vi_u16m2

#define vmsgtu_vi_u16m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m2(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u16m2_m

#define vmsgtu_vi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u16m4

#define vmsgtu_vi_u16m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m4(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u16m4_m

#define vmsgtu_vi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u16m8

#define vmsgtu_vi_u16m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m8(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u16m8_m

#define vmsgtu_vi_u16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u16m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u32m1

#define vmsgtu_vi_u32m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, unsigned

vmsgtu_vi_u32:

LMUL = 1
op1: vuint32m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgtu.vi vd, vs2, imm

◆ vmsgtu_vi_u32m1_m

#define vmsgtu_vi_u32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, unsigned(带掩码)

vmsgtu_vi_u32:

LMUL = 1
op1: vmask_t
op1: vuint32m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vuint32m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vuint32m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vuint32m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgtu.vi vd, vs2, imm, vm

◆ vmsgtu_vi_u32m2

#define vmsgtu_vi_u32m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m2(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u32m2_m

#define vmsgtu_vi_u32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u32m4

#define vmsgtu_vi_u32m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m4(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u32m4_m

#define vmsgtu_vi_u32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u32m8

#define vmsgtu_vi_u32m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m8(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u32m8_m

#define vmsgtu_vi_u32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u32m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u8m1

#define vmsgtu_vi_u8m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, unsigned

vmsgtu_vi_u8:

LMUL = 1
op1: vuint8m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgtu.vi vd, vs2, imm

◆ vmsgtu_vi_u8m1_m

#define vmsgtu_vi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions greater than, unsigned(带掩码)

vmsgtu_vi_u8:

LMUL = 1
op1: vmask_t
op1: vuint8m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vuint8m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vuint8m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vuint8m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsgtu.vi vd, vs2, imm, vm

◆ vmsgtu_vi_u8m2

#define vmsgtu_vi_u8m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m2(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u8m2_m

#define vmsgtu_vi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u8m4

#define vmsgtu_vi_u8m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m4(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u8m4_m

#define vmsgtu_vi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u8m8

#define vmsgtu_vi_u8m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m8(op1,op2);\
__ret;\
})

◆ vmsgtu_vi_u8m8_m

#define vmsgtu_vi_u8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsgtu_vi_u8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i16m1

#define vmsle_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsle.vi vd, vs2, imm

◆ vmsle_vi_i16m1_m

#define vmsle_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vi_i16:

LMUL = 1
op1: vmask_t
op1: vint16m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint16m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint16m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint16m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsle.vi vd, vs2, imm, vm

◆ vmsle_vi_i16m2

#define vmsle_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m2(op1,op2);\
__ret;\
})

◆ vmsle_vi_i16m2_m

#define vmsle_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i16m4

#define vmsle_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m4(op1,op2);\
__ret;\
})

◆ vmsle_vi_i16m4_m

#define vmsle_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i16m8

#define vmsle_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m8(op1,op2);\
__ret;\
})

◆ vmsle_vi_i16m8_m

#define vmsle_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i32m1

#define vmsle_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsle.vi vd, vs2, imm

◆ vmsle_vi_i32m1_m

#define vmsle_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vi_i32:

LMUL = 1
op1: vmask_t
op1: vint32m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint32m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint32m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint32m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsle.vi vd, vs2, imm, vm

◆ vmsle_vi_i32m2

#define vmsle_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m2(op1,op2);\
__ret;\
})

◆ vmsle_vi_i32m2_m

#define vmsle_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i32m4

#define vmsle_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m4(op1,op2);\
__ret;\
})

◆ vmsle_vi_i32m4_m

#define vmsle_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i32m8

#define vmsle_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m8(op1,op2);\
__ret;\
})

◆ vmsle_vi_i32m8_m

#define vmsle_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i8m1

#define vmsle_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsle.vi vd, vs2, imm

◆ vmsle_vi_i8m1_m

#define vmsle_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vi_i8:

LMUL = 1
op1: vmask_t
op1: vint8m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint8m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint8m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint8m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsle.vi vd, vs2, imm, vm

◆ vmsle_vi_i8m2

#define vmsle_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m2(op1,op2);\
__ret;\
})

◆ vmsle_vi_i8m2_m

#define vmsle_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i8m4

#define vmsle_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m4(op1,op2);\
__ret;\
})

◆ vmsle_vi_i8m4_m

#define vmsle_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsle_vi_i8m8

#define vmsle_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m8(op1,op2);\
__ret;\
})

◆ vmsle_vi_i8m8_m

#define vmsle_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsle_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u16m1

#define vmsleu_vi_u16m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vi_u16:

LMUL = 1
op1: vuint16m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsleu.vi vd, vs2, imm

◆ vmsleu_vi_u16m1_m

#define vmsleu_vi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vi_u16:

LMUL = 1
op1: vmask_t
op1: vuint16m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vuint16m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vuint16m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vuint16m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsleu.vi vd, vs2, imm, vm

◆ vmsleu_vi_u16m2

#define vmsleu_vi_u16m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m2(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u16m2_m

#define vmsleu_vi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u16m4

#define vmsleu_vi_u16m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m4(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u16m4_m

#define vmsleu_vi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u16m8

#define vmsleu_vi_u16m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m8(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u16m8_m

#define vmsleu_vi_u16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u16m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u32m1

#define vmsleu_vi_u32m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vi_u32:

LMUL = 1
op1: vuint32m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsleu.vi vd, vs2, imm

◆ vmsleu_vi_u32m1_m

#define vmsleu_vi_u32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vi_u32:

LMUL = 1
op1: vmask_t
op1: vuint32m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vuint32m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vuint32m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vuint32m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsleu.vi vd, vs2, imm, vm

◆ vmsleu_vi_u32m2

#define vmsleu_vi_u32m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m2(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u32m2_m

#define vmsleu_vi_u32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u32m4

#define vmsleu_vi_u32m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m4(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u32m4_m

#define vmsleu_vi_u32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u32m8

#define vmsleu_vi_u32m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m8(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u32m8_m

#define vmsleu_vi_u32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u32m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u8m1

#define vmsleu_vi_u8m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vi_u8:

LMUL = 1
op1: vuint8m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsleu.vi vd, vs2, imm

◆ vmsleu_vi_u8m1_m

#define vmsleu_vi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vi_u8:

LMUL = 1
op1: vmask_t
op1: vuint8m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vuint8m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vuint8m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vuint8m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsleu.vi vd, vs2, imm, vm

◆ vmsleu_vi_u8m2

#define vmsleu_vi_u8m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m2(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u8m2_m

#define vmsleu_vi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u8m4

#define vmsleu_vi_u8m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m4(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u8m4_m

#define vmsleu_vi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsleu_vi_u8m8

#define vmsleu_vi_u8m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m8(op1,op2);\
__ret;\
})

◆ vmsleu_vi_u8m8_m

#define vmsleu_vi_u8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsleu_vi_u8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i16m1

#define vmsne_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions not equal

vmsne_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsne.vi vd, vs2, imm

◆ vmsne_vi_i16m1_m

#define vmsne_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vi_i16:

LMUL = 1
op1: vmask_t
op1: vint16m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint16m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint16m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint16m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsne.vi vd, vs2, imm, vm

◆ vmsne_vi_i16m2

#define vmsne_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m2(op1,op2);\
__ret;\
})

◆ vmsne_vi_i16m2_m

#define vmsne_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i16m4

#define vmsne_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m4(op1,op2);\
__ret;\
})

◆ vmsne_vi_i16m4_m

#define vmsne_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i16m8

#define vmsne_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m8(op1,op2);\
__ret;\
})

◆ vmsne_vi_i16m8_m

#define vmsne_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i32m1

#define vmsne_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions not equal

vmsne_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsne.vi vd, vs2, imm

◆ vmsne_vi_i32m1_m

#define vmsne_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vi_i32:

LMUL = 1
op1: vmask_t
op1: vint32m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint32m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint32m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint32m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsne.vi vd, vs2, imm, vm

◆ vmsne_vi_i32m2

#define vmsne_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m2(op1,op2);\
__ret;\
})

◆ vmsne_vi_i32m2_m

#define vmsne_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i32m4

#define vmsne_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m4(op1,op2);\
__ret;\
})

◆ vmsne_vi_i32m4_m

#define vmsne_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i32m8

#define vmsne_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m8(op1,op2);\
__ret;\
})

◆ vmsne_vi_i32m8_m

#define vmsne_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i8m1

#define vmsne_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m1(op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions not equal

vmsne_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsne.vi vd, vs2, imm

◆ vmsne_vi_i8m1_m

#define vmsne_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vi_i8:

LMUL = 1
op1: vmask_t
op1: vint8m1_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 2
op1: vmask_t
op1: vint8m2_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 4
op1: vmask_t
op1: vint8m4_t
op3: imm [-16,15]
返回值:vmask_t

LMUL = 8
op1: vmask_t
op1: vint8m8_t
op3: imm [-16,15]
返回值:vmask_t

汇编指令:
vmsne.vi vd, vs2, imm, vm

◆ vmsne_vi_i8m2

#define vmsne_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m2(op1,op2);\
__ret;\
})

◆ vmsne_vi_i8m2_m

#define vmsne_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i8m4

#define vmsne_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m4(op1,op2);\
__ret;\
})

◆ vmsne_vi_i8m4_m

#define vmsne_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vmsne_vi_i8m8

#define vmsne_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m8(op1,op2);\
__ret;\
})

◆ vmsne_vi_i8m8_m

#define vmsne_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vmask_t __ret;\
__ret = __builtin_riscv_vmsne_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vmv_v_i_i16m1

#define vmv_v_i_i16m1 (   src)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i16m1(src);\
__ret;\
})


Vector Integer Move Instructions

vmv_v_i_i16:

LMUL = 1
op1: imm [-16,15]
返回值: vint16m1_t

LMUL = 2
op1: imm [-16,15]
返回值: vint16m2_t

LMUL = 4
op1: imm [-16,15]
返回值: vint16m4_t

LMUL = 8
op1: imm [-16,15]
返回值: vint16m8_t

汇编指令:
vmv.v.i vd, imm

◆ vmv_v_i_i16m2

#define vmv_v_i_i16m2 (   src)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i16m2(src);\
__ret;\
})

◆ vmv_v_i_i16m4

#define vmv_v_i_i16m4 (   src)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i16m4(src);\
__ret;\
})

◆ vmv_v_i_i16m8

#define vmv_v_i_i16m8 (   src)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i16m8(src);\
__ret;\
})

◆ vmv_v_i_i32m1

#define vmv_v_i_i32m1 (   src)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i32m1(src);\
__ret;\
})


Vector Integer Move Instructions

vmv_v_i_i32:

LMUL = 1
op1: imm [-16,15]
返回值: vint32m1_t

LMUL = 2
op1: imm [-16,15]
返回值: vint32m2_t

LMUL = 4
op1: imm [-16,15]
返回值: vint32m4_t

LMUL = 8
op1: imm [-16,15]
返回值: vint32m8_t

汇编指令:
vmv.v.i vd, imm

◆ vmv_v_i_i32m2

#define vmv_v_i_i32m2 (   src)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i32m2(src);\
__ret;\
})

◆ vmv_v_i_i32m4

#define vmv_v_i_i32m4 (   src)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i32m4(src);\
__ret;\
})

◆ vmv_v_i_i32m8

#define vmv_v_i_i32m8 (   src)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i32m8(src);\
__ret;\
})

◆ vmv_v_i_i8m1

#define vmv_v_i_i8m1 (   src)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i8m1(src);\
__ret;\
})


Vector Integer Move Instructions

vmv_v_i_i8:

LMUL = 1
op1: imm [-16,15]
返回值: vint8m1_t

LMUL = 2
op1: imm [-16,15]
返回值: vint8m2_t

LMUL = 4
op1: imm [-16,15]
返回值: vint8m4_t

LMUL = 8
op1: imm [-16,15]
返回值: vint8m8_t

汇编指令:
vmv.v.i vd, imm

◆ vmv_v_i_i8m2

#define vmv_v_i_i8m2 (   src)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i8m2(src);\
__ret;\
})

◆ vmv_v_i_i8m4

#define vmv_v_i_i8m4 (   src)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i8m4(src);\
__ret;\
})

◆ vmv_v_i_i8m8

#define vmv_v_i_i8m8 (   src)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vmv_v_i_i8m8(src);\
__ret;\
})

◆ vmv_v_i_u16m1

#define vmv_v_i_u16m1 (   src)
值:
__extension__ ({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u16m1(src);\
__ret;\
})


Vector Integer Move Instructions

vmv_v_i_u16:

LMUL = 1
op1: uimm [0,31]
返回值: vuint16m1_t

LMUL = 2
op1: uimm [0,31]
返回值: vuint16m2_t

LMUL = 4
op1: uimm [0,31]
返回值: vuint16m4_t

LMUL = 8
op1: uimm [0,31]
返回值: vuint16m8_t

汇编指令:
vmv.v.i vd, uimm

◆ vmv_v_i_u16m2

#define vmv_v_i_u16m2 (   src)
值:
__extension__ ({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u16m2(src);\
__ret;\
})

◆ vmv_v_i_u16m4

#define vmv_v_i_u16m4 (   src)
值:
__extension__ ({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u16m4(src);\
__ret;\
})

◆ vmv_v_i_u16m8

#define vmv_v_i_u16m8 (   src)
值:
__extension__ ({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u16m8(src);\
__ret;\
})

◆ vmv_v_i_u32m1

#define vmv_v_i_u32m1 (   src)
值:
__extension__ ({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u32m1(src);\
__ret;\
})


Vector Integer Move Instructions

vmv_v_i_u32:

LMUL = 1
op1: uimm [0,31]
返回值: vuint32m1_t

LMUL = 2
op1: uimm [0,31]
返回值: vuint32m2_t

LMUL = 4
op1: uimm [0,31]
返回值: vuint32m4_t

LMUL = 8
op1: uimm [0,31]
返回值: vuint32m8_t

汇编指令:
vmv.v.i vd, uimm

◆ vmv_v_i_u32m2

#define vmv_v_i_u32m2 (   src)
值:
__extension__ ({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u32m2(src);\
__ret;\
})

◆ vmv_v_i_u32m4

#define vmv_v_i_u32m4 (   src)
值:
__extension__ ({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u32m4(src);\
__ret;\
})

◆ vmv_v_i_u32m8

#define vmv_v_i_u32m8 (   src)
值:
__extension__ ({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u32m8(src);\
__ret;\
})

◆ vmv_v_i_u8m1

#define vmv_v_i_u8m1 (   src)
值:
__extension__ ({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u8m1(src);\
__ret;\
})


Vector Integer Move Instructions

vmv_v_i_u8:

LMUL = 1
op1: uimm [0,31]
返回值: vuint8m1_t

LMUL = 2
op1: uimm [0,31]
返回值: vuint8m2_t

LMUL = 4
op1: uimm [0,31]
返回值: vuint8m4_t

LMUL = 8
op1: uimm [0,31]
返回值: vuint8m8_t

汇编指令:
vmv.v.i vd, uimm

◆ vmv_v_i_u8m2

#define vmv_v_i_u8m2 (   src)
值:
__extension__ ({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u8m2(src);\
__ret;\
})

◆ vmv_v_i_u8m4

#define vmv_v_i_u8m4 (   src)
值:
__extension__ ({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u8m4(src);\
__ret;\
})

◆ vmv_v_i_u8m8

#define vmv_v_i_u8m8 (   src)
值:
__extension__ ({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vmv_v_i_u8m8(src);\
__ret;\
})

◆ vnclip_wi_i16m1

#define vnclip_wi_i16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i16m1(op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions

vnclip_wi_i16:

LMUL = 1
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint16m4_t

汇编指令:
vnclip.wi vd, vs2, uimm

◆ vnclip_wi_i16m1_m

#define vnclip_wi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclip_wi_i16:

LMUL = 1
mask: vmask_t
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint16m4_t

汇编指令:
vnclip.wi vd, vs2, uimm, vm

◆ vnclip_wi_i16m2

#define vnclip_wi_i16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i16m2(op1,op2);\
__ret;\
})

◆ vnclip_wi_i16m2_m

#define vnclip_wi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vnclip_wi_i16m4

#define vnclip_wi_i16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i16m4(op1,op2);\
__ret;\
})

◆ vnclip_wi_i16m4_m

#define vnclip_wi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vnclip_wi_i8m1

#define vnclip_wi_i8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i8m1(op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions

vnclip_wi_i8:

LMUL = 1
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint8m4_t

汇编指令:
vnclip.wi vd, vs2, uimm

◆ vnclip_wi_i8m1_m

#define vnclip_wi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclip_wi_i8:

LMUL = 1
mask: vmask_t
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint8m4_t

汇编指令:
vnclip.wi vd, vs2, uimm, vm

◆ vnclip_wi_i8m2

#define vnclip_wi_i8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i8m2(op1,op2);\
__ret;\
})

◆ vnclip_wi_i8m2_m

#define vnclip_wi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vnclip_wi_i8m4

#define vnclip_wi_i8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i8m4(op1,op2);\
__ret;\
})

◆ vnclip_wi_i8m4_m

#define vnclip_wi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vnclip_wi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vnclipu_wi_u16m1

#define vnclipu_wi_u16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u16m1(op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions

vnclipu_wi_u16:

LMUL = 1
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint16m4_t

汇编指令:
vnclipu.wi vd, vs2, uimm

◆ vnclipu_wi_u16m1_m

#define vnclipu_wi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclipu_wi_u16:

LMUL = 1
mask: vmask_t
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint16m4_t

汇编指令:
vnclipu.wi vd, vs2, uimm, vm

◆ vnclipu_wi_u16m2

#define vnclipu_wi_u16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u16m2(op1,op2);\
__ret;\
})

◆ vnclipu_wi_u16m2_m

#define vnclipu_wi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vnclipu_wi_u16m4

#define vnclipu_wi_u16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u16m4(op1,op2);\
__ret;\
})

◆ vnclipu_wi_u16m4_m

#define vnclipu_wi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vnclipu_wi_u8m1

#define vnclipu_wi_u8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u8m1(op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions

vnclipu_wi_u8:

LMUL = 1
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint8m4_t

汇编指令:
vnclipu.wi vd, vs2, uimm

◆ vnclipu_wi_u8m1_m

#define vnclipu_wi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclipu_wi_u8:

LMUL = 1
mask: vmask_t
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint8m4_t

汇编指令:
vnclipu.wi vd, vs2, uimm, vm

◆ vnclipu_wi_u8m2

#define vnclipu_wi_u8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u8m2(op1,op2);\
__ret;\
})

◆ vnclipu_wi_u8m2_m

#define vnclipu_wi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vnclipu_wi_u8m4

#define vnclipu_wi_u8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u8m4(op1,op2);\
__ret;\
})

◆ vnclipu_wi_u8m4_m

#define vnclipu_wi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vnclipu_wi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vnsra_wi_i16m1

#define vnsra_wi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i16m1(op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions

vnsra_wi_i16:

LMUL = 1
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint16m4_t

汇编指令:
vnsra.wi vd, vs2, uimm

◆ vnsra_wi_i16m1_m

#define vnsra_wi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsra_wi_i16:

LMUL = 1
mask: vmask_t
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint16m4_t

汇编指令:
vnsra.wi vd, vs2, uimm, vm

◆ vnsra_wi_i16m2

#define vnsra_wi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i16m2(op1,op2);\
__ret;\
})

◆ vnsra_wi_i16m2_m

#define vnsra_wi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vnsra_wi_i16m4

#define vnsra_wi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i16m4(op1,op2);\
__ret;\
})

◆ vnsra_wi_i16m4_m

#define vnsra_wi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vnsra_wi_i8m1

#define vnsra_wi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i8m1(op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions

vnsra_wi_i8:

LMUL = 1
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint8m4_t

汇编指令:
vnsra.wi vd, vs2, uimm

◆ vnsra_wi_i8m1_m

#define vnsra_wi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsra_wi_i8:

LMUL = 1
mask: vmask_t
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint8m4_t

汇编指令:
vnsra.wi vd, vs2, uimm, vm

◆ vnsra_wi_i8m2

#define vnsra_wi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i8m2(op1,op2);\
__ret;\
})

◆ vnsra_wi_i8m2_m

#define vnsra_wi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vnsra_wi_i8m4

#define vnsra_wi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i8m4(op1,op2);\
__ret;\
})

◆ vnsra_wi_i8m4_m

#define vnsra_wi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vnsra_wi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vnsrl_wi_u16m1

#define vnsrl_wi_u16m1 (   op1,
  op2 
)
值:
__extension__({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u16m1(op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions

vnsrl_wi_u16:

LMUL = 1
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint16m4_t

汇编指令:
vnsrl.wi vd, vs2, uimm

◆ vnsrl_wi_u16m1_m

#define vnsrl_wi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsrl_wi_u16:

LMUL = 1
mask: vmask_t
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint16m4_t

汇编指令:
vnsrl.wi vd, vs2, uimm, vm

◆ vnsrl_wi_u16m2

#define vnsrl_wi_u16m2 (   op1,
  op2 
)
值:
__extension__({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u16m2(op1,op2);\
__ret;\
})

◆ vnsrl_wi_u16m2_m

#define vnsrl_wi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vnsrl_wi_u16m4

#define vnsrl_wi_u16m4 (   op1,
  op2 
)
值:
__extension__({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u16m4(op1,op2);\
__ret;\
})

◆ vnsrl_wi_u16m4_m

#define vnsrl_wi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vnsrl_wi_u8m1

#define vnsrl_wi_u8m1 (   op1,
  op2 
)
值:
__extension__({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u8m1(op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions

vnsrl_wi_u8:

LMUL = 1
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint8m4_t

汇编指令:
vnsrl.wi vd, vs2, imm

◆ vnsrl_wi_u8m1_m

#define vnsrl_wi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsrl_wi_u8:

LMUL = 1
mask: vmask_t
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint8m4_t

汇编指令:
vnsrl.wi vd, vs2, uimm, vm

◆ vnsrl_wi_u8m2

#define vnsrl_wi_u8m2 (   op1,
  op2 
)
值:
__extension__({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u8m2(op1,op2);\
__ret;\
})

◆ vnsrl_wi_u8m2_m

#define vnsrl_wi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vnsrl_wi_u8m4

#define vnsrl_wi_u8m4 (   op1,
  op2 
)
值:
__extension__({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u8m4(op1,op2);\
__ret;\
})

◆ vnsrl_wi_u8m4_m

#define vnsrl_wi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vnsrl_wi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i16m1

#define vor_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vor_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL =8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vor.vi vd, vs2, imm

◆ vor_vi_i16m1_m

#define vor_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vor_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vor.vx vd, vs2, imm, vm

◆ vor_vi_i16m2

#define vor_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m2(op1,op2);\
__ret;\
})

◆ vor_vi_i16m2_m

#define vor_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i16m4

#define vor_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m4(op1,op2);\
__ret;\
})

◆ vor_vi_i16m4_m

#define vor_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i16m8

#define vor_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m8(op1,op2);\
__ret;\
})

◆ vor_vi_i16m8_m

#define vor_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vor_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i32m1

#define vor_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vor_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL =8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vor.vi vd, vs2, imm

◆ vor_vi_i32m1_m

#define vor_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vor_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vor.vi vd, vs2, imm, vm

◆ vor_vi_i32m2

#define vor_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m2(op1,op2);\
__ret;\
})

◆ vor_vi_i32m2_m

#define vor_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i32m4

#define vor_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m4(op1,op2);\
__ret;\
})

◆ vor_vi_i32m4_m

#define vor_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i32m8

#define vor_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m8(op1,op2);\
__ret;\
})

◆ vor_vi_i32m8_m

#define vor_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vor_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i8m1

#define vor_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vor_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL =8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vor.vi vd, vs2, imm

◆ vor_vi_i8m1_m

#define vor_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vor_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vor.vi vd, vs2, imm, vm

◆ vor_vi_i8m2

#define vor_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m2(op1,op2);\
__ret;\
})

◆ vor_vi_i8m2_m

#define vor_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i8m4

#define vor_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m4(op1,op2);\
__ret;\
})

◆ vor_vi_i8m4_m

#define vor_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vor_vi_i8m8

#define vor_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m8(op1,op2);\
__ret;\
})

◆ vor_vi_i8m8_m

#define vor_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vor_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_f32m1

#define vrgather_vi_f32m1 (   op1,
  op2 
)
值:
__extension__({\
vfloat32m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m1(op1,op2);\
__ret;\
})


Vector Register Gather Instruction

vrgather_vi_f32:

LMUL = 1
op1: vfloat32m1_t
op2: uimm [0,31]
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: uimm [0,31]
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: uimm [0,31]
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: uimm [0,31]
返回值: vfloat32m8_t

汇编指令:
vcompress.vm vd, vs2, uimm

◆ vrgather_vi_f32m1_m

#define vrgather_vi_f32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vfloat32m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m1_m(mask,op1,op2);\
__ret;\
})


Vector Register Gather Instruction(带掩码)

vrgather_vi_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: uimm [0,31]
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: uimm [0,31]
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: uimm [0,31]
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: uimm [0,31]
返回值: vfloat32m8_t

汇编指令:
vcompress.vm vd, vs2, uimm, vm

◆ vrgather_vi_f32m2

#define vrgather_vi_f32m2 (   op1,
  op2 
)
值:
__extension__({\
vfloat32m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m2(op1,op2);\
__ret;\
})

◆ vrgather_vi_f32m2_m

#define vrgather_vi_f32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vfloat32m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m2_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_f32m4

#define vrgather_vi_f32m4 (   op1,
  op2 
)
值:
__extension__({\
vfloat32m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m4(op1,op2);\
__ret;\
})

◆ vrgather_vi_f32m4_m

#define vrgather_vi_f32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vfloat32m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m4_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_f32m8

#define vrgather_vi_f32m8 (   op1,
  op2 
)
值:
__extension__({\
vfloat32m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m8(op1,op2);\
__ret;\
})

◆ vrgather_vi_f32m8_m

#define vrgather_vi_f32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vfloat32m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_f32m8_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i16m1

#define vrgather_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m1(op1,op2);\
__ret;\
})


Vector Register Gather Instruction

vrgather_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: uimm [0,31]
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uimm [0,31]
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uimm [0,31]
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uimm [0,31]
返回值: vint16m8_t

汇编指令:
vrgather.vi vd, vs2, uimm

◆ vrgather_vi_i16m1_m

#define vrgather_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Register Gather Instruction(带掩码)

vrgather_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uimm [0,31]
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uimm [0,31]
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uimm [0,31]
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uimm [0,31]
返回值: vint16m8_t

汇编指令:
vrgather.vi vd, vs2, uimm, vm

◆ vrgather_vi_i16m2

#define vrgather_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m2(op1,op2);\
__ret;\
})

◆ vrgather_vi_i16m2_m

#define vrgather_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i16m4

#define vrgather_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m4(op1,op2);\
__ret;\
})

◆ vrgather_vi_i16m4_m

#define vrgather_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i16m8

#define vrgather_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m8(op1,op2);\
__ret;\
})

◆ vrgather_vi_i16m8_m

#define vrgather_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i32m1

#define vrgather_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m1(op1,op2);\
__ret;\
})


Vector Register Gather Instruction

vrgather_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: uimm [0,31]
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uimm [0,31]
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uimm [0,31]
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uimm [0,31]
返回值: vint32m8_t

汇编指令:
vrgather.vi vd, vs2, uimm

◆ vrgather_vi_i32m1_m

#define vrgather_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Register Gather Instruction(带掩码)

vrgather_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uimm [0,31]
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uimm [0,31]
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uimm [0,31]
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uimm [0,31]
返回值: vint32m8_t

汇编指令:
vrgather.vi vd, vs2, uimm, vm

◆ vrgather_vi_i32m2

#define vrgather_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m2(op1,op2);\
__ret;\
})

◆ vrgather_vi_i32m2_m

#define vrgather_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i32m4

#define vrgather_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m4(op1,op2);\
__ret;\
})

◆ vrgather_vi_i32m4_m

#define vrgather_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i32m8

#define vrgather_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m8(op1,op2);\
__ret;\
})

◆ vrgather_vi_i32m8_m

#define vrgather_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i8m1

#define vrgather_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m1(op1,op2);\
__ret;\
})


Vector Register Gather Instruction

vrgather_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: uimm [0,31]
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uimm [0,31]
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uimm [0,31]
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uimm [0,31]
返回值: vint8m8_t

汇编指令:
vrgather.vi vd, vs2, uimm

◆ vrgather_vi_i8m1_m

#define vrgather_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Register Gather Instruction(带掩码)

vrgather_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uimm [0,31]
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uimm [0,31]
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uimm [0,31]
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uimm [0,31]
返回值: vint8m8_t

汇编指令:
vrgather.vi vd, vs2, uimm, vm

◆ vrgather_vi_i8m2

#define vrgather_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m2(op1,op2);\
__ret;\
})

◆ vrgather_vi_i8m2_m

#define vrgather_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i8m4

#define vrgather_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m4(op1,op2);\
__ret;\
})

◆ vrgather_vi_i8m4_m

#define vrgather_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vrgather_vi_i8m8

#define vrgather_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m8(op1,op2);\
__ret;\
})

◆ vrgather_vi_i8m8_m

#define vrgather_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vrgather_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i16m1

#define vrsub_vi_i16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m1(op1,op2);\
__ret;\
})


Integer reverse subtract

vrsub_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: imm [-16,15]
返回值: vint16m8_t

汇编指令:
vrsub.vi vd, vs2, imm

◆ vrsub_vi_i16m1_m

#define vrsub_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Integer reverse subtract(带掩码)

vrsub_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: imm [-15,16]
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: imm [-15,16]
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: imm [-15,16]
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: imm [-15,16]
返回值: vint16m8_t

汇编指令:
vrsub.vi vd, vs2, imm, vm

◆ vrsub_vi_i16m2

#define vrsub_vi_i16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m2(op1,op2);\
__ret;\
})

◆ vrsub_vi_i16m2_m

#define vrsub_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i16m4

#define vrsub_vi_i16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m4(op1,op2);\
__ret;\
})

◆ vrsub_vi_i16m4_m

#define vrsub_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i16m8

#define vrsub_vi_i16m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m8(op1,op2);\
__ret;\
})

◆ vrsub_vi_i16m8_m

#define vrsub_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i32m1

#define vrsub_vi_i32m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m1(op1,op2);\
__ret;\
})


Integer reverse subtract

vrsub_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: imm [-16,15]
返回值: vint32m8_t

汇编指令:
vrsub.vi vd, vs2, imm

◆ vrsub_vi_i32m1_m

#define vrsub_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Integer reverse subtract(带掩码)

vrsub_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: imm [-15,16]
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: imm [-15,16]
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: imm [-15,16]
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: imm [-15,16]
返回值: vint32m8_t

汇编指令:
vrsub.vi vd, vs2, imm, vm

◆ vrsub_vi_i32m2

#define vrsub_vi_i32m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m2(op1,op2);\
__ret;\
})

◆ vrsub_vi_i32m2_m

#define vrsub_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i32m4

#define vrsub_vi_i32m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m4(op1,op2);\
__ret;\
})

◆ vrsub_vi_i32m4_m

#define vrsub_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i32m8

#define vrsub_vi_i32m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m8(op1,op2);\
__ret;\
})

◆ vrsub_vi_i32m8_m

#define vrsub_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i8m1

#define vrsub_vi_i8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m1(op1,op2);\
__ret;\
})


Integer reverse subtract

vrsub_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: imm [-16,15]
返回值: vint8m8_t

汇编指令:
vrsub.vi vd, vs2, imm

◆ vrsub_vi_i8m1_m

#define vrsub_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Integer reverse subtract(带掩码)

vrsub_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: imm [-15,16]
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: imm [-15,16]
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: imm [-15,16]
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: imm [-15,16]
返回值: vint8m8_t

汇编指令:
vrsub.vi vd, vs2, imm, vm

◆ vrsub_vi_i8m2

#define vrsub_vi_i8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m2(op1,op2);\
__ret;\
})

◆ vrsub_vi_i8m2_m

#define vrsub_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i8m4

#define vrsub_vi_i8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m4(op1,op2);\
__ret;\
})

◆ vrsub_vi_i8m4_m

#define vrsub_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vrsub_vi_i8m8

#define vrsub_vi_i8m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m8(op1,op2);\
__ret;\
})

◆ vrsub_vi_i8m8_m

#define vrsub_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vrsub_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i16m1

#define vsadd_vi_i16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m1(op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL =8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vsadd.vi vd, vs2, imm

◆ vsadd_vi_i16m1_m

#define vsadd_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vsadd.vx vd, vs2, imm, vm

◆ vsadd_vi_i16m2

#define vsadd_vi_i16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m2(op1,op2);\
__ret;\
})

◆ vsadd_vi_i16m2_m

#define vsadd_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i16m4

#define vsadd_vi_i16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m4(op1,op2);\
__ret;\
})

◆ vsadd_vi_i16m4_m

#define vsadd_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i16m8

#define vsadd_vi_i16m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m8(op1,op2);\
__ret;\
})

◆ vsadd_vi_i16m8_m

#define vsadd_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i32m1

#define vsadd_vi_i32m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m1(op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL =8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vsadd.vi vd, vs2, imm

◆ vsadd_vi_i32m1_m

#define vsadd_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vsadd.vx vd, vs2, imm, vm

◆ vsadd_vi_i32m2

#define vsadd_vi_i32m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m2(op1,op2);\
__ret;\
})

◆ vsadd_vi_i32m2_m

#define vsadd_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i32m4

#define vsadd_vi_i32m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m4(op1,op2);\
__ret;\
})

◆ vsadd_vi_i32m4_m

#define vsadd_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i32m8

#define vsadd_vi_i32m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m8(op1,op2);\
__ret;\
})

◆ vsadd_vi_i32m8_m

#define vsadd_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i8m1

#define vsadd_vi_i8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m1(op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL =8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vsadd.vi vd, vs2, imm

◆ vsadd_vi_i8m1_m

#define vsadd_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vsadd.vx vd, vs2, imm, vm

◆ vsadd_vi_i8m2

#define vsadd_vi_i8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m2(op1,op2);\
__ret;\
})

◆ vsadd_vi_i8m2_m

#define vsadd_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i8m4

#define vsadd_vi_i8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m4(op1,op2);\
__ret;\
})

◆ vsadd_vi_i8m4_m

#define vsadd_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vsadd_vi_i8m8

#define vsadd_vi_i8m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m8(op1,op2);\
__ret;\
})

◆ vsadd_vi_i8m8_m

#define vsadd_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vsadd_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u16m1

#define vsaddu_vi_u16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m1(op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vi_u16:

LMUL = 1
op1: vuint16m1_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint16m8_t

汇编指令:
vsaddu.vi vd, vs2, uimm

◆ vsaddu_vi_u16m1_m

#define vsaddu_vi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vi_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: imm [0,31]
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: imm [0,31]
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: imm [0,31]
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: imm [0,31]
返回值:vuint16m8_t

汇编指令:
vsaddu.vx vd, vs2, imm, vm

◆ vsaddu_vi_u16m2

#define vsaddu_vi_u16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m2(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u16m2_m

#define vsaddu_vi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u16m4

#define vsaddu_vi_u16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m4(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u16m4_m

#define vsaddu_vi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u16m8

#define vsaddu_vi_u16m8 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m8(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u16m8_m

#define vsaddu_vi_u16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u16m8_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u32m1

#define vsaddu_vi_u32m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m1(op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vi_u32:

LMUL = 1
op1: vuint32m1_t
op2: uimm [0,31]
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint32m8_t

汇编指令:
vsaddu.vi vd, vs2, uimm

◆ vsaddu_vi_u32m1_m

#define vsaddu_vi_u32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vi_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: imm [0,31]
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: imm [0,31]
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: imm [0,31]
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: imm [0,31]
返回值:vuint32m8_t

汇编指令:
vsaddu.vx vd, vs2, imm, vm

◆ vsaddu_vi_u32m2

#define vsaddu_vi_u32m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m2(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u32m2_m

#define vsaddu_vi_u32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m2_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u32m4

#define vsaddu_vi_u32m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m4(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u32m4_m

#define vsaddu_vi_u32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m4_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u32m8

#define vsaddu_vi_u32m8 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m8(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u32m8_m

#define vsaddu_vi_u32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u32m8_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u8m1

#define vsaddu_vi_u8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m1(op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vi_u8:

LMUL = 1
op1: vuint8m1_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uimm [0,31]
返回值:vuint8m4_t

LMUL =8
op1: vuint8m8_t
op2: uimm [0,31]
返回值:vuint8m8_t

汇编指令:
vsaddu.vi vd, vs2, uimm

◆ vsaddu_vi_u8m1_m

#define vsaddu_vi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vi_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: imm [0,31]
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: imm [0,31]
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: imm [0,31]
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: imm [0,31]
返回值:vuint8m8_t

汇编指令:
vsaddu.vx vd, vs2, imm, vm

◆ vsaddu_vi_u8m2

#define vsaddu_vi_u8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m2(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u8m2_m

#define vsaddu_vi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u8m4

#define vsaddu_vi_u8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m4(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u8m4_m

#define vsaddu_vi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vsaddu_vi_u8m8

#define vsaddu_vi_u8m8 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m8(op1,op2);\
__ret;\
})

◆ vsaddu_vi_u8m8_m

#define vsaddu_vi_u8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vsaddu_vi_u8m8_m(mask,op1,op2);\
__ret;\
})

◆ vsetvli

#define vsetvli (   avl,
  sew,
  lmul,
  ediv 
)
值:
__extension__ ({\
uint32_t __ret;\
__ret = (uint32_t) __builtin_riscv_vsetvli(avl, ediv<<5 | sew << 2 | lmul);\
__ret;\
})


Configuration-Setting Instructions

vsetvli:

LMUL = 1
op1: uint32_t
op2: uint32_t
op3: uint32_t
op4: uint32_t
返回值:uint32_t

汇编指令:
vsetvli rd, rs1, vtypei

◆ vslidedown_vi_f32m1

#define vslidedown_vi_f32m1 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslidedown_vi_f32:

LMUL = 1
op1: vfloat32m1_t
offset: uimm [0,31]
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
offset: uimm [0,31]
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
offset: uimm [0,31]
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
offset: uimm [0,31]
返回值:vfloat32m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm

◆ vslidedown_vi_f32m1_m

#define vslidedown_vi_f32m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslidedown_vi_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
offset: uimm [0,31]
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
offset: uimm [0,31]
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
offset: uimm [0,31]
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
offset: uimm [0,31]
返回值:vfloat32m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm, vm

◆ vslidedown_vi_f32m2

#define vslidedown_vi_f32m2 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m2(op1,offset);\
__ret;\
})

◆ vslidedown_vi_f32m2_m

#define vslidedown_vi_f32m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m2_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_f32m4

#define vslidedown_vi_f32m4 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m4(op1,offset);\
__ret;\
})

◆ vslidedown_vi_f32m4_m

#define vslidedown_vi_f32m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m4_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_f32m8

#define vslidedown_vi_f32m8 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m8(op1,offset);\
__ret;\
})

◆ vslidedown_vi_f32m8_m

#define vslidedown_vi_f32m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_f32m8_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i16m1

#define vslidedown_vi_i16m1 (   op1,
  offset 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslidedown_vi_i16:

LMUL = 1
op1: vint16m1_t
offset: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
offset: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
offset: uimm [0,31]
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
offset: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm

◆ vslidedown_vi_i16m1_m

#define vslidedown_vi_i16m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslidedown_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
offset: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
offset: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
offset: uimm [0,31]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
offset: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm, vm

◆ vslidedown_vi_i16m2

#define vslidedown_vi_i16m2 (   op1,
  offset 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m2(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i16m2_m

#define vslidedown_vi_i16m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m2_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i16m4

#define vslidedown_vi_i16m4 (   op1,
  offset 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m4(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i16m4_m

#define vslidedown_vi_i16m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m4_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i16m8

#define vslidedown_vi_i16m8 (   op1,
  offset 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m8(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i16m8_m

#define vslidedown_vi_i16m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i16m8_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i32m1

#define vslidedown_vi_i32m1 (   op1,
  offset 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslidedown_vi_i32:

LMUL = 1
op1: vint32m1_t
offset: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
offset: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
offset: uimm [0,31]
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
offset: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm

◆ vslidedown_vi_i32m1_m

#define vslidedown_vi_i32m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslidedown_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
offset: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
offset: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
offset: uimm [0,31]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
offset: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm, vm

◆ vslidedown_vi_i32m2

#define vslidedown_vi_i32m2 (   op1,
  offset 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m2(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i32m2_m

#define vslidedown_vi_i32m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m2_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i32m4

#define vslidedown_vi_i32m4 (   op1,
  offset 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m4(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i32m4_m

#define vslidedown_vi_i32m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m4_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i32m8

#define vslidedown_vi_i32m8 (   op1,
  offset 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m8(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i32m8_m

#define vslidedown_vi_i32m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i32m8_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i8m1

#define vslidedown_vi_i8m1 (   op1,
  offset 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslidedown_vi_i8:

LMUL = 1
op1: vint8m1_t
offset: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
offset: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
offset: uimm [0,31]
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
offset: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm

◆ vslidedown_vi_i8m1_m

#define vslidedown_vi_i8m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslidedown_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
offset: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
offset: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
offset: uimm [0,31]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
offset: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vslidedown.vi vd, vs2, uimm, vm

◆ vslidedown_vi_i8m2

#define vslidedown_vi_i8m2 (   op1,
  offset 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m2(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i8m2_m

#define vslidedown_vi_i8m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m2_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i8m4

#define vslidedown_vi_i8m4 (   op1,
  offset 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m4(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i8m4_m

#define vslidedown_vi_i8m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m4_m(mask,op1,offset);\
__ret;\
})

◆ vslidedown_vi_i8m8

#define vslidedown_vi_i8m8 (   op1,
  offset 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m8(op1,offset);\
__ret;\
})

◆ vslidedown_vi_i8m8_m

#define vslidedown_vi_i8m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vslidedown_vi_i8m8_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_f32m1

#define vslideup_vi_f32m1 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslideup_vi_f32:

LMUL = 1
op1: vfloat32m1_t
offset: uimm [0,31]
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
offset: uimm [0,31]
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
offset: uimm [0,31]
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
offset: uimm [0,31]
返回值:vfloat32m8_t

汇编指令:
vslideup.vi vd, vs2, uimm

◆ vslideup_vi_f32m1_m

#define vslideup_vi_f32m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslideup_vi_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
offset: uimm [0,31]
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
offset: uimm [0,31]
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
offset: uimm [0,31]
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
offset: uimm [0,31]
返回值:vfloat32m8_t

汇编指令:
vslideup.vi vd, vs2, uimm, vm

◆ vslideup_vi_f32m2

#define vslideup_vi_f32m2 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m2(op1,offset);\
__ret;\
})

◆ vslideup_vi_f32m2_m

#define vslideup_vi_f32m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m2_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_f32m4

#define vslideup_vi_f32m4 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m4(op1,offset);\
__ret;\
})

◆ vslideup_vi_f32m4_m

#define vslideup_vi_f32m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m4_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_f32m8

#define vslideup_vi_f32m8 (   op1,
  offset 
)
值:
__extension__({\
vfloat32m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m8(op1,offset);\
__ret;\
})

◆ vslideup_vi_f32m8_m

#define vslideup_vi_f32m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vfloat32m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_f32m8_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i16m1

#define vslideup_vi_i16m1 (   op1,
  offset 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslideup_vi_i16:

LMUL = 1
op1: vint16m1_t
offset: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
offset: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
offset: uimm [0,31]
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
offset: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vslideup.vi vd, vs2, uimm

◆ vslideup_vi_i16m1_m

#define vslideup_vi_i16m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslideup_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
offset: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
offset: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
offset: uimm [0,31]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
offset: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vslideup.vi vd, vs2, uimm, vm

◆ vslideup_vi_i16m2

#define vslideup_vi_i16m2 (   op1,
  offset 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m2(op1,offset);\
__ret;\
})

◆ vslideup_vi_i16m2_m

#define vslideup_vi_i16m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m2_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i16m4

#define vslideup_vi_i16m4 (   op1,
  offset 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m4(op1,offset);\
__ret;\
})

◆ vslideup_vi_i16m4_m

#define vslideup_vi_i16m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m4_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i16m8

#define vslideup_vi_i16m8 (   op1,
  offset 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m8(op1,offset);\
__ret;\
})

◆ vslideup_vi_i16m8_m

#define vslideup_vi_i16m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i16m8_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i32m1

#define vslideup_vi_i32m1 (   op1,
  offset 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslideup_vi_i32:

LMUL = 1
op1: vint32m1_t
offset: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
offset: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
offset: uimm [0,31]
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
offset: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vslideup.vi vd, vs2, uimm

◆ vslideup_vi_i32m1_m

#define vslideup_vi_i32m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslideup_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
offset: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
offset: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
offset: uimm [0,31]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
offset: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vslideup.vi vd, vs2, uimm, vm

◆ vslideup_vi_i32m2

#define vslideup_vi_i32m2 (   op1,
  offset 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m2(op1,offset);\
__ret;\
})

◆ vslideup_vi_i32m2_m

#define vslideup_vi_i32m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m2_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i32m4

#define vslideup_vi_i32m4 (   op1,
  offset 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m4(op1,offset);\
__ret;\
})

◆ vslideup_vi_i32m4_m

#define vslideup_vi_i32m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m4_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i32m8

#define vslideup_vi_i32m8 (   op1,
  offset 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m8(op1,offset);\
__ret;\
})

◆ vslideup_vi_i32m8_m

#define vslideup_vi_i32m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i32m8_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i8m1

#define vslideup_vi_i8m1 (   op1,
  offset 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m1(op1,offset);\
__ret;\
})


Vector Slide Instructions

vslideup_vi_i8:

LMUL = 1
op1: vint8m1_t
offset: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
offset: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
offset: uimm [0,31]
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
offset: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vslideup.vi vd, vs2, uimm

◆ vslideup_vi_i8m1_m

#define vslideup_vi_i8m1_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m1_m(mask,op1,offset);\
__ret;\
})


Vector Slide Instructions (带掩码)

vslideup_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
offset: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
offset: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
offset: uimm [0,31]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
offset: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vslideup.vi vd, vs2, uimm, vm

◆ vslideup_vi_i8m2

#define vslideup_vi_i8m2 (   op1,
  offset 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m2(op1,offset);\
__ret;\
})

◆ vslideup_vi_i8m2_m

#define vslideup_vi_i8m2_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m2_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i8m4

#define vslideup_vi_i8m4 (   op1,
  offset 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m4(op1,offset);\
__ret;\
})

◆ vslideup_vi_i8m4_m

#define vslideup_vi_i8m4_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m4_m(mask,op1,offset);\
__ret;\
})

◆ vslideup_vi_i8m8

#define vslideup_vi_i8m8 (   op1,
  offset 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m8(op1,offset);\
__ret;\
})

◆ vslideup_vi_i8m8_m

#define vslideup_vi_i8m8_m (   mask,
  op1,
  offset 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vslideup_vi_i8m8_m(mask,op1,offset);\
__ret;\
})

◆ vsll_vi_i16m1

#define vsll_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsll_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint16m4_t

LMUL =8
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vsll.vi vd, vs2, uimm

◆ vsll_vi_i16m1_m

#define vsll_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vsll.vx vd, vs2, uimm, vm

◆ vsll_vi_i16m2

#define vsll_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m2(op1,op2);\
__ret;\
})

◆ vsll_vi_i16m2_m

#define vsll_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i16m4

#define vsll_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m4(op1,op2);\
__ret;\
})

◆ vsll_vi_i16m4_m

#define vsll_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i16m8

#define vsll_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m8(op1,op2);\
__ret;\
})

◆ vsll_vi_i16m8_m

#define vsll_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i32m1

#define vsll_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsll_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint32m4_t

LMUL =8
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vsll.vi vd, vs2, uimm

◆ vsll_vi_i32m1_m

#define vsll_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vsll.vx vd, vs2, uimm, vm

◆ vsll_vi_i32m2

#define vsll_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m2(op1,op2);\
__ret;\
})

◆ vsll_vi_i32m2_m

#define vsll_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i32m4

#define vsll_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m4(op1,op2);\
__ret;\
})

◆ vsll_vi_i32m4_m

#define vsll_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i32m8

#define vsll_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m8(op1,op2);\
__ret;\
})

◆ vsll_vi_i32m8_m

#define vsll_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i8m1

#define vsll_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsll_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uimm [0,31]
返回值:vint8m4_t

LMUL =8
op1: vint8m8_t
op2: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vsll.vi vd, vs2, uimm

◆ vsll_vi_i8m1_m

#define vsll_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uimm [0,31]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vsll.vx vd, vs2, uimm, vm

◆ vsll_vi_i8m2

#define vsll_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m2(op1,op2);\
__ret;\
})

◆ vsll_vi_i8m2_m

#define vsll_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i8m4

#define vsll_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m4(op1,op2);\
__ret;\
})

◆ vsll_vi_i8m4_m

#define vsll_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_i8m8

#define vsll_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m8(op1,op2);\
__ret;\
})

◆ vsll_vi_i8m8_m

#define vsll_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u16m1

#define vsll_vi_u16m1 (   op1,
  op2 
)
值:
__extension__({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsll_vi_u16:

LMUL = 1
op1: vuint16m1_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint16m8_t

汇编指令:
vsll.vi vd, vs2, uimm

◆ vsll_vi_u16m1_m

#define vsll_vi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vi_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint16m8_t

汇编指令:
vsll.vx vd, vs2, uimm, vm

◆ vsll_vi_u16m2

#define vsll_vi_u16m2 (   op1,
  op2 
)
值:
__extension__({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m2(op1,op2);\
__ret;\
})

◆ vsll_vi_u16m2_m

#define vsll_vi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u16m4

#define vsll_vi_u16m4 (   op1,
  op2 
)
值:
__extension__({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m4(op1,op2);\
__ret;\
})

◆ vsll_vi_u16m4_m

#define vsll_vi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u16m8

#define vsll_vi_u16m8 (   op1,
  op2 
)
值:
__extension__({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m8(op1,op2);\
__ret;\
})

◆ vsll_vi_u16m8_m

#define vsll_vi_u16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_u16m8_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u32m1

#define vsll_vi_u32m1 (   op1,
  op2 
)
值:
__extension__({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsll_vi_u32:

LMUL = 1
op1: vuint32m1_t
op2: uimm [0,31]
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint32m8_t

汇编指令:
vsll.vi vd, vs2, uimm

◆ vsll_vi_u32m1_m

#define vsll_vi_u32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vi_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uimm [0,31]
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint32m8_t

汇编指令:
vsll.vx vd, vs2, uimm, vm

◆ vsll_vi_u32m2

#define vsll_vi_u32m2 (   op1,
  op2 
)
值:
__extension__({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m2(op1,op2);\
__ret;\
})

◆ vsll_vi_u32m2_m

#define vsll_vi_u32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m2_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u32m4

#define vsll_vi_u32m4 (   op1,
  op2 
)
值:
__extension__({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m4(op1,op2);\
__ret;\
})

◆ vsll_vi_u32m4_m

#define vsll_vi_u32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m4_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u32m8

#define vsll_vi_u32m8 (   op1,
  op2 
)
值:
__extension__({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m8(op1,op2);\
__ret;\
})

◆ vsll_vi_u32m8_m

#define vsll_vi_u32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_u32m8_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u8m1

#define vsll_vi_u8m1 (   op1,
  op2 
)
值:
__extension__({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsll_vi_u8:

LMUL = 1
op1: vuint8m1_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uimm [0,31]
返回值:vuint8m4_t

LMUL =8
op1: vuint8m8_t
op2: uimm [0,31]
返回值:vuint8m8_t

汇编指令:
vsll.vi vd, vs2, uimm

◆ vsll_vi_u8m1_m

#define vsll_vi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vi_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uimm [0,31]
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uimm [0,31]
返回值:vuint8m8_t

汇编指令:
vsll.vx vd, vs2, uimm, vm

◆ vsll_vi_u8m2

#define vsll_vi_u8m2 (   op1,
  op2 
)
值:
__extension__({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m2(op1,op2);\
__ret;\
})

◆ vsll_vi_u8m2_m

#define vsll_vi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u8m4

#define vsll_vi_u8m4 (   op1,
  op2 
)
值:
__extension__({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m4(op1,op2);\
__ret;\
})

◆ vsll_vi_u8m4_m

#define vsll_vi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vsll_vi_u8m8

#define vsll_vi_u8m8 (   op1,
  op2 
)
值:
__extension__({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m8(op1,op2);\
__ret;\
})

◆ vsll_vi_u8m8_m

#define vsll_vi_u8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vsll_vi_u8m8_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i16m1

#define vsra_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsra_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint16m4_t

LMUL =8
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vsra.vi vd, vs2, uimm

◆ vsra_vi_i16m1_m

#define vsra_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vsra.vx vd, vs2, uimm, vm

◆ vsra_vi_i16m2

#define vsra_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m2(op1,op2);\
__ret;\
})

◆ vsra_vi_i16m2_m

#define vsra_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i16m4

#define vsra_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m4(op1,op2);\
__ret;\
})

◆ vsra_vi_i16m4_m

#define vsra_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i16m8

#define vsra_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m8(op1,op2);\
__ret;\
})

◆ vsra_vi_i16m8_m

#define vsra_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vsra_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i32m1

#define vsra_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsra_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint32m4_t

LMUL =8
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vsra.vi vd, vs2, uimm

◆ vsra_vi_i32m1_m

#define vsra_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vsra.vx vd, vs2, uimm, vm

◆ vsra_vi_i32m2

#define vsra_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m2(op1,op2);\
__ret;\
})

◆ vsra_vi_i32m2_m

#define vsra_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i32m4

#define vsra_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m4(op1,op2);\
__ret;\
})

◆ vsra_vi_i32m4_m

#define vsra_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i32m8

#define vsra_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m8(op1,op2);\
__ret;\
})

◆ vsra_vi_i32m8_m

#define vsra_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vsra_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i8m1

#define vsra_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsra_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uimm [0,31]
返回值:vint8m4_t

LMUL =8
op1: vint8m8_t
op2: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vsra.vi vd, vs2, uimm

◆ vsra_vi_i8m1_m

#define vsra_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uimm [0,31]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vsra.vx vd, vs2, uimm, vm

◆ vsra_vi_i8m2

#define vsra_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m2(op1,op2);\
__ret;\
})

◆ vsra_vi_i8m2_m

#define vsra_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i8m4

#define vsra_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m4(op1,op2);\
__ret;\
})

◆ vsra_vi_i8m4_m

#define vsra_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vsra_vi_i8m8

#define vsra_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m8(op1,op2);\
__ret;\
})

◆ vsra_vi_i8m8_m

#define vsra_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vsra_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u16m1

#define vsrl_vi_u16m1 (   op1,
  op2 
)
值:
__extension__({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsrl_vi_u16:

LMUL = 1
op1: vuint16m1_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint16m8_t

汇编指令:
vsrl.vi vd, vs2, uimm

◆ vsrl_vi_u16m1_m

#define vsrl_vi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vi_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint16m8_t

汇编指令:
vsrl.vx vd, vs2, uimm, vm

◆ vsrl_vi_u16m2

#define vsrl_vi_u16m2 (   op1,
  op2 
)
值:
__extension__({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m2(op1,op2);\
__ret;\
})

◆ vsrl_vi_u16m2_m

#define vsrl_vi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u16m4

#define vsrl_vi_u16m4 (   op1,
  op2 
)
值:
__extension__({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m4(op1,op2);\
__ret;\
})

◆ vsrl_vi_u16m4_m

#define vsrl_vi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u16m8

#define vsrl_vi_u16m8 (   op1,
  op2 
)
值:
__extension__({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m8(op1,op2);\
__ret;\
})

◆ vsrl_vi_u16m8_m

#define vsrl_vi_u16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u16m8_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u32m1

#define vsrl_vi_u32m1 (   op1,
  op2 
)
值:
__extension__({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m1(op1,op2);\
__ret;\
})

◆ vsrl_vi_u32m1_m

#define vsrl_vi_u32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vi_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uimm [0,31]
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint32m8_t

汇编指令:
vsrl.vx vd, vs2, uimm, vm

◆ vsrl_vi_u32m2

#define vsrl_vi_u32m2 (   op1,
  op2 
)
值:
__extension__({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m2(op1,op2);\
__ret;\
})

◆ vsrl_vi_u32m2_m

#define vsrl_vi_u32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m2_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u32m4

#define vsrl_vi_u32m4 (   op1,
  op2 
)
值:
__extension__({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m4(op1,op2);\
__ret;\
})

◆ vsrl_vi_u32m4_m

#define vsrl_vi_u32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m4_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u32m8

#define vsrl_vi_u32m8 (   op1,
  op2 
)
值:
__extension__({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m8(op1,op2);\
__ret;\
})

◆ vsrl_vi_u32m8_m

#define vsrl_vi_u32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u32m8_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u8m1

#define vsrl_vi_u8m1 (   op1,
  op2 
)
值:
__extension__({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m1(op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions

vsrl_vi_u8:

LMUL = 1
op1: vuint8m1_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uimm [0,31]
返回值:vuint8m4_t

LMUL =8
op1: vuint8m8_t
op2: uimm [0,31]
返回值:vuint8m8_t

汇编指令:
vsrl.vi vd, vs2, uimm

◆ vsrl_vi_u8m1_m

#define vsrl_vi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vi_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uimm [0,31]
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uimm [0,31]
返回值:vuint8m8_t

汇编指令:
vsrl.vx vd, vs2, uimm, vm

◆ vsrl_vi_u8m2

#define vsrl_vi_u8m2 (   op1,
  op2 
)
值:
__extension__({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m2(op1,op2);\
__ret;\
})

◆ vsrl_vi_u8m2_m

#define vsrl_vi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u8m4

#define vsrl_vi_u8m4 (   op1,
  op2 
)
值:
__extension__({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m4(op1,op2);\
__ret;\
})

◆ vsrl_vi_u8m4_m

#define vsrl_vi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vsrl_vi_u8m8

#define vsrl_vi_u8m8 (   op1,
  op2 
)
值:
__extension__({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m8(op1,op2);\
__ret;\
})

◆ vsrl_vi_u8m8_m

#define vsrl_vi_u8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vsrl_vi_u8m8_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i16m1

#define vssra_vi_i16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m1(op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions

vssra_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint16m4_t

LMUL =8
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vssra.vi vd, vs2, uimm

◆ vssra_vi_i16m1_m

#define vssra_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uimm [0,31]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uimm [0,31]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uimm [0,31]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uimm [0,31]
返回值:vint16m8_t

汇编指令:
vssra.vx vd, vs2, uimm, vm

◆ vssra_vi_i16m2

#define vssra_vi_i16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m2(op1,op2);\
__ret;\
})

◆ vssra_vi_i16m2_m

#define vssra_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i16m4

#define vssra_vi_i16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m4(op1,op2);\
__ret;\
})

◆ vssra_vi_i16m4_m

#define vssra_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i16m8

#define vssra_vi_i16m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m8(op1,op2);\
__ret;\
})

◆ vssra_vi_i16m8_m

#define vssra_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vssra_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i32m1

#define vssra_vi_i32m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m1(op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions

vssra_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint32m4_t

LMUL =8
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vssra.vi vd, vs2, uimm

◆ vssra_vi_i32m1_m

#define vssra_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uimm [0,31]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uimm [0,31]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uimm [0,31]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uimm [0,31]
返回值:vint32m8_t

汇编指令:
vssra.vx vd, vs2, uimm, vm

◆ vssra_vi_i32m2

#define vssra_vi_i32m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m2(op1,op2);\
__ret;\
})

◆ vssra_vi_i32m2_m

#define vssra_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i32m4

#define vssra_vi_i32m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m4(op1,op2);\
__ret;\
})

◆ vssra_vi_i32m4_m

#define vssra_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i32m8

#define vssra_vi_i32m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m8(op1,op2);\
__ret;\
})

◆ vssra_vi_i32m8_m

#define vssra_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vssra_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i8m1

#define vssra_vi_i8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m1(op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions

vssra_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uimm [0,31]
返回值:vint8m4_t

LMUL =8
op1: vint8m8_t
op2: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vssra.vi vd, vs2, uimm

◆ vssra_vi_i8m1_m

#define vssra_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uimm [0,31]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uimm [0,31]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uimm [0,31]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uimm [0,31]
返回值:vint8m8_t

汇编指令:
vssra.vx vd, vs2, uimm, vm

◆ vssra_vi_i8m2

#define vssra_vi_i8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m2(op1,op2);\
__ret;\
})

◆ vssra_vi_i8m2_m

#define vssra_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i8m4

#define vssra_vi_i8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m4(op1,op2);\
__ret;\
})

◆ vssra_vi_i8m4_m

#define vssra_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vssra_vi_i8m8

#define vssra_vi_i8m8 (   op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m8(op1,op2);\
__ret;\
})

◆ vssra_vi_i8m8_m

#define vssra_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vssra_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u16m1

#define vssrl_vi_u16m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m1(op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions

vssrl_vi_u16:

LMUL = 1
op1: vuint16m1_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint16m8_t

汇编指令:
vssrl.vi vd, vs2, uimm

◆ vssrl_vi_u16m1_m

#define vssrl_vi_u16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m1_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vi_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uimm [0,31]
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uimm [0,31]
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uimm [0,31]
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uimm [0,31]
返回值:vuint16m8_t

汇编指令:
vssrl.vx vd, vs2, uimm, vm

◆ vssrl_vi_u16m2

#define vssrl_vi_u16m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m2(op1,op2);\
__ret;\
})

◆ vssrl_vi_u16m2_m

#define vssrl_vi_u16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m2_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m2_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u16m4

#define vssrl_vi_u16m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m4(op1,op2);\
__ret;\
})

◆ vssrl_vi_u16m4_m

#define vssrl_vi_u16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m4_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m4_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u16m8

#define vssrl_vi_u16m8 (   op1,
  op2 
)
值:
__extension__ ({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m8(op1,op2);\
__ret;\
})

◆ vssrl_vi_u16m8_m

#define vssrl_vi_u16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint16m8_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u16m8_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u32m1

#define vssrl_vi_u32m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m1(op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions

vssrl_vi_u32:

LMUL = 1
op1: vuint32m1_t
op2: uimm [0,31]
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint32m8_t

汇编指令:
vssrl.vi vd, vs2, uimm

◆ vssrl_vi_u32m1_m

#define vssrl_vi_u32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m1_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vi_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uimm [0,31]
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uimm [0,31]
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uimm [0,31]
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uimm [0,31]
返回值:vuint32m8_t

汇编指令:
vssrl.vx vd, vs2, uimm, vm

◆ vssrl_vi_u32m2

#define vssrl_vi_u32m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m2(op1,op2);\
__ret;\
})

◆ vssrl_vi_u32m2_m

#define vssrl_vi_u32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m2_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m2_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u32m4

#define vssrl_vi_u32m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m4(op1,op2);\
__ret;\
})

◆ vssrl_vi_u32m4_m

#define vssrl_vi_u32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m4_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m4_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u32m8

#define vssrl_vi_u32m8 (   op1,
  op2 
)
值:
__extension__ ({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m8(op1,op2);\
__ret;\
})

◆ vssrl_vi_u32m8_m

#define vssrl_vi_u32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint32m8_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u32m8_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u8m1

#define vssrl_vi_u8m1 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m1(op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions

vssrl_vi_u8:

LMUL = 1
op1: vuint8m1_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uimm [0,31]
返回值:vuint8m4_t

LMUL =8
op1: vuint8m8_t
op2: uimm [0,31]
返回值:vuint8m8_t

汇编指令:
vssrl.vi vd, vs2, uimm

◆ vssrl_vi_u8m1_m

#define vssrl_vi_u8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m1_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m1_m(mask,op1,op2);\
__ret;\
})


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vi_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uimm [0,31]
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uimm [0,31]
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uimm [0,31]
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uimm [0,31]
返回值:vuint8m8_t

汇编指令:
vssrl.vx vd, vs2, uimm, vm

◆ vssrl_vi_u8m2

#define vssrl_vi_u8m2 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m2(op1,op2);\
__ret;\
})

◆ vssrl_vi_u8m2_m

#define vssrl_vi_u8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m2_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m2_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u8m4

#define vssrl_vi_u8m4 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m4(op1,op2);\
__ret;\
})

◆ vssrl_vi_u8m4_m

#define vssrl_vi_u8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m4_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m4_m(mask,op1,op2);\
__ret;\
})

◆ vssrl_vi_u8m8

#define vssrl_vi_u8m8 (   op1,
  op2 
)
值:
__extension__ ({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m8(op1,op2);\
__ret;\
})

◆ vssrl_vi_u8m8_m

#define vssrl_vi_u8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__ ({\
vuint8m8_t __ret;\
__ret = __builtin_riscv_vssrl_vi_u8m8_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i16m1

#define vxor_vi_i16m1 (   op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vxor_vi_i16:

LMUL = 1
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL =8
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vxor.vi vd, vs2, imm

◆ vxor_vi_i16m1_m

#define vxor_vi_i16m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m1_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vxor_vi_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: imm [-16,15]
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: imm [-16,15]
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: imm [-16,15]
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: imm [-16,15]
返回值:vint16m8_t

汇编指令:
vxor.vi vd, vs2, imm, vm

◆ vxor_vi_i16m2

#define vxor_vi_i16m2 (   op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m2(op1,op2);\
__ret;\
})

◆ vxor_vi_i16m2_m

#define vxor_vi_i16m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m2_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m2_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i16m4

#define vxor_vi_i16m4 (   op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m4(op1,op2);\
__ret;\
})

◆ vxor_vi_i16m4_m

#define vxor_vi_i16m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m4_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m4_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i16m8

#define vxor_vi_i16m8 (   op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m8(op1,op2);\
__ret;\
})

◆ vxor_vi_i16m8_m

#define vxor_vi_i16m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint16m8_t __ret;\
__ret = __builtin_riscv_vxor_vi_i16m8_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i32m1

#define vxor_vi_i32m1 (   op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vxor_vi_i32:

LMUL = 1
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL =8
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vxor.vi vd, vs2, imm

◆ vxor_vi_i32m1_m

#define vxor_vi_i32m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m1_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vxor_vi_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: imm [-16,15]
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: imm [-16,15]
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: imm [-16,15]
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: imm [-16,15]
返回值:vint32m8_t

汇编指令:
vxor.vi vd, vs2, imm, vm

◆ vxor_vi_i32m2

#define vxor_vi_i32m2 (   op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m2(op1,op2);\
__ret;\
})

◆ vxor_vi_i32m2_m

#define vxor_vi_i32m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m2_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m2_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i32m4

#define vxor_vi_i32m4 (   op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m4(op1,op2);\
__ret;\
})

◆ vxor_vi_i32m4_m

#define vxor_vi_i32m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m4_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m4_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i32m8

#define vxor_vi_i32m8 (   op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m8(op1,op2);\
__ret;\
})

◆ vxor_vi_i32m8_m

#define vxor_vi_i32m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint32m8_t __ret;\
__ret = __builtin_riscv_vxor_vi_i32m8_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i8m1

#define vxor_vi_i8m1 (   op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m1(op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions

vxor_vi_i8:

LMUL = 1
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL =8
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vxor.vi vd, vs2, imm

◆ vxor_vi_i8m1_m

#define vxor_vi_i8m1_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m1_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m1_m(mask,op1,op2);\
__ret;\
})


Vector Bitwise Logical Instructions (带掩码)

vxor_vi_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: imm [-16,15]
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: imm [-16,15]
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: imm [-16,15]
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: imm [-16,15]
返回值:vint8m8_t

汇编指令:
vxor.vi vd, vs2, imm, vm

◆ vxor_vi_i8m2

#define vxor_vi_i8m2 (   op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m2(op1,op2);\
__ret;\
})

◆ vxor_vi_i8m2_m

#define vxor_vi_i8m2_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m2_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m2_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i8m4

#define vxor_vi_i8m4 (   op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m4(op1,op2);\
__ret;\
})

◆ vxor_vi_i8m4_m

#define vxor_vi_i8m4_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m4_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m4_m(mask,op1,op2);\
__ret;\
})

◆ vxor_vi_i8m8

#define vxor_vi_i8m8 (   op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m8(op1,op2);\
__ret;\
})

◆ vxor_vi_i8m8_m

#define vxor_vi_i8m8_m (   mask,
  op1,
  op2 
)
值:
__extension__({\
vint8m8_t __ret;\
__ret = __builtin_riscv_vxor_vi_i8m8_m(mask,op1,op2);\
__ret;\
})

函数说明

◆ vaadd_vv_i16m1()

__rv32 vint16m1_t vaadd_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaadd_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vaadd.vv vd, vs2, vs1

◆ vaadd_vv_i16m1_m()

__rv32 vint16m1_t vaadd_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaadd_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vaadd.vv vd, vs2, vs1, vm

◆ vaadd_vv_i32m1()

__rv32 vint32m1_t vaadd_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaadd_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vaadd.vv vd, vs2, vs1

◆ vaadd_vv_i32m1_m()

__rv32 vint32m1_t vaadd_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaadd_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vaadd.vv vd, vs2, vs1, vm

◆ vaadd_vv_i8m1()

__rv32 vint8m1_t vaadd_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaadd_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vaadd.vv vd, vs2, vs1

◆ vaadd_vv_i8m1_m()

__rv32 vint8m1_t vaadd_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaadd_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vaadd.vv vd, vs2, vs1, vm

◆ vaadd_vx_i16m1()

__rv32 vint16m1_t vaadd_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaadd_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vaadd.vx vd, vs2, rs1

◆ vaadd_vx_i16m1_m()

__rv32 vint16m1_t vaadd_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaadd_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vaadd.vx vd, vs2, rs1, vm

◆ vaadd_vx_i32m1()

__rv32 vuint32m1_t vaadd_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaadd_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vaadd.vx vd, vs2, rs1

◆ vaadd_vx_i32m1_m()

__rv32 vint32m1_t vaadd_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaadd_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vaadd.vx vd, vs2, rs1, vm

◆ vaadd_vx_i8m1()

__rv32 vint8m1_t vaadd_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaadd_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vaadd.vx vd, vs2, rs1

◆ vaadd_vx_i8m1_m()

__rv32 vint8m1_t vaadd_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaadd_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vaadd.vx vd, vs2, rs1, vm

◆ vaaddu_vv_u16m1()

__rv32 vuint16m1_t vaaddu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaaddu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vaaddu.vv vd, vs2, vs1

◆ vaaddu_vv_u16m1_m()

__rv32 vuint16m1_t vaaddu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaaddu_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vaaddu.vv vd, vs2, vs1, vm

◆ vaaddu_vv_u32m1()

__rv32 vuint32m1_t vaaddu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaaddu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vaaddu.vv vd, vs2, vs1

◆ vaaddu_vv_u32m1_m()

__rv32 vuint32m1_t vaaddu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaaddu_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vaaddu.vv vd, vs2, vs1, vm

◆ vaaddu_vv_u8m1()

__rv32 vuint8m1_t vaaddu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaaddu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vaaddu.vv vd, vs2, vs1

◆ vaaddu_vv_u8m1_m()

__rv32 vuint8m1_t vaaddu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaaddu_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vaaddu.vv vd, vs2, vs1, vm

◆ vaaddu_vx_u16m1()

__rv32 vuint16m1_t vaaddu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaaddu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vaaddu.vx vd, vs2, rs1

◆ vaaddu_vx_u16m1_m()

__rv32 vuint16m1_t vaaddu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaaddu_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vaaddu.vx vd, vs2, rs1, vm

◆ vaaddu_vx_u32m1()

__rv32 vuint32m1_t vaaddu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaaddu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vaaddu.vx vd, vs2, rs1

◆ vaaddu_vx_u32m1_m()

__rv32 vuint32m1_t vaaddu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaaddu_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vaaddu.vx vd, vs2, rs1, vm

◆ vaaddu_vx_u8m1()

__rv32 vuint8m1_t vaaddu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vaaddu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vaaddu.vx vd, vs2, rs1

◆ vaaddu_vx_u8m1_m()

__rv32 vuint8m1_t vaaddu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vaaddu_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vaaddu.vx vd, vs2, rs1, vm

◆ vadc_vvm_i16m1()

__rv32 vint16m1_t vadc_vvm_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vvm_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
carryin: vmask_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
carryin: vmask_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
carryin: vmask_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
carryin: vmask_t
返回值: vint16m8_t

汇编指令:
vadc.vvm vd, vs2, vs1, v0

◆ vadc_vvm_i32m1()

__rv32 vint32m1_t vadc_vvm_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vvm_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
carryin: vmask_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
carryin: vmask_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
carryin: vmask_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
carryin: vmask_t
返回值: vint32m8_t

汇编指令:
vadc.vvm vd, vs2, vs1, v0

◆ vadc_vvm_i8m1()

__rv32 vint8m1_t vadc_vvm_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vvm_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
carryin: vmask_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
carryin: vmask_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
carryin: vmask_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
carryin: vmask_t
返回值: vint8m8_t

汇编指令:
vadc.vvm vd, vs2, vs1, v0

◆ vadc_vvm_u16m1()

__rv32 vuint16m1_t vadc_vvm_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vvm_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
carryin: vmask_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
carryin: vmask_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
carryin: vmask_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
carryin: vmask_t
返回值: vuint16m8_t

汇编指令:
vadc.vvm vd, vs2, vs1, v0

◆ vadc_vvm_u32m1()

__rv32 vuint32m1_t vadc_vvm_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vvm_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
carryin: vmask_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
carryin: vmask_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
carryin: vmask_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
carryin: vmask_t
返回值: vuint32m8_t

汇编指令:
vadc.vvm vd, vs2, vs1, v0

◆ vadc_vvm_u8m1()

__rv32 vuint8m1_t vadc_vvm_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vvm_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
carryin: vmask_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
carryin: vmask_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
carryin: vmask_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
carryin: vmask_t
返回值: vuint8m8_t

汇编指令:
vadc.vvm vd, vs2, vs1, v0

◆ vadc_vxm_i16m1()

__rv32 vint16m1_t vadc_vxm_i16m1 ( vint16m1_t  op1,
int16_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vxm_i16

LMUL = 1
op1: vint16m1_t
op2: int16_t
carryin: vmask_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
carryin: vmask_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
carryin: vmask_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
carryin: vmask_t
返回值: vint16m8_t

汇编指令:
vadc.vxm vd, vs2, rs1, v0

◆ vadc_vxm_i32m1()

__rv32 vint32m1_t vadc_vxm_i32m1 ( vint32m1_t  op1,
int32_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vxm_i8

LMUL = 1
op1: vint32m1_t
op2: int32_t
carryin: vmask_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
carryin: vmask_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
carryin: vmask_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
carryin: vmask_t
返回值: vint32m8_t

汇编指令:
vadc.vxm vd, vs2, rs1, v0

◆ vadc_vxm_i8m1()

__rv32 vint8m1_t vadc_vxm_i8m1 ( vint8m1_t  op1,
int8_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vxm_i8

LMUL = 1
op1: vint8m1_t
op2: int8_t
carryin: vmask_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
carryin: vmask_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
carryin: vmask_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
carryin: vmask_t
返回值: vint8m8_t

汇编指令:
vadc.vxm vd, vs2, rs1, v0

◆ vadc_vxm_u16m1()

__rv32 vuint16m1_t vadc_vxm_u16m1 ( vuint16m1_t  op1,
uint16_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vxm_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
carryin: vmask_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
carryin: vmask_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
carryin: vmask_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
carryin: vmask_t
返回值: vuint16m8_t

汇编指令:
vadc.vxm vd, vs2, rs1, v0

◆ vadc_vxm_u32m1()

__rv32 vuint32m1_t vadc_vxm_u32m1 ( vuint32m1_t  op1,
uint32_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vxm_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
carryin: vmask_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
carryin: vmask_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
carryin: vmask_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
carryin: vmask_t
返回值: vuint32m8_t

汇编指令:
vadc.vxm vd, vs2, rs1, v0

◆ vadc_vxm_u8m1()

__rv32 vuint8m1_t vadc_vxm_u8m1 ( vuint8m1_t  op1,
uint8_t  op2,
vmask_t  carryin 
)


Produce sum with carry

vadc_vxm_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
carryin: vmask_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
carryin: vmask_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
carryin: vmask_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
carryin: vmask_t
返回值: vuint8m8_t

汇编指令:
vadc.vxm vd, vs2, rs1, v0

◆ vadd_vv_i16m1()

__rv32 vint16m1_t vadd_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Integer adds

vadd_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vadd.vv vd, vs2, vs1

◆ vadd_vv_i16m1_m()

__rv32 vint16m1_t vadd_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Integer adds(带掩码)

vadd_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值: vint16m8_t

汇编指令:
vadd.vv vd, vs2, vs1, vm

◆ vadd_vv_i32m1()

__rv32 vint32m1_t vadd_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Integer adds

vadd_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vadd.vv vd, vs2, vs1

◆ vadd_vv_i32m1_m()

__rv32 vint32m1_t vadd_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Integer adds(带掩码)

vadd_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值: vint32m8_t

汇编指令:
vadd.vv vd, vs2, vs1, vm

◆ vadd_vv_i8m1()

__rv32 vint8m1_t vadd_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Integer adds

vadd_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vadd.vv vd, vs2, vs1

◆ vadd_vv_i8m1_m()

__rv32 vint8m1_t vadd_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Integer adds(带掩码)

vadd_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值: vint8m8_t

汇编指令:
vadd.vv vd, vs2, vs1, vm

◆ vadd_vv_u16m1()

__rv32 vuint16m1_t vadd_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Integer adds

vadd_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vadd.vv vd, vs2, vs1

◆ vadd_vv_u16m1_m()

__rv32 vuint16m1_t vadd_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Integer adds(带掩码)

vadd_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值: vuint16m8_t

汇编指令:
vadd.vv vd, vs2, vs1, vm

◆ vadd_vv_u32m1()

__rv32 vuint32m1_t vadd_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Integer adds

vadd_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vadd.vv vd, vs2, vs1

◆ vadd_vv_u32m1_m()

__rv32 vuint32m1_t vadd_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Integer adds(带掩码)

vadd_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值: vuint32m8_t

汇编指令:
vadd.vv vd, vs2, vs1, vm

◆ vadd_vv_u8m1()

__rv32 vuint8m1_t vadd_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Integer adds

vadd_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vadd.vv vd, vs2, vs1

◆ vadd_vv_u8m1_m()

__rv32 vuint8m1_t vadd_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Integer adds(带掩码)

vadd_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值: vuint8m8_t

汇编指令:
vadd.vv vd, vs2, vs1, vm

◆ vadd_vx_i16m1()

__rv32 vint16m1_t vadd_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Integer adds

vadd_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值: vint16m8_t

汇编指令:
vadd.vx vd, vs2, rs1

◆ vadd_vx_i16m1_m()

__rv32 vint16m1_t vadd_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Integer adds(带掩码)

vadd_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值: vint16m8_t

汇编指令:
vadd.vx vd, vs2, rs1, vm

◆ vadd_vx_i32m1()

__rv32 vint32m1_t vadd_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Integer adds

vadd_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值: vint32m8_t

汇编指令:
vadd.vx vd, vs2, rs1

◆ vadd_vx_i32m1_m()

__rv32 vint32m1_t vadd_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Integer adds(带掩码)

vadd_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值: vint32m8_t

汇编指令:
vadd.vx vd, vs2, rs1, vm

◆ vadd_vx_i8m1()

__rv32 vint8m1_t vadd_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Integer adds

vadd_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值: vint8m8_t

汇编指令:
vadd.vx vd, vs2, rs1

◆ vadd_vx_i8m1_m()

__rv32 vint8m1_t vadd_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Integer adds(带掩码)

vadd_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值: vint8m8_t

汇编指令:
vadd.vx vd, vs2, rs1, vm

◆ vadd_vx_u16m1()

__rv32 vuint16m1_t vadd_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Integer adds

vadd_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值: vuint16m8_t

汇编指令:
vadd.vx vd, vs2, rs1

◆ vadd_vx_u16m1_m()

__rv32 vuint16m1_t vadd_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Integer adds(带掩码)

vadd_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值: vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值: vuint16m8_t

汇编指令:
vadd.vx vd, vs2, rs1, vm

◆ vadd_vx_u32m1()

__rv32 vuint32m1_t vadd_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Integer adds

vadd_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值: vuint32m8_t

汇编指令:
vadd.vx vd, vs2, rs1

◆ vadd_vx_u32m1_m()

__rv32 vuint32m1_t vadd_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Integer adds(带掩码)

vadd_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值: vuint32m8_t

汇编指令:
vadd.vx vd, vs2, rs1, vm

◆ vadd_vx_u8m1()

__rv32 vuint8m1_t vadd_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Integer adds

vadd_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值: vuint8m8_t

汇编指令:
vadd.vx vd, vs2, rs1

◆ vadd_vx_u8m1_m()

__rv32 vuint8m1_t vadd_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Integer adds(带掩码)

vadd_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值: vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值: vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值: vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值: vuint8m8_t

汇编指令:
vadd.vx vd, vs2, rs1, vm

◆ vand_vv_i16m1()

__rv32 vint16m1_t vand_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Bitwise Logical Instructions

vand_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vand.vv vd, vs2, vs1

◆ vand_vv_i16m1_m()

__rv32 vint16m1_t vand_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vand.vv vd, vs2, vs1, vm

◆ vand_vv_i32m1()

__rv32 vint32m1_t vand_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Bitwise Logical Instructions

vand_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vand.vv vd, vs2, vs1

◆ vand_vv_i32m1_m()

__rv32 vint32m1_t vand_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vand.vv vd, vs2, vs1, vm

◆ vand_vv_i8m1()

__rv32 vint8m1_t vand_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Bitwise Logical Instructions

vand_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vand.vv vd, vs2, vs1

◆ vand_vv_i8m1_m()

__rv32 vint8m1_t vand_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vand.vv vd, vs2, vs1, vm

◆ vand_vv_u16m1()

__rv32 vuint16m1_t vand_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Bitwise Logical Instructions

vand_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vand.vv vd, vs2, vs1

◆ vand_vv_u16m1_m()

__rv32 vuint16m1_t vand_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vand.vv vd, vs2, vs1, vm

◆ vand_vv_u32m1()

__rv32 vuint32m1_t vand_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Bitwise Logical Instructions

vand_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vand.vv vd, vs2, vs1

◆ vand_vv_u32m1_m()

__rv32 vuint32m1_t vand_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vv_i32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vand.vv vd, vs2, vs1, vm

◆ vand_vv_u8m1()

__rv32 vuint8m1_t vand_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Bitwise Logical Instructions

vand_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vand.vv vd, vs2, vs1

◆ vand_vv_u8m1_m()

__rv32 vuint8m1_t vand_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vand.vv vd, vs2, vs1, vm

◆ vand_vx_i16m1()

__rv32 vint16m1_t vand_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Bitwise Logical Instructions

vand_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vand.vx vd, vs2, rs1

◆ vand_vx_i16m1_m()

__rv32 vint16m1_t vand_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vand_vx_i32m1()

__rv32 vint32m1_t vand_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Bitwise Logical Instructions

vand_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vand.vx vd, vs2, rs1

◆ vand_vx_i32m1_m()

__rv32 vint32m1_t vand_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vand_vx_i8m1()

__rv32 vint8m1_t vand_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Bitwise Logical Instructions

vand_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vand.vx vd, vs2, rs1

◆ vand_vx_i8m1_m()

__rv32 vint8m1_t vand_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vand_vx_u16m1()

__rv32 vuint16m1_t vand_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Bitwise Logical Instructions

vand_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vand.vx vd, vs2, rs1

◆ vand_vx_u16m1_m()

__rv32 vuint16m1_t vand_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vand_vx_u32m1()

__rv32 vuint32m1_t vand_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Bitwise Logical Instructions

vand_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vand.vx vd, vs2, rs1

◆ vand_vx_u32m1_m()

__rv32 vuint32m1_t vand_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vand_vx_u8m1()

__rv32 vuint8m1_t vand_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Bitwise Logical Instructions

vand_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vand.vx vd, vs2, rs1

◆ vand_vx_u8m1_m()

__rv32 vuint8m1_t vand_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vand_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vasub_vv_i16m1()

__rv32 vint16m1_t vasub_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasub_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vasub.vv vd, vs2, vs1

◆ vasub_vv_i16m1_m()

__rv32 vint16m1_t vasub_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasub_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vasub.vv vd, vs2, vs1, vm

◆ vasub_vv_i32m1()

__rv32 vint32m1_t vasub_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasub_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vasub.vv vd, vs2, vs1

◆ vasub_vv_i32m1_m()

__rv32 vint32m1_t vasub_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasub_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vasub.vv vd, vs2, vs1, vm

◆ vasub_vv_i8m1()

__rv32 vint8m1_t vasub_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasub_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vasub.vv vd, vs2, vs1

◆ vasub_vv_i8m1_m()

__rv32 vint8m1_t vasub_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasub_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vasub.vv vd, vs2, vs1, vm

◆ vasub_vx_i16m1()

__rv32 vint16m1_t vasub_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasub_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vasub.vx vd, vs2, rs1

◆ vasub_vx_i16m1_m()

__rv32 vint16m1_t vasub_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasub_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vasub.vx vd, vs2, rs1, vm

◆ vasub_vx_i32m1()

__rv32 vuint32m1_t vasub_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasub_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vasub.vx vd, vs2, rs1

◆ vasub_vx_i32m1_m()

__rv32 vint32m1_t vasub_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasub_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vasub.vx vd, vs2, rs1, vm

◆ vasub_vx_i8m1()

__rv32 vint8m1_t vasub_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasub_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vasub.vx vd, vs2, rs1

◆ vasub_vx_i8m1_m()

__rv32 vint8m1_t vasub_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasub_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vasub.vx vd, vs2, rs1, vm

◆ vasubu_vv_u16m1()

__rv32 vuint16m1_t vasubu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasubu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vasubu.vv vd, vs2, vs1

◆ vasubu_vv_u16m1_m()

__rv32 vuint16m1_t vasubu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasubu_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vasubu.vv vd, vs2, vs1, vm

◆ vasubu_vv_u32m1()

__rv32 vuint32m1_t vasubu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasubu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vasubu.vv vd, vs2, vs1

◆ vasubu_vv_u32m1_m()

__rv32 vuint32m1_t vasubu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasubu_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vasubu.vv vd, vs2, vs1, vm

◆ vasubu_vv_u8m1()

__rv32 vuint8m1_t vasubu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasubu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vasubu.vv vd, vs2, vs1

◆ vasubu_vv_u8m1_m()

__rv32 vuint8m1_t vasubu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasubu_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vasubu.vv vd, vs2, vs1, vm

◆ vasubu_vx_u16m1()

__rv32 vuint16m1_t vasubu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasubu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vasubu.vx vd, vs2, rs1

◆ vasubu_vx_u16m1_m()

__rv32 vuint16m1_t vasubu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasubu_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vasubu.vx vd, vs2, rs1, vm

◆ vasubu_vx_u32m1()

__rv32 vuint32m1_t vasubu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasubu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vasubu.vx vd, vs2, rs1

◆ vasubu_vx_u32m1_m()

__rv32 vuint32m1_t vasubu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasubu_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vasubu.vx vd, vs2, rs1, vm

◆ vasubu_vx_u8m1()

__rv32 vuint8m1_t vasubu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions

vasubu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vasubu.vx vd, vs2, rs1

◆ vasubu_vx_u8m1_m()

__rv32 vuint8m1_t vasubu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Averaging Add and Subtract Instructions (带掩码)

vasubu_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vasubu.vx vd, vs2, rs1, vm

◆ vcompress_vm_f32m1()

__rv32 vfloat32m1_t vcompress_vm_f32m1 ( vmask_t  mask,
vfloat32m1_t  op1 
)


Vector Compress Instruction

vcompress_vm_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vcompress.vm vd, vs2, vs1

◆ vcompress_vm_i16m1()

__rv32 vint16m1_t vcompress_vm_i16m1 ( vmask_t  mask,
vint16m1_t  op1 
)


Vector Compress Instruction

vcompress_vm_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
返回值: vint16m8_t

汇编指令:
vcompress.vm vd, vs2, vs1

◆ vcompress_vm_i32m1()

__rv32 vint32m1_t vcompress_vm_i32m1 ( vmask_t  mask,
vint32m1_t  op1 
)


Vector Compress Instruction

vcompress_vm_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
返回值: vint32m8_t

汇编指令:
vcompress.vm vd, vs2, vs1

◆ vcompress_vm_i8m1()

__rv32 vint8m1_t vcompress_vm_i8m1 ( vmask_t  mask,
vint8m1_t  op1 
)


Vector Compress Instruction

vcompress_vm_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
返回值: vint8m8_t

汇编指令:
vcompress.vm vd, vs2, vs1

◆ vcompress_vm_u16m1()

__rv32 vuint16m1_t vcompress_vm_u16m1 ( vmask_t  mask,
vuint16m1_t  op1 
)


Vector Compress Instruction

vcompress_vm_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
返回值: vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
返回值: vuint16m8_t

汇编指令:
vcompress.vm vd, vs2, vs1

◆ vcompress_vm_u32m1()

__rv32 vuint32m1_t vcompress_vm_u32m1 ( vmask_t  mask,
vuint32m1_t  op1 
)


Vector Compress Instruction

vcompress_vm_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
返回值: vuint32m8_t

汇编指令:
vcompress.vm vd, vs2, vs1

◆ vcompress_vm_u8m1()

__rv32 vuint8m1_t vcompress_vm_u8m1 ( vmask_t  mask,
vuint8m1_t  op1 
)


Vector Compress Instruction

vcompress_vm_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
返回值: vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
返回值: vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
返回值: vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
返回值: vuint8m8_t

汇编指令:
vcompress.vm vd, vs2, vs1

◆ vdiv_vv_i16m1()

__rv32 vint16m1_t vdiv_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Divide Instructions signed divide

vdiv_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vdiv.vv vd, vs2, vs1

◆ vdiv_vv_i16m1_m()

__rv32 vint16m1_t vdiv_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Divide Instructions signed divide(带掩码)

vdiv_vv_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: vint16m8_t
返回值:vint16m8_t

汇编指令:
vdiv.vv vd, vs2, vs1, vm

◆ vdiv_vv_i32m1()

__rv32 vint32m1_t vdiv_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Divide Instructions signed divide

vdiv_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vdiv.vv vd, vs2, vs1

◆ vdiv_vv_i32m1_m()

__rv32 vint32m1_t vdiv_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Divide Instructions signed divide(带掩码)

vdiv_vv_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint32m8_t
返回值:vint32m8_t

汇编指令:
vdiv.vv vd, vs2, vs1, vm

◆ vdiv_vv_i8m1()

__rv32 vint8m1_t vdiv_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Divide Instructions signed divide

vdiv_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vdiv.vv vd, vs2, vs1

◆ vdiv_vv_i8m1_m()

__rv32 vint8m1_t vdiv_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Divide Instructions signed divide(带掩码)

vdiv_vv_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: vint8m8_t
返回值:vint8m8_t

汇编指令:
vdiv.vv vd, vs2, vs1, vm

◆ vdiv_vx_i16m1()

__rv32 vint16m1_t vdiv_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Divide Instructions signed divide

vdiv_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vdiv.vx vd, vs2, rs1

◆ vdiv_vx_i16m1_m()

__rv32 vint16m1_t vdiv_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Divide Instructions signed divide(带掩码)

vdiv_vx_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t
返回值:vint16m8_t

汇编指令:
vdiv.vx vd, vs2, rs1, vm

◆ vdiv_vx_i32m1()

__rv32 vint32m1_t vdiv_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Divide Instructions signed divide

vdiv_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vdiv.vx vd, vs2, rs1

◆ vdiv_vx_i32m1_m()

__rv32 vint32m1_t vdiv_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Divide Instructions signed divide(带掩码)

vdiv_vx_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t
返回值:vint32m8_t

汇编指令:
vdiv.vx vd, vs2, rs1, vm

◆ vdiv_vx_i8m1()

__rv32 vint8m1_t vdiv_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Divide Instructions signed divide

vdiv_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vdiv.vx vd, vs2, rs1

◆ vdiv_vx_i8m1_m()

__rv32 vint8m1_t vdiv_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Divide Instructions signed divide(带掩码)

vdiv_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t
返回值:vint8m8_t

汇编指令:
vdiv.vx vd, vs2, rs1, vm

◆ vdivu_vv_u16m1()

__rv32 vuint16m1_t vdivu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Divide Instructions unsigned divide

vdivu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vdivu.vv vd, vs2, vs1

◆ vdivu_vv_u16m1_m()

__rv32 vuint16m1_t vdivu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Divide Instructions unsigned divide(带掩码)

vdivu_vv_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vdivu.vv vd, vs2, vs1, vm

◆ vdivu_vv_u32m1()

__rv32 vuint32m1_t vdivu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Divide Instructions unsigned divide

vdivu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vdivu.vv vd, vs2, vs1

◆ vdivu_vv_u32m1_m()

__rv32 vuint32m1_t vdivu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Divide Instructions unsigned divide(带掩码)

vdivu_vv_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vdivu.vv vd, vs2, vs1, vm

◆ vdivu_vv_u8m1()

__rv32 vuint8m1_t vdivu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Divide Instructions unsigned divide

vdivu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vdivu.vv vd, vs2, vs1

◆ vdivu_vv_u8m1_m()

__rv32 vuint8m1_t vdivu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Divide Instructions unsigned divide(带掩码)

vdivu_vv_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vdivu.vv vd, vs2, vs1, vm

◆ vdivu_vx_u16m1()

__rv32 vuint16m1_t vdivu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Divide Instructions unsigned divide

vdivu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vdivu.vx vd, vs2, rs1

◆ vdivu_vx_u16m1_m()

__rv32 vuint16m1_t vdivu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Divide Instructions unsigned divide(带掩码)

vdivu_vx_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t
返回值:vuint16m8_t

汇编指令:
vdivu.vx vd, vs2, rs1, vm

◆ vdivu_vx_u32m1()

__rv32 vuint32m1_t vdivu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Divide Instructions unsigned divide

vdivu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vdivu.vx vd, vs2, rs1

◆ vdivu_vx_u32m1_m()

__rv32 vuint32m1_t vdivu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Divide Instructions unsigned divide(带掩码)

vdivu_vx_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t
返回值:vuint32m8_t

汇编指令:
vdivu.vx vd, vs2, rs1, vm

◆ vdivu_vx_u8m1()

__rv32 vuint8m1_t vdivu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Divide Instructions unsigned divide

vdivu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vdivu.vx vd, vs2, rs1

◆ vdivu_vx_u8m1_m()

__rv32 vuint8m1_t vdivu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Divide Instructions unsigned divide(带掩码)

vdivu_vx_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t
返回值:vuint8m8_t

汇编指令:
vdivu.vx vd, vs2, rs1, vm

◆ vfadd_vf_f32m1()

__rv32 vfloat32m1_t vfadd_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Adds

vfadd_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值:vfloat32m8_t

汇编指令:
vfadd.vf vd, vs2, rs1

◆ vfadd_vf_f32m1_m()

__rv32 vfloat32m1_t vfadd_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-point Adds(带掩码)

vfadd_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfadd.vf vd, vs2, rs1, vm

◆ vfadd_vv_f32m1()

__rv32 vfloat32m1_t vfadd_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Adds

vfadd_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值:vfloat32m8_t

汇编指令:
vfadd.vv vd, vs2, vs1

◆ vfadd_vv_f32m1_m()

__rv32 vfloat32m1_t vfadd_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-point Adds(带掩码)

vfadd_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfadd.vv vd, vs2, vs1, vm

◆ vfclass_v_f32m1()

__rv32 vuint32m1_t vfclass_v_f32m1 ( vfloat32m1_t  op1)


Vector Floating-Point Classify

vfclass_v_f32:

LMUL = 1
op1: vfloat32m1_t
返回值: vuint32m1_t

LMUL = 2
op1: vfloat32m1_t
返回值: vuint32m1_t

LMUL = 4
op1: vfloat32m1_t
返回值: vuint32m1_t

LMUL = 8
op1: vfloat32m1_t
返回值: vuint32m1_t

汇编指令:
vfclass.v vd, vs1

◆ vfclass_v_f32m1_m()

__rv32 vuint32m1_t vfclass_v_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1 
)


Vector Floating-Point Classify(带掩码)

vfclass_v_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m1_t
返回值: vuint32m1_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
返回值: vuint32m1_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
返回值: vuint32m1_t

汇编指令:
vfclass.v vd, vs2, vm

◆ vfcvt_f_x_v_i32m1()

__rv32 vfloat32m1_t vfcvt_f_x_v_i32m1 ( vint32m1_t  op1)


Convert signed integer to float

vfcvt_f_x_v_i32:

LMUL = 1
op1: vint32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vint32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vint32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vint32m8_t
返回值: vfloat32m8_t

汇编指令:
vfcvt.f.x.v vd, vs2

◆ vfcvt_f_x_v_i32m1_m()

__rv32 vfloat32m1_t vfcvt_f_x_v_i32m1_m ( vmask_t  mask,
vint32m1_t  op1 
)


Convert signed integer to float(带掩码)

vfcvt_f_x_v_i32:

LMUL = 1
mask = vmask_t
op1: vint32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask = vmask_t
op1: vint32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask = vmask_t
op1: vint32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask = vmask_t
op1: vint32m8_t
返回值: vfloat32m8_t

汇编指令:
vfcvt.f.x.v vd, vs2, vm

◆ vfcvt_f_xu_v_u32m1()

__rv32 vfloat32m1_t vfcvt_f_xu_v_u32m1 ( vuint32m1_t  op1)


Convert unsigned integer to float

vfcvt_f_xu_v_u32:

LMUL = 1
op1: vuint32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vuint32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vuint32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vuint32m8_t
返回值: vfloat32m8_t

汇编指令:
vfcvt.f.xu.v vd, vs2

◆ vfcvt_f_xu_v_u32m1_m()

__rv32 vfloat32m1_t vfcvt_f_xu_v_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1 
)


Convert unsigned integer to float(带掩码)

vfcvt_f_xu_v_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
返回值: vfloat32m8_t

汇编指令:
vfcvt.f.xu.v vd, vs2

◆ vfcvt_x_f_v_f32m1()

__rv32 vint32m1_t vfcvt_x_f_v_f32m1 ( vfloat32m1_t  op1)


Convert float to signed integer

vfcvt_x_f_v_f32:

LMUL = 1
op1: vfloat32m1_t
返回值: vint32m1_t

LMUL = 2
op1: vfloat32m2_t
返回值: vint32m2_t

LMUL = 4
op1: vfloat32m4_t
返回值: vint32m4_t

LMUL = 8
op1: vfloat32m8_t
返回值: vint32m8_t

汇编指令:
vfcvt.x.f.v vd, vs2

◆ vfcvt_x_f_v_f32m1_m()

__rv32 vint32m1_t vfcvt_x_f_v_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1 
)


Convert float to signed integer(带掩码)

vfcvt_x_f_v_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
返回值: vint32m8_t

汇编指令:
vfcvt.x.f.v vd, vs2, vm

◆ vfcvt_xu_f_v_f32m1()

__rv32 vuint32m1_t vfcvt_xu_f_v_f32m1 ( vfloat32m1_t  op1)


Convert float to unsigned integer

vfcvt_xu_f_v_f32:

LMUL = 1
op1: vfloat32m1_t
返回值: vuint32m1_t

LMUL = 2
op1: vfloat32m2_t
返回值: vuint32m2_t

LMUL = 4
op1: vfloat32m4_t
返回值: vuint32m4_t

LMUL = 8
op1: vfloat32m8_t
返回值: vuint32m8_t

汇编指令:
vfcvt.xu.f.v vd, vs2

◆ vfcvt_xu_f_v_f32m1_m()

__rv32 vuint32m1_t vfcvt_xu_f_v_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1 
)


Convert float to unsigned integer(带掩码)

vfcvt_xu_f_v_f32:

LMUL = 1
mask: vmask_t
op1: float32_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: float32_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: float32_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: float32_t
返回值: vuint32m8_t

汇编指令:
vfcvt.xu.f.v vd, vs2, vm

◆ vfdiv_vf_f32m1()

__rv32 vfloat32m1_t vfdiv_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Divide

vfdiv_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfdiv.vf vd, vs2, rs1

◆ vfdiv_vf_f32m1_m()

__rv32 vfloat32m1_t vfdiv_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Divide(带掩码)

vfdiv_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfdiv.vf vd, vs2, rs1, vm

◆ vfdiv_vv_f32m1()

__rv32 vfloat32m1_t vfdiv_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Divide

vfdiv_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfdiv.vv vd, vs2, vs1

◆ vfdiv_vv_f32m1_m()

__rv32 vfloat32m1_t vfdiv_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Divide(带掩码)

vfdiv_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfdiv.vv vd, vs2, vs1, vm

◆ vfirst_m()

__rv32 uint32_t vfirst_m ( vmask_t  op1)


vfirst nd-rst-set mask bit

vfirst_m:


op1: vmask_t
返回值: uint32_t

汇编指令:
vfirst.m rd, vs2

◆ vfirst_m_m()

__rv32 uint32_t vfirst_m_m ( vmask_t  mask,
vmask_t  op1 
)


vfirst nd-rst-set mask bit

vfirst_m_m:

mask: vmask_t
op1: vmask_t
返回值: uint32_t

汇编指令:
vfirst.m rd, vs2, vm

◆ vfmacc_vf_f32m1()

__rv32 vfloat32m1_t vfmacc_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-accumulate, overwrites addend

vfmacc_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmacc.vf vd, rs1, vs2

◆ vfmacc_vf_f32m1_m()

__rv32 vfloat32m1_t vfmacc_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-accumulate, overwrites addend(带掩码)

vfmacc_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: int32_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmacc.vf vd, rs1, vs2, vm

◆ vfmacc_vv_f32m1()

__rv32 vfloat32m1_t vfmacc_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-accumulate, overwrites addend

vfmacc_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmacc.vv vd, vs1, vs2

◆ vfmacc_vv_f32m1_m()

__rv32 vfloat32m1_t vfmacc_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-accumulate, overwrites addend(带掩码)

vfmacc_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmacc.vv vd, vs1, vs2, vm

◆ vfmadd_vf_f32m1()

__rv32 vfloat32m1_t vfmadd_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-add, overwrites multiplicand

vfmadd_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmadd.vf vd, rs1, vs2

◆ vfmadd_vf_f32m1_m()

__rv32 vfloat32m1_t vfmadd_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-add, overwrites multiplicand(带掩码)

vfmadd_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmadd.vf vd, rs1, vs2, vm

◆ vfmadd_vv_f32m1()

__rv32 vfloat32m1_t vfmadd_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-add, overwrites multiplicand

vfmadd_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmadd.vv vd, vs1, vs2

◆ vfmadd_vv_f32m1_m()

__rv32 vfloat32m1_t vfmadd_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-add, overwrites multiplicand(带掩码)

vfmadd_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmadd.vv vd, vs1, vs2, vm

◆ vfmax_vf_f32m1()

__rv32 vfloat32m1_t vfmax_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point MIN/MAX Instructions

vfmax_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfmax.vf vd, vs2, rs1

◆ vfmax_vf_f32m1_m()

__rv32 vfloat32m1_t vfmax_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point MIN/MAX Instructions(带掩码)

vfmax_vf_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmax.vf vd, vs2, rs1, vm

◆ vfmax_vv_f32m1()

__rv32 vfloat32m1_t vfmax_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point MIN/MAX Instructions

vfmax_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmax.vv vd, vs2, vs1

◆ vfmax_vv_f32m1_m()

__rv32 vfloat32m1_t vfmax_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point MIN/MAX Instructions(带掩码)

vfmax_vv_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmax.vv vd, vs2, vs1, vm

◆ vfmerge_vfm_f32m1()

__rv32 vfloat32m1_t vfmerge_vfm_f32m1 ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Merge

vfmerge_vfm_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: float32_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: float32_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: float32_t
返回值: vuint32m8_t

汇编指令:
vfmerge.vfm vd, vs2, rs1

◆ vfmin_vf_f32m1()

__rv32 vfloat32m1_t vfmin_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point MIN/MAX Instructions

vfmin_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfmin.vf vd, vs2, rs1

◆ vfmin_vf_f32m1_m()

__rv32 vfloat32m1_t vfmin_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point MIN/MAX Instructions(带掩码)

vfmin_vf_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: float32_t
返回值: vfloat32m8_t

汇编指令:
vfmin.vf vd, vs2, rs1, vm

◆ vfmin_vv_f32m1()

__rv32 vfloat32m1_t vfmin_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point MIN/MAX Instructions

vfmin_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmin.vv vd, vs2, vs1

◆ vfmin_vv_f32m1_m()

__rv32 vfloat32m1_t vfmin_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point MIN/MAX Instructions(带掩码)

vfmin_vv_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmin.vv vd, vs2, vs1, vm

◆ vfmsac_vf_f32m1()

__rv32 vfloat32m1_t vfmsac_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-subtract-accumulator, overwrites subtrahend

vfmsac_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsac.vf vd, rs1, vs2

◆ vfmsac_vf_f32m1_m()

__rv32 vfloat32m1_t vfmsac_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-subtract-accumulator, overwrites subtrahend(带掩码)

vfmsac_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsac.vf vd, rs1, vs2, vm

◆ vfmsac_vv_f32m1()

__rv32 vfloat32m1_t vfmsac_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-subtract-accumulator, overwrites subtrahend

vfmsac_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsac.vv vd, vs1, vs2

◆ vfmsac_vv_f32m1_m()

__rv32 vfloat32m1_t vfmsac_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-subtract-accumulator, overwrites subtrahend(带掩码)

vfmsac_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsac.vv vd, vs1, vs2, vm

◆ vfmsub_vf_f32m1()

__rv32 vfloat32m1_t vfmsub_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-sub, overwrites multiplicand

vfmsub_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsub.vf vd, rs1, vs2

◆ vfmsub_vf_f32m1_m()

__rv32 vfloat32m1_t vfmsub_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP multiply-sub, overwrites multiplicand(带掩码)

vfmsub_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsub.vf vd, rs1, vs2, vm

◆ vfmsub_vv_f32m1()

__rv32 vfloat32m1_t vfmsub_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-sub, overwrites multiplicand

vfmsub_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsub.vv vd, vs1, vs2

◆ vfmsub_vv_f32m1_m()

__rv32 vfloat32m1_t vfmsub_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP multiply-sub, overwrites multiplicand(带掩码)

vfmsub_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmsub.vv vd, vs1, vs2, vm

◆ vfmul_vf_f32m1()

__rv32 vfloat32m1_t vfmul_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Multiply

vfmul_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfmul.vf vd, vs2, rs1

◆ vfmul_vf_f32m1_m()

__rv32 vfloat32m1_t vfmul_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Multiply(带掩码)

vfmul_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfmul.vf vd, vs2, rs1, vm

◆ vfmul_vv_f32m1()

__rv32 vfloat32m1_t vfmul_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Multiply Instructions

vfmul_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmul.vv vd, vs2, vs1

◆ vfmul_vv_f32m1_m()

__rv32 vfloat32m1_t vfmul_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Multiply(带掩码)

vfmul_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfmul.vv vd, vs2, vs1, vm

◆ vfmv_f_s_f32m1()

__rv32 float32_t vfmv_f_s_f32m1 ( vfloat32m1_t  op1)


Vector Floating-Point Scalar Move Instructions

vfmv_f_s_f32:

LMUL = 1
op1: vfloat32m1_t
返回值:float32_t

LMUL = 2
op1: vfloat32m2_t
返回值:float32_t

LMUL = 4
op1: vfloat32m4_t
返回值:float32_t

LMUL = 8
op1: vfloat32m8_t
返回值:float32_t

汇编指令:
vfmv.f.s rd, vs2

◆ vfmv_s_f_f32m1()

__rv32 vfloat32m1_t vfmv_s_f_f32m1 ( float32_t  op1)


Vector Floating-Point Scalar Move Instructions

vfmv_s_f_f32:

LMUL = 1
op1: float32_t
返回值:vfloat32m1_t

LMUL = 2
op1: float32_t
返回值:vfloat32m2_t

LMUL = 4
op1: float32_t
返回值:vfloat32m4_t

LMUL = 8
op1: float32_t
返回值:vfloat32m8_t

汇编指令:
vfmv.s.f vd, rs2

◆ vfmv_v_f32m1()

__rv32 vfloat32m1_t vfmv_v_f32m1 ( float32_t  op1)


Vector Floating-Point Move

vfmv_v_f32:

LMUL = 1
mask: vmask_t
op1: float32_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: float32_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: float32_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: float32_t
返回值: vuint32m8_t

汇编指令:
vfmv.v.f vd, rs1

◆ vfncvt_x_f_w_f32m2()

__rv32 vint16m1_t vfncvt_x_f_w_f32m2 ( vfloat32m2_t  op1)


Vector Narrowing Floating-Point/Integer Type-Convert Instructions

vfncvt_x_f_w_f32:

LMUL = 2
op1: vfloat32m2_t
返回值:vint16m1_t

LMUL = 4
op1: vfloat32m4
返回值:vint16m2_t

LMUL = 8
op1: vfloat32m8_t
返回值:vint16m4_t

汇编指令:
vfncvt.x.f.w vd, vs2

◆ vfncvt_x_f_w_f32m2_m()

__rv32 vint16m1_t vfncvt_x_f_w_f32m2_m ( vmask_t  mask,
vfloat32m2_t  op1 
)


Vector Narrowing Floating-Point/Integer Type-Convert Instructions (带掩码)

vfncvt_x_f_w_f32:

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
返回值:vint16m1_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4
返回值:vint16m2_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
返回值:vint16m4_t

汇编指令:
vfncvt.x.f.w vd, vs2, vm

◆ vfncvt_xu_f_w_f32m2()

__rv32 vuint16m1_t vfncvt_xu_f_w_f32m2 ( vfloat32m2_t  op1)


Vector Narrowing Floating-Point/Integer Type-Convert Instructions

vfncvt_xu_f_w_f32:

LMUL = 2
op1: vfloat32m2_t
返回值:vuint16m1_t

LMUL = 4
op1: vfloat32m4
返回值:vuint16m2_t

LMUL = 8
op1: vfloat32m8_t
返回值:vuint16m4_t

汇编指令:
vfncvt.xu.f.w vd, vs2

◆ vfncvt_xu_f_w_f32m2_m()

__rv32 vuint16m1_t vfncvt_xu_f_w_f32m2_m ( vmask_t  mask,
vfloat32m2_t  op1 
)


Vector Narrowing Floating-Point/Integer Type-Convert Instructions (带掩码)

vfncvt_xu_f_w_f32:

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
返回值:vuint16m1_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4
返回值:vuint16m2_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
返回值:vuint16m4_t

汇编指令:
vfncvt.xu.f.w vd, vs2, vm

◆ vfnmacc_vf_f32m1()

__rv32 vfloat32m1_t vfnmacc_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-accumulate), overwrites subtrahend

vfnmacc_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmacc.vf vd, rs1, vs2

◆ vfnmacc_vf_f32m1_m()

__rv32 vfloat32m1_t vfnmacc_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-accumulate), overwrites subtrahend(带掩码)

vfnmacc_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmacc.vf vd, rs1, vs2, vm

◆ vfnmacc_vv_f32m1()

__rv32 vfloat32m1_t vfnmacc_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-accumulate), overwrites subtrahend

vfnmacc_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmacc.vv vd, vs1, vs2

◆ vfnmacc_vv_f32m1_m()

__rv32 vfloat32m1_t vfnmacc_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-accumulate), overwrites subtrahend(带掩码)

vfnmacc_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmacc.vv vd, vs1, vs2, vm

◆ vfnmadd_vf_f32m1()

__rv32 vfloat32m1_t vfnmadd_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-add), overwrites multiplicand

vfnmadd_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmadd.vf vd, rs1, vs2

◆ vfnmadd_vf_f32m1_m()

__rv32 vfloat32m1_t vfnmadd_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-add), overwrites multiplicand(带掩码)

vfnmadd_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmadd.vf vd, rs1, vs2, vm

◆ vfnmadd_vv_f32m1()

__rv32 vfloat32m1_t vfnmadd_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-add), overwrites multiplicand

vfnmadd_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmadd.vv vd, vs1, vs2

◆ vfnmadd_vv_f32m1_m()

__rv32 vfloat32m1_t vfnmadd_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-add), overwrites multiplicand(带掩码)

vfnmadd_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmadd.vv vd, vs1, vs2, vm

◆ vfnmsac_vf_f32m1()

__rv32 vfloat32m1_t vfnmsac_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-subtract-accumulator), overwrites minuend

vfnmsac_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsac.vf vd, rs1, vs2

◆ vfnmsac_vf_f32m1_m()

__rv32 vfloat32m1_t vfnmsac_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-subtract-accumulator), overwrites minuend(带掩码)

vfnmsac_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsac.vf vd, rs1, vs2, vm

◆ vfnmsac_vv_f32m1()

__rv32 vfloat32m1_t vfnmsac_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-subtract-accumulator), overwrites minuend

vfnmsac_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsac.vv vd, vs1, vs2

◆ vfnmsac_vv_f32m1_m()

__rv32 vfloat32m1_t vfnmsac_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-subtract-accumulator), overwrites minuend(带掩码)

vfnmsac_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsac.vv vd, vs1, vs2, vm

◆ vfnmsub_vf_f32m1()

__rv32 vfloat32m1_t vfnmsub_vf_f32m1 ( vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-sub), overwrites multiplicand

vfnmsub_vf_f32:

LMUL = 1
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsub.vf vd, rs1, vs2

◆ vfnmsub_vf_f32m1_m()

__rv32 vfloat32m1_t vfnmsub_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
float32_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-sub), overwrites multiplicand(带掩码)

vfnmsub_vf_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: float32_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: float32_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: float32_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: float32_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsub.vf vd, rs1, vs2, vm

◆ vfnmsub_vv_f32m1()

__rv32 vfloat32m1_t vfnmsub_vv_f32m1 ( vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-sub), overwrites multiplicand

vfnmsub_vv_f32:

LMUL = 1
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsub.vv vd, vs1, vs2

◆ vfnmsub_vv_f32m1_m()

__rv32 vfloat32m1_t vfnmsub_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  acc,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


FP negate-(multiply-sub), overwrites multiplicand(带掩码)

vfnmsub_vv_f32:

LMUL = 1
mask: vmask_t
acc: vfloat32m1_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
acc: vfloat32m2_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
acc: vfloat32m4_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
acc: vfloat32m8_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfnmsub.vv vd, vs1, vs2, vm

◆ vfrdiv_vf_f32m1()

__rv32 vfloat32m1_t vfrdiv_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Divide

vfdiv_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfrdiv.vf vd, vs2, rs1

◆ vfrdiv_vf_f32m1_m()

__rv32 vfloat32m1_t vfrdiv_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Reverse Floating-point Divide(带掩码)

vfrdiv_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfrdiv.vf vd, vs2, rs1, vm

◆ vfredmax_vs_f32m1()

__rv32 vfloat32m1_t vfredmax_vs_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Maximum value

vfredmax_vs_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredmax.vs vd, vs2, rs1

◆ vfredmax_vs_f32m1_m()

__rv32 vfloat32m1_t vfredmax_vs_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Maximum value (带掩码)

vfredmax_vs_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredmax.vs vd, vs2, vs1, vm

◆ vfredmin_vs_f32m1()

__rv32 vfloat32m1_t vfredmin_vs_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Minimum value

vfredmin_vs_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredmin.vs vd, vs2, rs1

◆ vfredmin_vs_f32m1_m()

__rv32 vfloat32m1_t vfredmin_vs_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Minimum value (带掩码)

vfredmax_vs_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredmin.vs vd, vs2, vs1, vm

◆ vfredosum_vs_f32m1()

__rv32 vfloat32m1_t vfredosum_vs_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Ordered sum

vfredosum_vs_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredosum.vs vd, vs2, rs1

◆ vfredosum_vs_f32m1_m()

__rv32 vfloat32m1_t vfredosum_vs_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Ordered sum (带掩码)

vfredosum_vs_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredosum.vs vd, vs2, rs1, vm

◆ vfredsum_vs_f32m1()

__rv32 vfloat32m1_t vfredsum_vs_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Unordered sum

vfredsum_vs_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredsum.vs vd, vs2, rs1

◆ vfredsum_vs_f32m1_m()

__rv32 vfloat32m1_t vfredsum_vs_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Unordered sum (带掩码)

vfredmax_vs_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfredosum.vs vd, vs2, vs1, vm

◆ vfrsub_vf_f32m1()

__rv32 vfloat32m1_t vfrsub_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Reverse Subtract

vfrsub_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值:vfloat32m8_t

汇编指令:
vfrsub.vf vd, vs2, rs1

◆ vfrsub_vf_f32m1_m()

__rv32 vfloat32m1_t vfrsub_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-point Reverse Subtract(带掩码)

vfrsub_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfrsub.vf vd, vs2, rs1, vm

◆ vfsgnj_vf_f32m1()

__rv32 vfloat32m1_t vfsgnj_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Sign-Injection Instructions

vfsgnj_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfsgnj.vf vd, vs2, rs1

◆ vfsgnj_vf_f32m1_m()

__rv32 vfloat32m1_t vfsgnj_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Sign-Injection Instructions(带掩码)

vfsgnj_vf_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: float32_t
返回值: vfloat32m8_t

汇编指令:
vfsgnj.vf vd, vs2, rs1, vm

◆ vfsgnj_vv_f32m1()

__rv32 vfloat32m1_t vfsgnj_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Sign-Injection Instructions

vfsgnj_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsgnj.vv vd, vs2, vs1

◆ vfsgnj_vv_f32m1_m()

__rv32 vfloat32m1_t vfsgnj_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Sign-Injection Instructions(带掩码)

vfsgnj_vv_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsgnj.vv vd, vs2, vs1, vm

◆ vfsgnjn_vf_f32m1()

__rv32 vfloat32m1_t vfsgnjn_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Sign-Injection Instructions

vfsgnjn_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjn.vf vd, vs2, rs1

◆ vfsgnjn_vf_f32m1_m()

__rv32 vfloat32m1_t vfsgnjn_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Sign-Injection Instructions(带掩码)

vfsgnjn_vf_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: float32_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjn.vf vd, vs2, rs1, vm

◆ vfsgnjn_vv_f32m1()

__rv32 vfloat32m1_t vfsgnjn_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Sign-Injection Instructions

vfsgnjn_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjn.vv vd, vs2, vs1

◆ vfsgnjn_vv_f32m1_m()

__rv32 vfloat32m1_t vfsgnjn_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Sign-Injection Instructions(带掩码)

vfsgnjn_vv_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjn.vv vd, vs2, vs1, vm

◆ vfsgnjx_vf_f32m1()

__rv32 vfloat32m1_t vfsgnjx_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Sign-Injection Instructions

vfsgnjx_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjx.vf vd, vs2, rs1

◆ vfsgnjx_vf_f32m1_m()

__rv32 vfloat32m1_t vfsgnjx_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Sign-Injection Instructions(带掩码)

vfsgnjx_vf_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: float32_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: float32_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: float32_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: float32_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjx.vf vd, vs2, rs1, vm

◆ vfsgnjx_vv_f32m1()

__rv32 vfloat32m1_t vfsgnjx_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Sign-Injection Instructions

vfsgnjx_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjx.vv vd, vs2, vs1

◆ vfsgnjx_vv_f32m1_m()

__rv32 vfloat32m1_t vfsgnjx_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Sign-Injection Instructions(带掩码)

vfsgnjx_vv_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsgnjx.vv vd, vs2, vs1, vm

◆ vfsqrt_v_f32m1()

__rv32 vfloat32m1_t vfsqrt_v_f32m1 ( vfloat32m1_t  op1)


Vector Floating-Point Square-Root Instruction

vfsqrt_v_f32:

LMUL = 1
op1: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsqrt.v vd, vs2

◆ vfsqrt_v_f32m1_m()

__rv32 vfloat32m1_t vfsqrt_v_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1 
)


Vector Floating-Point Square-Root Instruction(带掩码)

vfsqrt_v_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsqrt.v vd, vs2, vm

◆ vfsub_vf_f32m1()

__rv32 vfloat32m1_t vfsub_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Subtract

vfsub_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: float32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: float32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: float32_t
返回值:vfloat32m8_t

汇编指令:
vfsub.vf vd, vs2, rs1

◆ vfsub_vf_f32m1_m()

__rv32 vfloat32m1_t vfsub_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Subtract(带掩码)

vfsub_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsub.vf vd, vs2, rs1, vm

◆ vfsub_vv_f32m1()

__rv32 vfloat32m1_t vfsub_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Subtract

vfsub_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值:vfloat32m8_t

汇编指令:
vfsub.vv vd, vs2, vs1

◆ vfsub_vv_f32m1_m()

__rv32 vfloat32m1_t vfsub_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-point Subtract(带掩码)

vfsub_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vfloat32m2_t
返回值: vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vfloat32m4_t
返回值: vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vfloat32m8_t
返回值: vfloat32m8_t

汇编指令:
vfsub.vv vd, vs2, vs1, vm

◆ vfwcvt_f_x_v_i16m1()

__rv32 vfloat32m2_t vfwcvt_f_x_v_i16m1 ( vint16m1_t  op1)


Widening Floating-Point/Integer Type-Convert Instructions

vfwcvt_f_xu_v_i16:

LMUL = 1
op1: vint16m1_t
返回值: vfloat32m2_t

LMUL = 2
op1: vint16m2_t
返回值: vfloat32m4_t

LMUL = 4
op1: vint16m4_t
返回值: vfloat32m8_t

汇编指令:
vfwcvt.f.x.v vd, vs2

◆ vfwcvt_f_x_v_i16m1_m()

__rv32 vfloat32m2_t vfwcvt_f_x_v_i16m1_m ( vmask_t  mask,
vint16m1_t  op1 
)


Widening Floating-Point/Integer Type-Convert Instructions(带掩码)

vfwcvt_f_x_v_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
返回值: vfloat32m2_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
返回值: vfloat32m4_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
返回值: vfloat32m8_t

汇编指令:
vfwcvt.f.x.v vd, vs2, vm

◆ vfwcvt_f_xu_v_u16m1()

__rv32 vfloat32m2_t vfwcvt_f_xu_v_u16m1 ( vuint16m1_t  op1)


Widening Floating-Point/Integer Type-Convert Instructions

vfwcvt_f_xu_v_u16:

LMUL = 1
op1: vuint16m1_t
返回值: vfloat32m2_t

LMUL = 2
op1: vuint16m2_t
返回值: vfloat32m4_t

LMUL = 4
op1: vuint16m4_t
返回值: vfloat32m8_t

汇编指令:
vfcvt.f.x.v vd, vs2

◆ vfwcvt_f_xu_v_u16m1_m()

__rv32 vfloat32m2_t vfwcvt_f_xu_v_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1 
)


Widening Floating-Pouint/uinteger Type-Convert Instructions(带掩码)

vfwcvt_f_xu_v_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
返回值: vfloat32m2_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
返回值: vfloat32m4_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
返回值: vfloat32m8_t

汇编指令:
vfwcvt.f.xu.v vd, vs2, vm

◆ vid_v_u16m1()

__rv32 vuint16m1_t vid_v_u16m1 ( void  )


Vector Element Index Instructions

vid_v_u16:

LMUL = 1
返回值: vuint16m1_t

LMUL = 2
返回值: vuint16m2_t

LMUL = 4
返回值: vuint16m4_t

LMUL = 8
返回值: vuint16m8_t

汇编指令:
vid.v vd

◆ vid_v_u16m1_m()

__rv32 vuint16m1_t vid_v_u16m1_m ( vmask_t  mask)


Vector Element Index Instruction

vid_v_u16:

LMUL = 1 mask: vmask_t
返回值: vuint16m1_t

LMUL = 2 mask: vmask_t
返回值: vuint16m2_t

LMUL = 4 mask: vmask_t
返回值: vuint16m4_t

LMUL = 8 mask: vmask_t
返回值: vuint16m8_t

汇编指令:
vid.v vd, vm

◆ vid_v_u32m1()

__rv32 vuint32m1_t vid_v_u32m1 ( void  )


Vector Element Index Instruction

vid_v_u32:

LMUL = 1
返回值: vuint32m1_t

LMUL = 2
返回值: vuint32m2_t

LMUL = 4
返回值: vuint32m4_t

LMUL = 8
返回值: vuint32m8_t

汇编指令:
vid.v vd

◆ vid_v_u32m1_m()

__rv32 vuint32m1_t vid_v_u32m1_m ( vmask_t  mask)


Vector Element Index Instruction

vid_v_u32:

LMUL = 1 mask: vmask_t
返回值: vuint32m1_t

LMUL = 2 mask: vmask_t
返回值: vuint32m2_t

LMUL = 4 mask: vmask_t
返回值: vuint32m4_t

LMUL = 8 mask: vmask_t
返回值: vuint32m8_t

汇编指令:
vid.v vd, vm

◆ vid_v_u8m1()

__rv32 vuint8m1_t vid_v_u8m1 ( void  )


Vector Element Index Instruction

vid_v_u8:

LMUL = 1
返回值: vuint8m1_t

LMUL = 2
返回值: vuint8m2_t

LMUL = 4
返回值: vuint8m4_t

LMUL = 8
返回值: vuint8m8_t

汇编指令:
vid.v vd

◆ vid_v_u8m1_m()

__rv32 vuint8m1_t vid_v_u8m1_m ( vmask_t  mask)


Vector Element Index Instruction

vid_v_u8:

LMUL = 1 mask: vmask_t
返回值: vuint8m1_t

LMUL = 2 mask: vmask_t
返回值: vuint8m2_t

LMUL = 4 mask: vmask_t
返回值: vuint8m4_t

LMUL = 8 mask: vmask_t
返回值: vuint8m8_t

汇编指令:
vid.v vd, vm

◆ viota_m()

__rv32 vmask_t viota_m ( vmask_t  op1)


vmsif.m set-including-rst mask bit

viota_m:


op1: vmask_t
返回值: vmask_t

汇编指令:
viota.m vd, vs2

◆ viota_m_m()

__rv32 vmask_t viota_m_m ( vmask_t  mask,
vmask_t  op1 
)


vmsif.m set-including-rst mask bit

viota_m_m:


mask: vmask_t
op1: vmask_t
返回值: vmask_t

汇编指令:
viota.m vd, vs2, vm

◆ vle_v_f32m1()

__rv32 vfloat32m1_t vle_v_f32m1 ( const float32_t *  base)


单位步长(unit-stride)load指令

vle_v_f32:

LMUL = 1
op1: const float32_t*
返回值:vfloat32m1_t

LMUL = 2
op1: const float32_t*
返回值:vfloat32m1_t

LMUL = 4
op1: const float32_t*
返回值:vfloat32m1_t

LMUL = 8
op1: const float32_t*
返回值:vfloat32m1_t

汇编指令:
vle.v vd, (rs1)

◆ vle_v_f32m1_m()

__rv32 vfloat32m1_t vle_v_f32m1_m ( vmask_t  mask,
const float32_t *  base 
)


单位步长(unit-stride)load指令(带掩码)

vle_v_f32:

LMUL = 1
op1: vmask_t
op2: const float32_t*
返回值:vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: const float32_t*
返回值:vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: const float32_t*
返回值:vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: const float32_t*
返回值:vfloat32m8_t

汇编指令:
vle.v vd, (rs1), vm

◆ vle_v_i16m1()

__rv32 vint16m1_t vle_v_i16m1 ( const int16_t *  base)


单位步长(unit-stride)load指令

vle_v_i16:

LMUL = 1
op1: const int16_t*
返回值:vint16m1_t

LMUL = 2
op1: const int16_t*
返回值:vint16m2_t

LMUL = 4
op1: const int16_t*
返回值:vint16m4_t

LMUL = 8
op1: const int16_t*
返回值:vint16m8_t

汇编指令:
vle.v vd, (rs1)

◆ vle_v_i16m1_m()

__rv32 vint16m1_t vle_v_i16m1_m ( vmask_t  mask,
const int16_t *  base 
)


单位步长(unit-stride)load指令(带掩码)

vle_v_i16:

LMUL = 1
op1: vmask_t
op2: const int16_t*
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: const int16_t*
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: const int16_t*
返回值:vint16m4_t

LMUL = 8
op1: vmask_t
op2: const int16_t*
返回值:vint16m8_t

汇编指令:
vle.v vd, (rs1), vm

◆ vle_v_i32m1()

__rv32 vint32m1_t vle_v_i32m1 ( const int32_t *  base)


单位步长(unit-stride)load指令

vle_v_i32:

LMUL = 1
op1: const int32_t*
返回值:vint32m1_t

LMUL = 2
op1: const int32_t*
返回值:vint32m2_t

LMUL = 4
op1: const int32_t*
返回值:vint32m4_t

LMUL = 8
op1: const int32_t*
返回值:vint32m8_t

汇编指令:
vle.v vd, (rs1)

◆ vle_v_i32m1_m()

__rv32 vint32m1_t vle_v_i32m1_m ( vmask_t  mask,
const int32_t *  base 
)


单位步长(unit-stride)load指令(带掩码)

vle_v_i32:

LMUL = 1
op1: vmask_t
op2: const int32_t*
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: const int32_t*
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: const int32_t*
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: const int32_t*
返回值:vint32m8_t

汇编指令:
vle.v vd, (rs1), vm

◆ vle_v_i8m1()

__rv32 vint8m1_t vle_v_i8m1 ( const int8_t *  base)


单位步长(unit-stride)load指令

vle_v_i8:

LMUL = 1
op1: const int8_t*
返回值:vint8m1_t

LMUL = 2
op1: const int8_t*
返回值:vint8m2_t

LMUL = 4
op1: const int8_t*
返回值:vint8m4_t

LMUL = 8
op1: const int8_t*
返回值:vint8m8_t

汇编指令:
vle.v vd, (rs1)

◆ vle_v_i8m1_m()

__rv32 vint8m1_t vle_v_i8m1_m ( vmask_t  mask,
const int8_t *  base 
)


单位步长(unit-stride)load指令(带掩码)

vle_v_i8:

LMUL = 1
op1: vmask_t
op2: const int8_t*
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: const int8_t*
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: const int8_t*
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: const int8_t*
返回值:vint8m8_t

汇编指令:
vle.v vd, (rs1), vm

◆ vle_v_u16m1()

__rv32 vuint16m1_t vle_v_u16m1 ( const uint16_t *  base)


单位步长(unit-stride)load指令

vle_v_u16:

LMUL = 1
op1: const uint16_t*
返回值:vint16m1_t

LMUL = 2
op1: const uint16_t*
返回值:vint16m2_t

LMUL = 4
op1: const uint16_t*
返回值:vint16m4_t

LMUL = 8
op1: const uint16_t*
返回值:vint16m8_t

汇编指令:
vle.v vd, (rs1)

◆ vle_v_u16m1_m()

__rv32 vuint16m1_t vle_v_u16m1_m ( vmask_t  mask,
const uint16_t *  base 
)


单位步长(unit-stride)load指令(带掩码)

vle_v_u16:

LMUL = 1
op1: vmask_t
op2: const uint16_t*
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: const uint16_t*
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: const uint16_t*
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: const uint16_t*
返回值:vuint16m8_t

汇编指令:
vle.v vd, (rs1), vm

◆ vle_v_u32m1()

__rv32 vuint32m1_t vle_v_u32m1 ( const uint32_t *  base)


单位步长(unit-stride)load指令

vle_v_u32:

LMUL = 1
op1: const uint32_t*
返回值:vuint32m1_t

LMUL = 2
op1: const uint32_t*
返回值:vuint32m2_t

LMUL = 4
op1: const uint32_t*
返回值:vuint32m4_t

LMUL = 8
op1: const uint32_t*
返回值:vuint32m8_t

汇编指令:
vle.v vd, (rs1)

◆ vle_v_u32m1_m()

__rv32 vuint32m1_t vle_v_u32m1_m ( vmask_t  mask,
const uint32_t *  base 
)


单位步长(unit-stride)load指令(带掩码)

vle_v_u32:

LMUL = 1
op1: vmask_t
op2: const uint32_t*
返回值:vuint32m1_t

LMUL = 2
op1: vmask_t
op2: const uint32_t*
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: const uint32_t*
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: const uint32_t*
返回值:vuint32m8_t

汇编指令:
vle.v vd, (rs1), vm

◆ vle_v_u8m1()

__rv32 vuint8m1_t vle_v_u8m1 ( const uint8_t *  base)


单位步长(unit-stride)load指令

vle_v_u8:

LMUL = 1
op1: const uint8_t*
返回值:vint8m1_t

LMUL = 2
op1: const uint8_t*
返回值:vint8m2_t

LMUL = 4
op1: const uint8_t*
返回值:vint8m4_t

LMUL = 8
op1: const uint8_t*
返回值:vint8m8_t

汇编指令:
vle.v vd, (rs1)

◆ vle_v_u8m1_m()

__rv32 vuint8m1_t vle_v_u8m1_m ( vmask_t  mask,
const uint8_t *  base 
)


单位步长(unit-stride)load指令(带掩码)

vle_v_u8:

LMUL = 1
op1: vmask_t
op2: const uint8_t*
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: const uint8_t*
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: const uint8_t*
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: const uint8_t*
返回值:vuint8m8_t

汇编指令:
vle.v vd, (rs1), vm

◆ vleff_v_f32m1()

__rv32 vfloat32m1_t vleff_v_f32m1 ( const float32_t *  base)


Unit-stride Fault-Only-First Loads

vleff_v_f32:

LMUL = 1
op1: const float32_t *
返回值:vfloat32m1_t

LMUL = 2
op1: const float32_t *
返回值:vfloat32m2_t

LMUL = 4
op1: const float32_t *
返回值:vfloat32m4_t

LMUL = 8
op1: const float32_t *
返回值:vfloat32m8_t

汇编指令:
vleff.v vd, (rs1)

◆ vleff_v_f32m1_m()

__rv32 vfloat32m1_t vleff_v_f32m1_m ( vmask_t  mask,
const float32_t *  base 
)


Unit-stride Fault-Only-First Loads(带掩码)

vleff_v_f32:

LMUL = 1
op1: vmask_t
op2: const float32_t *
返回值:vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: const float32_t *
返回值:vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: const float32_t *
返回值:vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: const float32_t *
返回值:vfloat32m8_t

汇编指令:
vleff.v vd, (rs1), vm

◆ vleff_v_i16m1()

__rv32 vint16m1_t vleff_v_i16m1 ( const int16_t *  base)


Unit-stride Fault-Only-First Loads

vleff_v_i16:

LMUL = 1
op1: const int16_t *
返回值:vint16m1_t

LMUL = 2
op1: const int16_t *
返回值:vint16m2_t

LMUL = 4
op1: const int16_t *
返回值:vint16m4_t

LMUL = 8
op1: const int16_t *
返回值:vint16m8_t

汇编指令:
vleff.v vd, (rs1)

◆ vleff_v_i16m1_m()

__rv32 vint16m1_t vleff_v_i16m1_m ( vmask_t  mask,
const int16_t *  base 
)


Unit-stride Fault-Only-First Loads(带掩码)

vleff_v_i16:

LMUL = 1
op1: vmask_t
op2: const int16_t *
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: const int16_t *
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: const int16_t *
返回值:vint16m4_t

LMUL = 8
op1: vmask_t
op2: const int16_t *
返回值:vint16m8_t

汇编指令:
vleff.v vd, (rs1), vm

◆ vleff_v_i32m1()

__rv32 vint32m1_t vleff_v_i32m1 ( const int32_t *  base)


Unit-stride Fault-Only-First Loads

vleff_v_i32:

LMUL = 1
op1: const int32_t *
返回值:vint32m1_t

LMUL = 2
op1: const int32_t *
返回值:vint32m2_t

LMUL = 4
op1: const int32_t *
返回值:vint32m4_t

LMUL = 8
op1: const int32_t *
返回值:vint32m8_t

汇编指令:
vleff.v vd, (rs1)

◆ vleff_v_i32m1_m()

__rv32 vint32m1_t vleff_v_i32m1_m ( vmask_t  mask,
const int32_t *  base 
)


Unit-stride Fault-Only-First Loads(带掩码)

vleff_v_i32:

LMUL = 1
op1: vmask_t
op2: const int32_t *
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: const int32_t *
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: const int32_t *
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: const int32_t *
返回值:vint32m8_t

汇编指令:
vleff.v vd, (rs1), vm

◆ vleff_v_i8m1()

__rv32 vint8m1_t vleff_v_i8m1 ( const int8_t *  base)


Unit-stride Fault-Only-First Loads

vleff_v_i8:

LMUL = 1
op1: const int8_t *
返回值:vint8m1_t

LMUL = 2
op1: const int8_t *
返回值:vint8m2_t

LMUL = 4
op1: const int8_t *
返回值:vint8m4_t

LMUL = 8
op1: const int8_t *
返回值:vint8m8_t

汇编指令:
vleff.v vd, (rs1)

◆ vleff_v_i8m1_m()

__rv32 vint8m1_t vleff_v_i8m1_m ( vmask_t  mask,
const int8_t *  base 
)


Unit-stride Fault-Only-First Loads(带掩码)

vleff_v_i8:

LMUL = 1
op1: vmask_t
op2: const int8_t *
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: const int8_t *
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: const int8_t *
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: const int8_t *
返回值:vint8m8_t

汇编指令:
vleff.v vd, (rs1), vm

◆ vleff_v_u16m1()

__rv32 vuint16m1_t vleff_v_u16m1 ( const uint16_t *  base)


Unit-stride Fault-Only-First Loads

vleff_v_u16:

LMUL = 1
op1: const uint16_t *
返回值:vuint16m1_t

LMUL = 2
op1: const uint16_t *
返回值:vuint16m2_t

LMUL = 4
op1: const uint16_t *
返回值:vuint16m4_t

LMUL = 8
op1: const uint16_t *
返回值:vuint16m8_t

汇编指令:
vleff.v vd, (rs1)

◆ vleff_v_u16m1_m()

__rv32 vuint16m1_t vleff_v_u16m1_m ( vmask_t  mask,
const uint16_t *  base 
)


Unit-stride Fault-Only-First Loads(带掩码)

vleff_v_u16:

LMUL = 1
op1: vmask_t
op2: const uint16_t *
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: const uint16_t *
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: const uint16_t *
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: const uint16_t *
返回值:vuint16m8_t

汇编指令:
vleff.v vd, (rs1), vm

◆ vleff_v_u32m1()

__rv32 vuint32m1_t vleff_v_u32m1 ( const uint32_t *  base)


Unit-stride Fault-Only-First Loads

vleff_v_u32:

LMUL = 1
op1: const uint32_t *
返回值:vuint32m1_t

LMUL = 2
op1: const uint32_t *
返回值:vuint32m2_t

LMUL = 4
op1: const uint32_t *
返回值:vuint32m4_t

LMUL = 8
op1: const uint32_t *
返回值:vuint32m8_t

汇编指令:
vleff.v vd, (rs1)

◆ vleff_v_u32m1_m()

__rv32 vuint32m1_t vleff_v_u32m1_m ( vmask_t  mask,
const uint32_t *  base 
)


Unit-stride Fault-Only-First Loads(带掩码)

vleff_v_u32:

LMUL = 1
op1: vmask_t
op2: const uint32_t *
返回值:vuint32m1_t

LMUL = 2
op1: vmask_t
op2: const uint32_t *
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: const uint32_t *
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: const uint32_t *
返回值:vuint32m8_t

汇编指令:
vleff.v vd, (rs1), vm

◆ vleff_v_u8m1()

__rv32 vuint8m1_t vleff_v_u8m1 ( const uint8_t *  base)


Unit-stride Fault-Only-First Loads

vleff_v_u8:

LMUL = 1
op1: const uint8_t *
返回值:vuint8m1_t

LMUL = 2
op1: const uint8_t *
返回值:vuint8m2_t

LMUL = 4
op1: const uint8_t *
返回值:vuint8m4_t

LMUL = 8
op1: const uint8_t *
返回值:vuint8m8_t

汇编指令:
vleff.v vd, (rs1)

◆ vleff_v_u8m1_m()

__rv32 vuint8m1_t vleff_v_u8m1_m ( vmask_t  mask,
const uint8_t *  base 
)


Unit-stride Fault-Only-First Loads(带掩码)

vleff_v_u8:

LMUL = 1
op1: vmask_t
op2: const uint8_t *
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: const uint8_t *
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: const uint8_t *
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: const uint8_t *
返回值:vuint8m8_t

汇编指令:
vleff.v vd, (rs1), vm

◆ vlse_v_f32m1()

__rv32 vfloat32m1_t vlse_v_f32m1 ( const float32_t *  base,
const int32_t  stride 
)


Vector strided loads and stores

vlse_v_f32:

LMUL = 1
op1: const float32_t*
op2: const int32_t
返回值:vfloat32m1_t

LMUL = 2
op1: const float32_t*
op2: const int32_t
返回值:vfloat32m2_t

LMUL = 4
op1: const float32_t*
op2: const int32_t
返回值:vfloat32m4_t

LMUL = 8
op1: const float32_t*
op2: const int32_t
返回值:vfloat32m8_t

汇编指令:
vlse.v vd, (rs1), rs2

◆ vlse_v_f32m1_m()

__rv32 vfloat32m1_t vlse_v_f32m1_m ( vmask_t  mask,
const float32_t *  base,
const int32_t  stride 
)


Vector strided loads and stores(带掩码)

vlse_v_f32:

LMUL = 1
op1: vmask_t
op2: const float32_t*
op3: const int32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: const float32_t*
op3: const int32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: const float32_t*
op3: const int32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: const float32_t*
op3: const int32_t
返回值:vfloat32m8_t

汇编指令:
vlse.v vd, (rs1), rs2, vm

◆ vlse_v_i16m1()

__rv32 vint16m1_t vlse_v_i16m1 ( const int16_t *  base,
const int32_t  stride 
)


Vector strided loads and stores

vlse_v_i16:

LMUL = 1
op1: const int16_t*
op2: const int32_t
返回值:vint16m1_t

LMUL = 2
op1: const int16_t*
op2: const int32_t
返回值:vint16m2_t

LMUL = 4
op1: const int16_t*
op2: const int32_t
返回值:vint16m4_t

LMUL = 8
op1: const int16_t*
op2: const int32_t
返回值:vint16m8_t

汇编指令:
vlse.v vd, (rs1), rs2

◆ vlse_v_i16m1_m()

__rv32 vint16m1_t vlse_v_i16m1_m ( vmask_t  mask,
const int16_t *  base,
const int32_t  stride 
)


Vector strided loads and stores(带掩码)

vlse_v_i16:

LMUL = 1
op1: vmask_t
op2: const int16_t*
op3: const int32_t
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: const int16_t*
op3: const int32_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: const int16_t*
op3: const int32_t
返回值:vint16m4_t

LMUL = 8
op1: vmask_t
op2: const int16_t*
op3: const int32_t
返回值:vint16m8_t

汇编指令:
vlse.v vd, (rs1), rs2, vm

◆ vlse_v_i32m1()

__rv32 vint32m1_t vlse_v_i32m1 ( const int32_t *  base,
const int32_t  stride 
)


Vector strided loads and stores

vlse_v_i32:

LMUL = 1
op1: const int32_t*
op2: const int32_t
返回值:vint32m1_t

LMUL = 2
op1: const int32_t*
op2: const int32_t
返回值:vint32m2_t

LMUL = 4
op1: const int32_t*
op2: const int32_t
返回值:vint32m4_t

LMUL = 8
op1: const int32_t*
op2: const int32_t
返回值:vint32m8_t

汇编指令:
vlse.v vd, (rs1), rs2

◆ vlse_v_i32m1_m()

__rv32 vint32m1_t vlse_v_i32m1_m ( vmask_t  mask,
const int32_t *  base,
const int32_t  stride 
)


Vector strided loads and stores(带掩码)

vlse_v_i32:

LMUL = 1
op1: vmask_t
op2: const int32_t*
op3: const int32_t
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: const int32_t*
op3: const int32_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: const int32_t*
op3: const int32_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: const int32_t*
op3: const int32_t
返回值:vint32m8_t

汇编指令:
vlse.v vd, (rs1), rs2, vm

◆ vlse_v_i8m1()

__rv32 vint8m1_t vlse_v_i8m1 ( const int8_t *  base,
const int32_t  stride 
)


Vector strided loads and stores

vlse_v_i8:

LMUL = 1
op1: const int8_t*
op2: const int32_t
返回值:vint8m1_t

LMUL = 2
op1: const int8_t*
op2: const int32_t
返回值:vint8m2_t

LMUL = 4
op1: const int8_t*
op2: const int32_t
返回值:vint8m4_t

LMUL = 8
op1: const int8_t*
op2: const int32_t
返回值:vint8m8_t

汇编指令:
vlse.v vd, (rs1), rs2

◆ vlse_v_i8m1_m()

__rv32 vint8m1_t vlse_v_i8m1_m ( vmask_t  mask,
const int8_t *  base,
const int32_t  stride 
)


Vector strided loads and stores(带掩码)

vlse_v_i8:

LMUL = 1
op1: vmask_t
op2: const int8_t*
op3: const int32_t
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: const int8_t*
op3: const int32_t
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: const int8_t*
op3: const int32_t
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: const int8_t*
op3: const int32_t
返回值:vint8m8_t

汇编指令:
vlse.v vd, (rs1), rs2, vm

◆ vlse_v_u16m1()

__rv32 vuint16m1_t vlse_v_u16m1 ( const uint16_t *  base,
const int32_t  stride 
)


Vector strided loads and stores

vlse_v_u16:

LMUL = 1
op1: const uint16_t*
op2: const int32_t
返回值:vuint16m1_t

LMUL = 2
op1: const uint16_t*
op2: const int32_t
返回值:vuint16m2_t

LMUL = 4
op1: const uint16_t*
op2: const int32_t
返回值:vuint16m4_t

LMUL = 8
op1: const uint16_t*
op2: const int32_t
返回值:vuint16m8_t

汇编指令:
vlse.v vd, (rs1), rs2

◆ vlse_v_u16m1_m()

__rv32 vuint16m1_t vlse_v_u16m1_m ( vmask_t  mask,
const uint16_t *  base,
const int32_t  stride 
)


Vector strided loads and stores(带掩码)

vlse_v_u16:

LMUL = 1
op1: vmask_t
op2: const uint16_t*
op3: const int32_t
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: const uint16_t*
op3: const int32_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: const uint16_t*
op3: const int32_t
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: const uint16_t*
op3: const int32_t
返回值:vuint16m8_t

汇编指令:
vlse.v vd, (rs1), rs2, vm

◆ vlse_v_u32m1()

__rv32 vuint32m1_t vlse_v_u32m1 ( const uint32_t *  base,
const int32_t  stride 
)


Vector strided loads and stores

vlse_v_u32:

LMUL = 1
op1: const uint32_t*
op2: const int32_t
返回值:vuint32m1_t

LMUL = 2
op1: const uint32_t*
op2: const int32_t
返回值:vuint32m2_t

LMUL = 4
op1: const uint32_t*
op2: const int32_t
返回值:vuint32m4_t

LMUL = 8
op1: const uint32_t*
op2: const int32_t
返回值:vuint32m8_t

汇编指令:
vlse.v vd, (rs1), rs2

◆ vlse_v_u32m1_m()

__rv32 vuint32m1_t vlse_v_u32m1_m ( vmask_t  mask,
const uint32_t *  base,
const int32_t  stride 
)


Vector strided loads and stores(带掩码)

vlse_v_u32:

LMUL = 1
op1: vmask_t
op2: const uint32_t*
op3: const int32_t
返回值:vuint32m1_t

LMUL = 2
op1: vmask_t
op2: const uint32_t*
op3: const int32_t
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: const uint32_t*
op3: const int32_t
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: const uint32_t*
op3: const int32_t
返回值:vuint32m8_t

汇编指令:
vlse.v vd, (rs1), rs2, vm

◆ vlse_v_u8m1()

__rv32 vuint8m1_t vlse_v_u8m1 ( const uint8_t *  base,
const int32_t  stride 
)


Vector strided loads and stores

vlse_v_u8:

LMUL = 1
op1: const uint8_t*
op2: const int32_t
返回值:vuint8m1_t

LMUL = 2
op1: const uint8_t*
op2: const int32_t
返回值:vuint8m2_t

LMUL = 4
op1: const uint8_t*
op2: const int32_t
返回值:vuint8m4_t

LMUL = 8
op1: const uint8_t*
op2: const int32_t
返回值:vuint8m8_t

汇编指令:
vlse.v vd, (rs1), rs2

◆ vlse_v_u8m1_m()

__rv32 vuint8m1_t vlse_v_u8m1_m ( vmask_t  mask,
const uint8_t *  base,
const int32_t  stride 
)


Vector strided loads and stores(带掩码)

vlse_v_u8:

LMUL = 1
op1: vmask_t
op2: const uint8_t*
op3: const int32_t
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: const uint8_t*
op3: const int32_t
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: const uint8_t*
op3: const int32_t
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: const uint8_t*
op3: const int32_t
返回值:vuint8m8_t

汇编指令:
vlse.v vd, (rs1), rs2, vm

◆ vlxe_v_f32m1()

__rv32 vfloat32m1_t vlxe_v_f32m1 ( const float32_t *  base,
vuint32m1_t  index 
)


Vector indexed loads and stores

vlxe_v_f32:

LMUL = 1
op1: const float32_t*
op2: vuint32m1_t
返回值:vfloat32m1_t

LMUL = 2
op1: const float32_t*
op2: vuint32m2_t
返回值:vfloat32m2_t

LMUL = 4
op1: const float32_t*
op2: vuint32m4_t
返回值:vfloat32m4_t

LMUL = 8
op1: const float32_t*
op2: vuint32m8_t
返回值:vfloat32m8_t

汇编指令:
vlxe.v vd, (rs1), vs2

◆ vlxe_v_f32m1_m()

__rv32 vfloat32m1_t vlxe_v_f32m1_m ( vmask_t  mask,
const float32_t *  base,
vuint32m1_t  index 
)


Vector indexed loads and stores(带掩码)

vlxe_v_f32:

LMUL = 1
op1: vmask_t
op2: const float32_t*
op3: vuint32m1_t
返回值:vfloat32m1_t

LMUL = 2
op1: vmask_t
op2: const float32_t*
op3: vuint32m2_t
返回值:vfloat32m2_t

LMUL = 4
op1: vmask_t
op2: const float32_t*
op3: vuint32m4_t
返回值:vfloat32m4_t

LMUL = 8
op1: vmask_t
op2: const float32_t*
op3: vuint32m8_t
返回值:vfloat32m8_t

汇编指令:
vlxe.v vd, (rs1), vs2, vm

◆ vlxe_v_i16m1()

__rv32 vint16m1_t vlxe_v_i16m1 ( const int16_t *  base,
vuint16m1_t  index 
)


Vector indexed loads and stores

vlxe_v_i16:

LMUL = 1
op1: const int16_t*
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: const int8_t*
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: const int8_t*
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: const int8_t*
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vlxe.v vd, (rs1), vs2

◆ vlxe_v_i16m1_m()

__rv32 vint16m1_t vlxe_v_i16m1_m ( vmask_t  mask,
const int16_t *  base,
vuint16m1_t  index 
)


Vector indexed loads and stores(带掩码)

vlxe_v_i16:

LMUL = 1
op1: vmask_t
op2: const int16_t*
op3: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: const int16_t*
op3: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: const int16_t*
op3: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vmask_t
op2: const int16_t*
op3: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vlxe.v vd, (rs1), vs2, vm

◆ vlxe_v_i32m1()

__rv32 vint32m1_t vlxe_v_i32m1 ( const int32_t *  base,
vuint32m1_t  index 
)


Vector indexed loads and stores

vlxe_v_i32:

LMUL = 1
op1: const int32_t*
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: const int32_t*
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: const int32_t*
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: const int32_t*
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vlxe.v vd, (rs1), vs2

◆ vlxe_v_i32m1_m()

__rv32 vint32m1_t vlxe_v_i32m1_m ( vmask_t  mask,
const int32_t *  base,
vuint32m1_t  index 
)


Vector indexed loads and stores(带掩码)

vlxe_v_i32:

LMUL = 1
op1: vmask_t
op2: const int32_t*
op3: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: const int32_t*
op3: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: const int32_t*
op3: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: const int32_t*
op3: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vlxe.v vd, (rs1), vs2, vm

◆ vlxe_v_i8m1()

__rv32 vint8m1_t vlxe_v_i8m1 ( const int8_t *  base,
vuint8m1_t  index 
)


Vector indexed loads and stores

vlxe_v_i8:

LMUL = 1
op1: const int8_t*
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: const int8_t*
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: const int8_t*
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: const int8_t*
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vlxe.v vd, (rs1), vs2

◆ vlxe_v_i8m1_m()

__rv32 vint8m1_t vlxe_v_i8m1_m ( vmask_t  mask,
const int8_t *  base,
vuint8m1_t  index 
)


Vector indexed loads and stores(带掩码)

vlxe_v_i8:

LMUL = 1
op1: vmask_t
op2: const int8_t*
op3: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: const int8_t*
op3: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: const int8_t*
op3: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: const int8_t*
op3: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vlxe.v vd, (rs1), vs2, vm

◆ vlxe_v_u16m1()

__rv32 vuint16m1_t vlxe_v_u16m1 ( const uint16_t *  base,
vuint16m1_t  index 
)


Vector indexed loads and stores

vlxe_v_u16:

LMUL = 1
op1: const uint16_t*
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: const uint16_t*
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: const uint16_t*
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: const uint16_t*
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vlxe.v vd, (rs1), vs2

◆ vlxe_v_u16m1_m()

__rv32 vuint16m1_t vlxe_v_u16m1_m ( vmask_t  mask,
const uint16_t *  base,
vuint16m1_t  index 
)


Vector indexed loads and stores(带掩码)

vlxe_v_u16:

LMUL = 1
op1: vmask_t
op2: const uint16_t*
op3: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: const uint16_t*
op3: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: const uint16_t*
op3: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: const uint16_t*
op3: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vlxe.v vd, (rs1), vs2, vm

◆ vlxe_v_u32m1()

__rv32 vuint32m1_t vlxe_v_u32m1 ( const uint32_t *  base,
vuint32m1_t  index 
)


Vector indexed loads and stores

vlxe_v_u32:

LMUL = 1
op1: const uint32_t*
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: const uint32_t*
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: const uint32_t*
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: const uint32_t*
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vlxe.v vd, (rs1), vs2

◆ vlxe_v_u32m1_m()

__rv32 vuint32m1_t vlxe_v_u32m1_m ( vmask_t  mask,
const uint32_t *  base,
vuint32m1_t  index 
)


Vector indexed loads and stores(带掩码)

vlxe_v_u32:

LMUL = 1
op1: vmask_t
op2: const uint32_t*
op3: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vmask_t
op2: const uint32_t*
op3: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: const uint32_t*
op3: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: const uint32_t*
op3: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vlxe.v vd, (rs1), vs2, vm

◆ vlxe_v_u8m1()

__rv32 vuint8m1_t vlxe_v_u8m1 ( const uint8_t *  base,
vuint8m1_t  index 
)


Vector indexed loads and stores

vlxe_v_u8:

LMUL = 1
op1: const uint8_t*
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: const uint8_t*
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: const uint8_t*
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: const uint8_t*
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vlxe.v vd, (rs1), vs2

◆ vlxe_v_u8m1_m()

__rv32 vuint8m1_t vlxe_v_u8m1_m ( vmask_t  mask,
const uint8_t *  base,
vuint8m1_t  index 
)


Vector indexed loads and stores(带掩码)

vlxe_v_u8:

LMUL = 1
op1: vmask_t
op2: const uint8_t*
op3: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: const uint8_t*
op3: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: const uint8_t*
op3: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: const uint8_t*
op3: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vlxe.v vd, (rs1), vs2, vm

◆ vmacc_vv_i16m1()

__rv32 vint16m1_t vmacc_vv_i16m1 ( vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vv_i16:

LMUL = 1
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmacc.vv vd, vs1, vs2

◆ vmacc_vv_i16m1_m()

__rv32 vint16m1_t vmacc_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vv_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmacc.vv vd, vs1, vs2, vm

◆ vmacc_vv_i32m1()

__rv32 vint32m1_t vmacc_vv_i32m1 ( vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vv_i32:

LMUL = 1
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmacc.vv vd, vs1, vs2

◆ vmacc_vv_i32m1_m()

__rv32 vint32m1_t vmacc_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vv_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmacc.vv vd, vs1, vs2, vm

◆ vmacc_vv_i8m1()

__rv32 vint8m1_t vmacc_vv_i8m1 ( vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vv_i8:

LMUL = 1
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmacc.vv vd, vs1, vs2

◆ vmacc_vv_i8m1_m()

__rv32 vint8m1_t vmacc_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vv_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmacc.vv vd, vs1, vs2, vm

◆ vmacc_vv_u16m1()

__rv32 vuint16m1_t vmacc_vv_u16m1 ( vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vv_u16:

LMUL = 1
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmacc.vv vd, vs1, vs2

◆ vmacc_vv_u16m1_m()

__rv32 vuint16m1_t vmacc_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vv_u16:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmacc.vv vd, vs1, vs2, vm

◆ vmacc_vv_u32m1()

__rv32 vuint32m1_t vmacc_vv_u32m1 ( vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vv_u32:

LMUL = 1
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmacc.vv vd, vs1, vs2

◆ vmacc_vv_u32m1_m()

__rv32 vuint32m1_t vmacc_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vv_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmacc.vv vd, vs1, vs2, vm

◆ vmacc_vv_u8m1()

__rv32 vuint8m1_t vmacc_vv_u8m1 ( vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vv_u8:

LMUL = 1
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmacc.vv vd, vs1, vs2

◆ vmacc_vv_u8m1_m()

__rv32 vuint8m1_t vmacc_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vv_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmacc.vv vd, vs1, vs2, vm

◆ vmacc_vx_i16m1()

__rv32 vint16m1_t vmacc_vx_i16m1 ( vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vx_i16:

LMUL = 1
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmacc.vx vd, rs1, vs2

◆ vmacc_vx_i16m1_m()

__rv32 vint16m1_t vmacc_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vx_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmacc.vx vd, rs1, vs2, vm

◆ vmacc_vx_i32m1()

__rv32 vint32m1_t vmacc_vx_i32m1 ( vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vx_i32:

LMUL = 1
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmacc.vx vd, rs1, vs2

◆ vmacc_vx_i32m1_m()

__rv32 vint32m1_t vmacc_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vx_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmacc.vx vd, rs1, vs2, vm

◆ vmacc_vx_i8m1()

__rv32 vint8m1_t vmacc_vx_i8m1 ( vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vx_i8:

LMUL = 1
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmacc.vx vd, rs1, vs2

◆ vmacc_vx_i8m1_m()

__rv32 vint8m1_t vmacc_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vx_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmacc.vx vd, rs1, vs2, vm

◆ vmacc_vx_u16m1()

__rv32 vuint16m1_t vmacc_vx_u16m1 ( vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vx_u16:

LMUL = 1
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmacc.vx vd, rs1, vs2

◆ vmacc_vx_u16m1_m()

__rv32 vuint16m1_t vmacc_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vx_u16:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmacc.vx vd, rs1, vs2, vm

◆ vmacc_vx_u32m1()

__rv32 vuint32m1_t vmacc_vx_u32m1 ( vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vx_u32:

LMUL = 1
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmacc.vx vd, rs1, vs2

◆ vmacc_vx_u32m1_m()

__rv32 vuint32m1_t vmacc_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vx_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmacc.vx vd, rs1, vs2, vm

◆ vmacc_vx_u8m1()

__rv32 vuint8m1_t vmacc_vx_u8m1 ( vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmacc_vx_u8:

LMUL = 1
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmacc.vx vd, rs1, vs2

◆ vmacc_vx_u8m1_m()

__rv32 vuint8m1_t vmacc_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmacc_vx_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmacc.vx vd, rs1, vs2, vm

◆ vmadc_vv_i16m1()

__rv32 vmask_t vmadc_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Produce carry out in mask register format

vmadc_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值: vmask_t

汇编指令:
vmadc.vv vd, vs2, vs1

◆ vmadc_vv_i32m1()

__rv32 vmask_t vmadc_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Produce carry out in mask register format

vmadc_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值: vmask_t

汇编指令:
vmadc.vv vd, vs2, vs1

◆ vmadc_vv_i8m1()

__rv32 vmask_t vmadc_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Produce carry out in mask register format

vmadc_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值: vmask_t

汇编指令:
vmadc.vv vd, vs2, vs1

◆ vmadc_vv_u16m1()

__rv32 vmask_t vmadc_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Produce carry out in mask register format

vmadc_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值: vmask_t

汇编指令:
vmadc.vv vd, vs2, vs1

◆ vmadc_vv_u32m1()

__rv32 vmask_t vmadc_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Produce carry out in mask register format

vmadc_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值: vmask_t

汇编指令:
vmadc.vv vd, vs2, vs1

◆ vmadc_vv_u8m1()

__rv32 vmask_t vmadc_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Produce carry out in mask register format

vmadc_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值: vmask_t

汇编指令:
vmadc.vv vd, vs2, vs1

◆ vmadc_vvm_i16m1()

__rv32 vmask_t vmadc_vvm_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vvm_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vvm vd, vs2, vs1, v0

◆ vmadc_vvm_i32m1()

__rv32 vmask_t vmadc_vvm_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vvm_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vvm vd, vs2, vs1, v0

◆ vmadc_vvm_i8m1()

__rv32 vmask_t vmadc_vvm_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vvm_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vvm vd, vs2, vs1, v0

◆ vmadc_vvm_u16m1()

__rv32 vmask_t vmadc_vvm_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vvm_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vvm vd, vs2, vs1, v0

◆ vmadc_vvm_u32m1()

__rv32 vmask_t vmadc_vvm_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vvm_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vvm vd, vs2, vs1, v0

◆ vmadc_vvm_u8m1()

__rv32 vmask_t vmadc_vvm_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vvm_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vvm vd, vs2, vs1, v0

◆ vmadc_vx_i16m1()

__rv32 vmask_t vmadc_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Produce carry out in mask register format

vmadc_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值: vmask_t

汇编指令:
vmadc.vx vd, vs2, rs1

◆ vmadc_vx_i32m1()

__rv32 vmask_t vmadc_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Produce carry out in mask register format

vmadc_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值: vmask_t

汇编指令:
vmadc.vx vd, vs2, rs1

◆ vmadc_vx_i8m1()

__rv32 vmask_t vmadc_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Produce carry out in mask register format

vmadc_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值: vmask_t

汇编指令:
vmadc.vx vd, vs2, rs1

◆ vmadc_vx_u16m1()

__rv32 vmask_t vmadc_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Produce carry out in mask register format

vmadc_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值: vmask_t

汇编指令:
vmadc.vx vd, vs2, rs1

◆ vmadc_vx_u32m1()

__rv32 vmask_t vmadc_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Produce carry out in mask register format

vmadc_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值: vmask_t

汇编指令:
vmadc.vx vd, vs2, rs1

◆ vmadc_vx_u8m1()

__rv32 vmask_t vmadc_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Produce carry out in mask register format

vmadc_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值: vmask_t

汇编指令:
vmadc.vx vd, vs2, rs1

◆ vmadc_vxm_i16m1()

__rv32 vmask_t vmadc_vxm_i16m1 ( vint16m1_t  op1,
int16_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vxm_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vxm vd, vs2, rs1, v0

◆ vmadc_vxm_i32m1()

__rv32 vmask_t vmadc_vxm_i32m1 ( vint32m1_t  op1,
int32_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vxm_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vxm vd, vs2, rs1, v0

◆ vmadc_vxm_i8m1()

__rv32 vmask_t vmadc_vxm_i8m1 ( vint8m1_t  op1,
int8_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vxm_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vxm vd, vs2, rs1, v0

◆ vmadc_vxm_u16m1()

__rv32 vmask_t vmadc_vxm_u16m1 ( vuint16m1_t  op1,
uint16_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vxm_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vxm vd, vs2, rs1, v0

◆ vmadc_vxm_u32m1()

__rv32 vmask_t vmadc_vxm_u32m1 ( vuint32m1_t  op1,
uint32_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vxm_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vxm vd, vs2, rs1, v0

◆ vmadc_vxm_u8m1()

__rv32 vmask_t vmadc_vxm_u8m1 ( vuint8m1_t  op1,
uint8_t  op2,
vmask_t  carryin 
)


Produce carry out in mask register format

vmadc_vxm_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
carryin: vmask_t
返回值: vmask_t

汇编指令:
vmadc.vxm vd, vs2, rs1, v0

◆ vmadd_vv_i16m1()

__rv32 vint16m1_t vmadd_vv_i16m1 ( vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vv_i16:

LMUL = 1
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmadd.vv vd, vs1, vs2

◆ vmadd_vv_i16m1_m()

__rv32 vint16m1_t vmadd_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vv_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmadd.vv vd, vs1, vs2, vm

◆ vmadd_vv_i32m1()

__rv32 vint32m1_t vmadd_vv_i32m1 ( vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vv_i32:

LMUL = 1
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmadd.vv vd, vs1, vs2

◆ vmadd_vv_i32m1_m()

__rv32 vint32m1_t vmadd_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vv_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmadd.vv vd, vs1, vs2, vm

◆ vmadd_vv_i8m1()

__rv32 vint8m1_t vmadd_vv_i8m1 ( vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vv_i8:

LMUL = 1
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmadd.vv vd, vs1, vs2

◆ vmadd_vv_i8m1_m()

__rv32 vint8m1_t vmadd_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vv_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmadd.vv vd, vs1, vs2, vm

◆ vmadd_vv_u16m1()

__rv32 vuint16m1_t vmadd_vv_u16m1 ( vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vv_u16:

LMUL = 1
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmadd.vv vd, vs1, vs2

◆ vmadd_vv_u16m1_m()

__rv32 vuint16m1_t vmadd_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vv_u16:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmadd.vv vd, vs1, vs2, vm

◆ vmadd_vv_u32m1()

__rv32 vuint32m1_t vmadd_vv_u32m1 ( vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vv_u32:

LMUL = 1
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmadd.vv vd, vs1, vs2

◆ vmadd_vv_u32m1_m()

__rv32 vuint32m1_t vmadd_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vv_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmadd.vv vd, vs1, vs2, vm

◆ vmadd_vv_u8m1()

__rv32 vuint8m1_t vmadd_vv_u8m1 ( vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vv_u8:

LMUL = 1
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmadd.vv vd, vs1, vs2

◆ vmadd_vv_u8m1_m()

__rv32 vuint8m1_t vmadd_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vv_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmadd.vv vd, vs1, vs2, vm

◆ vmadd_vx_i16m1()

__rv32 vint16m1_t vmadd_vx_i16m1 ( vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vx_i16:

LMUL = 1
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmadd.vx vd, rs1, vs2

◆ vmadd_vx_i16m1_m()

__rv32 vint16m1_t vmadd_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vx_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmadd.vx vd, rs1, vs2, vm

◆ vmadd_vx_i32m1()

__rv32 vint32m1_t vmadd_vx_i32m1 ( vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vx_i32:

LMUL = 1
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmadd.vx vd, rs1, vs2

◆ vmadd_vx_i32m1_m()

__rv32 vint32m1_t vmadd_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vx_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmadd.vx vd, rs1, vs2, vm

◆ vmadd_vx_i8m1()

__rv32 vint8m1_t vmadd_vx_i8m1 ( vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vx_i8:

LMUL = 1
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmadd.vx vd, rs1, vs2

◆ vmadd_vx_i8m1_m()

__rv32 vint8m1_t vmadd_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vx_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmadd.vx vd, rs1, vs2, vm

◆ vmadd_vx_u16m1()

__rv32 vuint16m1_t vmadd_vx_u16m1 ( vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vx_u16:

LMUL = 1
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmadd.vx vd, rs1, vs2

◆ vmadd_vx_u16m1_m()

__rv32 vuint16m1_t vmadd_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vx_u8:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmadd.vx vd, rs1, vs2, vm

◆ vmadd_vx_u32m1()

__rv32 vuint32m1_t vmadd_vx_u32m1 ( vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vx_u32:

LMUL = 1
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmadd.vx vd, rs1, vs2

◆ vmadd_vx_u32m1_m()

__rv32 vuint32m1_t vmadd_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vx_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmadd.vx vd, rs1, vs2, vm

◆ vmadd_vx_u8m1()

__rv32 vuint8m1_t vmadd_vx_u8m1 ( vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vmadd_vx_u8:

LMUL = 1
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmadd.vx vd, rs1, vs2

◆ vmadd_vx_u8m1_m()

__rv32 vuint8m1_t vmadd_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vmadd_vx_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmadd.vx vd, rs1, vs2, vm

◆ vmand_mm()

__rv32 vmask_t vmand_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmand_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmand.mm vd, vs2, vs1

◆ vmandnot_mm()

__rv32 vmask_t vmandnot_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmandnot_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmandnot.mm vd, vs2, vs1

◆ vmax_vv_i16m1()

__rv32 vint16m1_t vmax_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Min/Max Instructions

vmax_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmax.vv vd, vs2, vs1

◆ vmax_vv_i16m1_m()

__rv32 vint16m1_t vmax_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmax_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmax.vv vd, vs2, vs1, vm

◆ vmax_vv_i32m1()

__rv32 vint32m1_t vmax_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Min/Max Instructions

vmax_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmax.vv vd, vs2, vs1

◆ vmax_vv_i32m1_m()

__rv32 vint32m1_t vmax_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmax_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmax.vv vd, vs2, vs1, vm

◆ vmax_vv_i8m1()

__rv32 vint8m1_t vmax_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Min/Max Instructions

vmax_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmax.vv vd, vs2, vs1

◆ vmax_vv_i8m1_m()

__rv32 vint8m1_t vmax_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmax_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmax.vv vd, vs2, vs1, vm

◆ vmax_vx_i16m1()

__rv32 vint16m1_t vmax_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Min/Max Instructions

vmax_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vmax.vx vd, vs2, rs1

◆ vmax_vx_i16m1_m()

__rv32 vint16m1_t vmax_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmax_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vmax.vx vd, vs2, rs1, vm

◆ vmax_vx_i32m1()

__rv32 vint32m1_t vmax_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Min/Max Instructions

vmax_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vmax.vx vd, vs2, rs1

◆ vmax_vx_i32m1_m()

__rv32 vint32m1_t vmax_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmax_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vmax.vx vd, vs2, rs1, vm

◆ vmax_vx_i8m1()

__rv32 vint8m1_t vmax_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Min/Max Instructions

vmax_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vmax.vx vd, vs2, rs1

◆ vmax_vx_i8m1_m()

__rv32 vint8m1_t vmax_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmax_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vmax.vx vd, vs2, rs1, vm

◆ vmaxu_vv_u16m1()

__rv32 vuint16m1_t vmaxu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Min/Max Instructions

vmaxu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmaxu.vv vd, vs2, vs1

◆ vmaxu_vv_u16m1_m()

__rv32 vuint16m1_t vmaxu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmaxu_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmaxu.vv vd, vs2, vs1, vm

◆ vmaxu_vv_u32m1()

__rv32 vuint32m1_t vmaxu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Min/Max Instructions

vmaxu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmaxu.vv vd, vs2, vs1

◆ vmaxu_vv_u32m1_m()

__rv32 vuint32m1_t vmaxu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmaxu_vv_i32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmaxu.vv vd, vs2, vs1, vm

◆ vmaxu_vv_u8m1()

__rv32 vuint8m1_t vmaxu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Min/Max Instructions

vmaxu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmaxu.vv vd, vs2, vs1

◆ vmaxu_vv_u8m1_m()

__rv32 vuint8m1_t vmaxu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmaxu_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmaxu.vv vd, vs2, vs1, vm

◆ vmaxu_vx_u16m1()

__rv32 vuint16m1_t vmaxu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Min/Max Instructions

vmaxu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vmaxu.vx vd, vs2, rs1

◆ vmaxu_vx_u16m1_m()

__rv32 vuint16m1_t vmaxu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmaxu_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vmaxu.vx vd, vs2, rs1, vm

◆ vmaxu_vx_u32m1()

__rv32 vuint32m1_t vmaxu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Min/Max Instructions

vmaxu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vmaxu.vx vd, vs2, rs1

◆ vmaxu_vx_u32m1_m()

__rv32 vuint32m1_t vmaxu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmaxu_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vmaxu.vx vd, vs2, rs1, vm

◆ vmaxu_vx_u8m1()

__rv32 vuint8m1_t vmaxu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Min/Max Instructions

vmaxu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vmaxu.vx vd, vs2, rs1

◆ vmaxu_vx_u8m1_m()

__rv32 vuint8m1_t vmaxu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmaxu_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vmaxu.vx vd, vs2, rs1, vm

◆ vmerge_vvm_i16m1_m()

__rv32 vint16m1_t vmerge_vvm_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Merge Instructions

vmerge_vvm_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值: vint16m8_t

汇编指令:
vmerge.vvm vd, vs2, vs1, v0

◆ vmerge_vvm_i32m1_m()

__rv32 vint32m1_t vmerge_vvm_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Merge Instructions

vmerge_vvm_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值: vint32m8_t

汇编指令:
vmerge.vvm vd, vs2, vs1, v0

◆ vmerge_vvm_i8m1_m()

__rv32 vint8m1_t vmerge_vvm_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Merge Instructions

vmerge_vvm_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值: vint8m8_t

汇编指令:
vmerge.vvm vd, vs2, vs1, v0

◆ vmerge_vxm_i16m1_m()

__rv32 vint16m1_t vmerge_vxm_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Merge Instructions

vmerge_vxm_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值: vint16m8_t

汇编指令:
vmerge.vxm vd, vs2, rs1, v0

◆ vmerge_vxm_i32m1_m()

__rv32 vint32m1_t vmerge_vxm_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Merge Instructions

vmerge_vxm_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值: vint32m8_t

汇编指令:
vmerge.vxm vd, vs2, rs1, v0

◆ vmerge_vxm_i8m1_m()

__rv32 vint8m1_t vmerge_vxm_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Merge Instructions

vmerge_vxm_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值: vint8m8_t

汇编指令:
vmerge.vxm vd, vs2, rs1, v0

◆ vmfeq_vf_f32m1()

__rv32 vmask_t vmfeq_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Compare Equal

vmfeq_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfeq.vf vd, vs2, rs1

◆ vmfeq_vf_f32m1_m()

__rv32 vmask_t vmfeq_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Equal(带掩码)

vmfeq_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfeq.vf vd, vs2, rs1, vm

◆ vmfeq_vv_f32m1()

__rv32 vmask_t vmfeq_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Compare Equal

vmfeq_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmfeq.vv vd, vs2, vs1

◆ vmfeq_vv_f32m1_m()

__rv32 vmask_t vmfeq_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Equal(带掩码)

vmfeq_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmfeq.vv vd, vs2, vs1, vm

◆ vmfge_vf_f32m1()

__rv32 vmask_t vmfge_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Compare Greater Than or Equal

vmfge_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfge.vf vd, vs2, rs1

◆ vmfge_vf_f32m1_m()

__rv32 vmask_t vmfge_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Greater Than or Equal(带掩码)

vmfgt_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfgt.vf vd, vs2, rs1, vm

◆ vmfgt_vf_f32m1()

__rv32 vmask_t vmfgt_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Compare Greater Than

vmfgt_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfgt.vf vd, vs2, rs1

◆ vmfgt_vf_f32m1_m()

__rv32 vmask_t vmfgt_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Greater Than(带掩码)

vmfgt_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfgt.vf vd, vs2, rs1, vm

◆ vmfle_vf_f32m1()

__rv32 vmask_t vmfle_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Compare Less Than or Equal

vmflt_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmflt.vf vd, vs2, rs1

◆ vmfle_vf_f32m1_m()

__rv32 vmask_t vmfle_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Less Than or Equal(带掩码)

vmfle_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfle.vf vd, vs2, rs1, vm

◆ vmfle_vv_f32m1()

__rv32 vmask_t vmfle_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Compare Less Than or Equal

vmfle_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmfle.vv vd, vs2, vs1

◆ vmfle_vv_f32m1_m()

__rv32 vmask_t vmfle_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Less Than or Equal(带掩码)

vmfle_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmfle.vv vd, vs2, vs1, vm

◆ vmflt_vf_f32m1()

__rv32 vmask_t vmflt_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Compare Less Than

vmflt_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmflt.vf vd, vs2, rs1

◆ vmflt_vf_f32m1_m()

__rv32 vmask_t vmflt_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Less Than(带掩码)

vmflt_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmflt.vf vd, vs2, rs1, vm

◆ vmflt_vv_f32m1()

__rv32 vmask_t vmflt_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Compare Less Than

vmflt_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmflt.vv vd, vs2, vs1

◆ vmflt_vv_f32m1_m()

__rv32 vmask_t vmflt_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Less Than(带掩码)

vmflt_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmflt.vv vd, vs2, vs1, vm

◆ vmfne_vf_f32m1()

__rv32 vmask_t vmfne_vf_f32m1 ( vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Compare Not Equal

vmfne_vf_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfne.vf vd, vs2, rs1

◆ vmfne_vf_f32m1_m()

__rv32 vmask_t vmfne_vf_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
float32_t  op2 
)


Vector Floating-Point Not Equal(带掩码)

vmfne_vf_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: float32_t
返回值: vmask_t

汇编指令:
vmfne.vf vd, vs2, rs1, vm

◆ vmfne_vv_f32m1()

__rv32 vmask_t vmfne_vv_f32m1 ( vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Compare Not Equal

vmfne_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmfne.vv vd, vs2, vs1

◆ vmfne_vv_f32m1_m()

__rv32 vmask_t vmfne_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vfloat32m1_t  op2 
)


Vector Floating-Point Not Equal(带掩码)

vmfne_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 2
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 4
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

LMUL = 8
mask: vmask_t
op1: vfloat32m1_t
op2: vfloat32m1_t
返回值: vmask_t

汇编指令:
vmfne.vv vd, vs2, vs1, vm

◆ vmin_vv_i16m1()

__rv32 vint16m1_t vmin_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Min/Max Instructions

vmin_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmin.vv vd, vs2, vs1

◆ vmin_vv_i16m1_m()

__rv32 vint16m1_t vmin_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmin_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vmin.vv vd, vs2, vs1, vm

◆ vmin_vv_i32m1()

__rv32 vint32m1_t vmin_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Min/Max Instructions

vmin_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmin.vv vd, vs2, vs1

◆ vmin_vv_i32m1_m()

__rv32 vint32m1_t vmin_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmin_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vmin.vv vd, vs2, vs1, vm

◆ vmin_vv_i8m1()

__rv32 vint8m1_t vmin_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Min/Max Instructions

vmin_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmin.vv vd, vs2, vs1

◆ vmin_vv_i8m1_m()

__rv32 vint8m1_t vmin_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmin_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vmin.vv vd, vs2, vs1, vm

◆ vmin_vx_i16m1()

__rv32 vint16m1_t vmin_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Min/Max Instructions

vmin_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vmin.vx vd, vs2, rs1

◆ vmin_vx_i16m1_m()

__rv32 vint16m1_t vmin_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmin_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vmin.vx vd, vs2, rs1, vm

◆ vmin_vx_i32m1()

__rv32 vint32m1_t vmin_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Min/Max Instructions

vmin_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vmin.vx vd, vs2, rs1

◆ vmin_vx_i32m1_m()

__rv32 vint32m1_t vmin_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmin_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vmin.vx vd, vs2, rs1, vm

◆ vmin_vx_i8m1()

__rv32 vint8m1_t vmin_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Min/Max Instructions

vmin_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vmin.vx vd, vs2, rs1

◆ vmin_vx_i8m1_m()

__rv32 vint8m1_t vmin_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vmin_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vmin.vx vd, vs2, rs1, vm

◆ vminu_vv_u16m1()

__rv32 vuint16m1_t vminu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Min/Max Instructions

vminu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vminu.vv vd, vs2, vs1

◆ vminu_vv_u16m1_m()

__rv32 vuint16m1_t vminu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vminu_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vminu.vv vd, vs2, vs1, vm

◆ vminu_vv_u32m1()

__rv32 vuint32m1_t vminu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Min/Max Instructions

vminu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vminu.vv vd, vs2, vs1

◆ vminu_vv_u32m1_m()

__rv32 vuint32m1_t vminu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vminu_vv_i32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vminu.vv vd, vs2, vs1, vm

◆ vminu_vv_u8m1()

__rv32 vuint8m1_t vminu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Min/Max Instructions

vminu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vminu.vv vd, vs2, vs1

◆ vminu_vv_u8m1_m()

__rv32 vuint8m1_t vminu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vminu_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vminu.vv vd, vs2, vs1, vm

◆ vminu_vx_u16m1()

__rv32 vuint16m1_t vminu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Min/Max Instructions

vminu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vminu.vx vd, vs2, rs1

◆ vminu_vx_u16m1_m()

__rv32 vuint16m1_t vminu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vminu_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vminu.vx vd, vs2, rs1, vm

◆ vminu_vx_u32m1()

__rv32 vuint32m1_t vminu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Min/Max Instructions

vminu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vminu.vx vd, vs2, rs1

◆ vminu_vx_u32m1_m()

__rv32 vuint32m1_t vminu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vminu_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vminu.vx vd, vs2, rs1, vm

◆ vminu_vx_u8m1()

__rv32 vuint8m1_t vminu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Min/Max Instructions

vminu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vminu.vx vd, vs2, rs1

◆ vminu_vx_u8m1_m()

__rv32 vuint8m1_t vminu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Min/Max Instructions (带掩码)

vminu_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vminu.vx vd, vs2, rs1, vm

◆ vmnand_mm()

__rv32 vmask_t vmnand_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmnand_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmnand.mm vd, vs2, vs1

◆ vmnor_mm()

__rv32 vmask_t vmnor_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmnor_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmnor.mm vd, vs2, vs1

◆ vmor_mm()

__rv32 vmask_t vmor_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmor_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmor.mm vd, vs2, vs1

◆ vmornot_mm()

__rv32 vmask_t vmornot_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmornot_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmornot.mm vd, vs2, vs1

◆ vmsbc_vv_i16m1()

__rv32 vmask_t vmsbc_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Produce borrow out in mask register format

vmsbc_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值: vmask_t

汇编指令:
vmsbc.vv vd, vs2, vs1

◆ vmsbc_vv_i32m1()

__rv32 vmask_t vmsbc_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Produce borrow out in mask register format

vmsbc_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值: vmask_t

汇编指令:
vmsbc.vv vd, vs2, vs1

◆ vmsbc_vv_i8m1()

__rv32 vmask_t vmsbc_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Produce borrow out in mask register format

vmsbc_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值: vmask_t

汇编指令:
vmsbc.vv vd, vs2, vs1

◆ vmsbc_vv_u16m1()

__rv32 vmask_t vmsbc_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Produce borrow out in mask register format

vmsbc_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值: vmask_t

汇编指令:
vmsbc.vv vd, vs2, vs1

◆ vmsbc_vv_u32m1()

__rv32 vmask_t vmsbc_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Produce borrow out in mask register format

vmsbc_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值: vmask_t

汇编指令:
vmsbc.vv vd, vs2, vs1

◆ vmsbc_vv_u8m1()

__rv32 vmask_t vmsbc_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Produce borrow out in mask register format

vmsbc_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值: vmask_t

汇编指令:
vmsbc.vv vd, vs2, vs1

◆ vmsbc_vvm_i16m1()

__rv32 vmask_t vmsbc_vvm_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vvm_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vvm vd, vs2, vs1, v0

◆ vmsbc_vvm_i32m1()

__rv32 vmask_t vmsbc_vvm_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vvm_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vvm vd, vs2, vs1, v0

◆ vmsbc_vvm_i8m1()

__rv32 vmask_t vmsbc_vvm_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vvm_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vvm vd, vs2, vs1, v0

◆ vmsbc_vvm_u16m1()

__rv32 vmask_t vmsbc_vvm_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vvm_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vvm vd, vs2, vs1, v0

◆ vmsbc_vvm_u32m1()

__rv32 vmask_t vmsbc_vvm_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vvm_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vvm vd, vs2, vs1, v0

◆ vmsbc_vvm_u8m1()

__rv32 vmask_t vmsbc_vvm_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vvm_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vvm vd, vs2, vs1, v0

◆ vmsbc_vx_i16m1()

__rv32 vmask_t vmsbc_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Produce borrow out in mask register format

vmsbc_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值: vmask_t

汇编指令:
vmsbc.vx vd, vs2, rs1

◆ vmsbc_vx_i32m1()

__rv32 vmask_t vmsbc_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Produce borrow out in mask register format

vmsbc_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值: vmask_t

汇编指令:
vmsbc.vx vd, vs2, rs1

◆ vmsbc_vx_i8m1()

__rv32 vmask_t vmsbc_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Produce borrow out in mask register format

vmsbc_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值: vmask_t

汇编指令:
vmsbc.vx vd, vs2, rs1

◆ vmsbc_vx_u16m1()

__rv32 vmask_t vmsbc_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Produce borrow out in mask register format

vmsbc_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值: vmask_t

汇编指令:
vmsbc.vx vd, vs2, rs1

◆ vmsbc_vx_u32m1()

__rv32 vmask_t vmsbc_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Produce borrow out in mask register format

vmsbc_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值: vmask_t

汇编指令:
vmsbc.vx vd, vs2, rs1

◆ vmsbc_vx_u8m1()

__rv32 vmask_t vmsbc_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Produce borrow out in mask register format

vmsbc_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值: vmask_t

汇编指令:
vmsbc.vx vd, vs2, rs1

◆ vmsbc_vxm_i16m1()

__rv32 vmask_t vmsbc_vxm_i16m1 ( vint16m1_t  op1,
int16_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vxm_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vxm vd, vs2, rs1, v0

◆ vmsbc_vxm_i32m1()

__rv32 vmask_t vmsbc_vxm_i32m1 ( vint32m1_t  op1,
int32_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vxm_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vxm vd, vs2, rs1, v0

◆ vmsbc_vxm_i8m1()

__rv32 vmask_t vmsbc_vxm_i8m1 ( vint8m1_t  op1,
int8_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vxm_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vxm vd, vs2, rs1, v0

◆ vmsbc_vxm_u16m1()

__rv32 vmask_t vmsbc_vxm_u16m1 ( vuint16m1_t  op1,
uint16_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vxm_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vxm vd, vs2, rs1, v0

◆ vmsbc_vxm_u32m1()

__rv32 vmask_t vmsbc_vxm_u32m1 ( vuint32m1_t  op1,
uint32_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vxm_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vxm vd, vs2, rs1, v0

◆ vmsbc_vxm_u8m1()

__rv32 vmask_t vmsbc_vxm_u8m1 ( vuint8m1_t  op1,
uint8_t  op2,
vmask_t  borrowin 
)


Produce borrow out in mask register format

vmsbc_vxm_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
borrowin: vmask_t
返回值: vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
borrowin: vmask_t
返回值: vmask_t

汇编指令:
vmsbc.vxm vd, vs2, rs1, v0

◆ vmsbf_m()

__rv32 vmask_t vmsbf_m ( vmask_t  op1)


vmsbf.m set-before-rst mask bit

vmsbf_m:


op1: vmask_t
返回值: vmask_t

汇编指令:
vmsbf.m vd, vs2

◆ vmsbf_m_m()

__rv32 vmask_t vmsbf_m_m ( vmask_t  mask,
vmask_t  op1 
)


vmsbf.m set-before-rst mask bit

vmsbf_m_m:


mask: vmask_t
op1: vmask_t
返回值: vmask_t

汇编指令:
vmsbf.m vd, vs2, vm

◆ vmseq_vv_i16m1()

__rv32 vmask_t vmseq_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1

◆ vmseq_vv_i16m1_m()

__rv32 vmask_t vmseq_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vv_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: vint16m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1, vm

◆ vmseq_vv_i32m1()

__rv32 vmask_t vmseq_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1

◆ vmseq_vv_i32m1_m()

__rv32 vmask_t vmseq_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vv_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint32m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1, vm

◆ vmseq_vv_i8m1()

__rv32 vmask_t vmseq_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1

◆ vmseq_vv_i8m1_m()

__rv32 vmask_t vmseq_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vv_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: vint8m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1, vm

◆ vmseq_vv_u16m1()

__rv32 vmask_t vmseq_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1

◆ vmseq_vv_u16m1_m()

__rv32 vmask_t vmseq_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vv_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: vuint16m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1, vm

◆ vmseq_vv_u32m1()

__rv32 vmask_t vmseq_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1

◆ vmseq_vv_u32m1_m()

__rv32 vmask_t vmseq_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vv_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: vuint32m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1, vm

◆ vmseq_vv_u8m1()

__rv32 vmask_t vmseq_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1

◆ vmseq_vv_u8m1_m()

__rv32 vmask_t vmseq_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vv_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: vuint8m8_t
返回值:vmask_t

汇编指令:
vmseq.vv vd, vs2, vs1, vm

◆ vmseq_vx_i16m1()

__rv32 vmask_t vmseq_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1

◆ vmseq_vx_i16m1_m()

__rv32 vmask_t vmseq_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vx_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1, vm

◆ vmseq_vx_i32m1()

__rv32 vmask_t vmseq_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1

◆ vmseq_vx_i32m1_m()

__rv32 vmask_t vmseq_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vx_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1, vm

◆ vmseq_vx_i8m1()

__rv32 vmask_t vmseq_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1

◆ vmseq_vx_i8m1_m()

__rv32 vmask_t vmseq_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1, vm

◆ vmseq_vx_u16m1()

__rv32 vmask_t vmseq_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1

◆ vmseq_vx_u16m1_m()

__rv32 vmask_t vmseq_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vx_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1, vm

◆ vmseq_vx_u32m1()

__rv32 vmask_t vmseq_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1

◆ vmseq_vx_u32m1_m()

__rv32 vmask_t vmseq_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vx_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1, vm

◆ vmseq_vx_u8m1()

__rv32 vmask_t vmseq_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions equal

vmseq_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1

◆ vmseq_vx_u8m1_m()

__rv32 vmask_t vmseq_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions equal(带掩码)

vmseq_vx_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t
返回值:vmask_t

汇编指令:
vmseq.vx vd, vs2, rs1, vm

◆ vmsgt_vx_i16m1()

__rv32 vmask_t vmsgt_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions greater than, signed

vmsgt_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vmask_t

汇编指令:
vmsgt.vx vd, vs2, rs1

◆ vmsgt_vx_i16m1_m()

__rv32 vmask_t vmsgt_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions greater than, signed(带掩码)

vmsgt_vx_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t
返回值:vmask_t

汇编指令:
vmsgt.vx vd, vs2, rs1, vm

◆ vmsgt_vx_i32m1()

__rv32 vmask_t vmsgt_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions greater than, signed

vmsgt_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vmask_t

汇编指令:
vmsgt.vx vd, vs2, rs1

◆ vmsgt_vx_i32m1_m()

__rv32 vmask_t vmsgt_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions greater than, signed(带掩码)

vmsgt_vx_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t
返回值:vmask_t

汇编指令:
vmsgt.vx vd, vs2, rs1, vm

◆ vmsgt_vx_i8m1()

__rv32 vmask_t vmsgt_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions greater than, signed

vmsgt_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vmask_t

汇编指令:
vmsgt.vx vd, vs2, rs1

◆ vmsgt_vx_i8m1_m()

__rv32 vmask_t vmsgt_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions greater than, signed(带掩码)

vmsgt_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t
返回值:vmask_t

汇编指令:
vmsgt.vx vd, vs2, rs1, vm

◆ vmsgtu_vx_u16m1()

__rv32 vmask_t vmsgtu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions greater than, unsigned

vmsgtu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vmask_t

汇编指令:
vmsgtu.vx vd, vs2, rs1

◆ vmsgtu_vx_u16m1_m()

__rv32 vmask_t vmsgtu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions greater than, unsigned(带掩码)

vmsgtu_vx_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t
返回值:vmask_t

汇编指令:
vmsgtu.vx vd, vs2, rs1, vm

◆ vmsgtu_vx_u32m1()

__rv32 vmask_t vmsgtu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions greater than, unsigned

vmsgtu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vmask_t

汇编指令:
vmsgtu.vx vd, vs2, rs1

◆ vmsgtu_vx_u32m1_m()

__rv32 vmask_t vmsgtu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions greater than, unsigned(带掩码)

vmsgtu_vx_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t
返回值:vmask_t

汇编指令:
vmsgtu.vx vd, vs2, rs1, vm

◆ vmsgtu_vx_u8m1()

__rv32 vmask_t vmsgtu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions greater than, unsigned

vmsgtu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vmask_t

汇编指令:
vmsgtu.vx vd, vs2, rs1

◆ vmsgtu_vx_u8m1_m()

__rv32 vmask_t vmsgtu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions greater than, unsigned(带掩码)

vmsgtu_vx_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t
返回值:vmask_t

汇编指令:
vmsgtu.vx vd, vs2, rs1, vm

◆ vmsif_m()

__rv32 vmask_t vmsif_m ( vmask_t  op1)


vmsif.m set-including-rst mask bit

vmsif_m:


op1: vmask_t
返回值: vmask_t

汇编指令:
vmsif.m vd, vs2

◆ vmsif_m_m()

__rv32 vmask_t vmsif_m_m ( vmask_t  mask,
vmask_t  op1 
)


vmsif.m set-including-rst mask bit

vmsif_m_m:


mask: vmask_t
op1: vmask_t
返回值: vmask_t

汇编指令:
vmsif.m vd, vs2, vm

◆ vmsle_vv_i16m1()

__rv32 vmask_t vmsle_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vmask_t

汇编指令:
vmsle.vv vd, vs2, vs1

◆ vmsle_vv_i16m1_m()

__rv32 vmask_t vmsle_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vv_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: vint16m8_t
返回值:vmask_t

汇编指令:
vmsle.vv vd, vs2, vs1, vm

◆ vmsle_vv_i32m1()

__rv32 vmask_t vmsle_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vmask_t

汇编指令:
vmsle.vv vd, vs2, vs1

◆ vmsle_vv_i32m1_m()

__rv32 vmask_t vmsle_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vv_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint32m8_t
返回值:vmask_t

汇编指令:
vmsle.vv vd, vs2, vs1, vm

◆ vmsle_vv_i8m1()

__rv32 vmask_t vmsle_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vmask_t

汇编指令:
vmsle.vv vd, vs2, vs1

◆ vmsle_vv_i8m1_m()

__rv32 vmask_t vmsle_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vv_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: vint8m8_t
返回值:vmask_t

汇编指令:
vmsle.vv vd, vs2, vs1, vm

◆ vmsle_vx_i16m1()

__rv32 vmask_t vmsle_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vmask_t

汇编指令:
vmsle.vx vd, vs2, rs1

◆ vmsle_vx_i16m1_m()

__rv32 vmask_t vmsle_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vx_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t
返回值:vmask_t

汇编指令:
vmsle.vx vd, vs2, rs1, vm

◆ vmsle_vx_i32m1()

__rv32 vmask_t vmsle_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vmask_t

汇编指令:
vmsle.vx vd, vs2, rs1

◆ vmsle_vx_i32m1_m()

__rv32 vmask_t vmsle_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vx_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t
返回值:vmask_t

汇编指令:
vmsle.vx vd, vs2, rs1, vm

◆ vmsle_vx_i8m1()

__rv32 vmask_t vmsle_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed

vmsle_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vmask_t

汇编指令:
vmsle.vx vd, vs2, rs1

◆ vmsle_vx_i8m1_m()

__rv32 vmask_t vmsle_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions less than or equal, signed(带掩码)

vmsle_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t
返回值:vmask_t

汇编指令:
vmsle.vx vd, vs2, rs1, vm

◆ vmsleu_vv_u16m1()

__rv32 vmask_t vmsleu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vmask_t

汇编指令:
vmsleu.vv vd, vs2, vs1

◆ vmsleu_vv_u16m1_m()

__rv32 vmask_t vmsleu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vv_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: vuint16m8_t
返回值:vmask_t

汇编指令:
vmsleu.vv vd, vs2, vs1, vm

◆ vmsleu_vv_u32m1()

__rv32 vmask_t vmsleu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vmask_t

汇编指令:
vmsleu.vv vd, vs2, vs1

◆ vmsleu_vv_u32m1_m()

__rv32 vmask_t vmsleu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vv_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: vuint32m8_t
返回值:vmask_t

汇编指令:
vmsleu.vv vd, vs2, vs1, vm

◆ vmsleu_vv_u8m1()

__rv32 vmask_t vmsleu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vmask_t

汇编指令:
vmsleu.vv vd, vs2, vs1

◆ vmsleu_vv_u8m1_m()

__rv32 vmask_t vmsleu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vv_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: vuint8m8_t
返回值:vmask_t

汇编指令:
vmsleu.vv vd, vs2, vs1, vm

◆ vmsleu_vx_u16m1()

__rv32 vmask_t vmsleu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vmask_t

汇编指令:
vmsleu.vx vd, vs2, rs1

◆ vmsleu_vx_u16m1_m()

__rv32 vmask_t vmsleu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vx_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t
返回值:vmask_t

汇编指令:
vmsleu.vx vd, vs2, rs1, vm

◆ vmsleu_vx_u32m1()

__rv32 vmask_t vmsleu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vmask_t

汇编指令:
vmsleu.vx vd, vs2, rs1

◆ vmsleu_vx_u32m1_m()

__rv32 vmask_t vmsleu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vx_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t
返回值:vmask_t

汇编指令:
vmsleu.vx vd, vs2, rs1, vm

◆ vmsleu_vx_u8m1()

__rv32 vmask_t vmsleu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned

vmsleu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vmask_t

汇编指令:
vmsleu.vx vd, vs2, rs1

◆ vmsleu_vx_u8m1_m()

__rv32 vmask_t vmsleu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions less than or equal, unsigned(带掩码)

vmsleu_vx_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t
返回值:vmask_t

汇编指令:
vmsleu.vx vd, vs2, rs1, vm

◆ vmslt_vv_i16m1()

__rv32 vmask_t vmslt_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions less than, signed

vmslt_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vmask_t

汇编指令:
vmslt.vv vd, vs2, vs1

◆ vmslt_vv_i16m1_m()

__rv32 vmask_t vmslt_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions less than, signed(带掩码)

vmslt_vv_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: vint16m8_t
返回值:vmask_t

汇编指令:
vmslt.vv vd, vs2, vs1, vm

◆ vmslt_vv_i32m1()

__rv32 vmask_t vmslt_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions less than, signed

vmslt_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vmask_t

汇编指令:
vmslt.vv vd, vs2, vs1

◆ vmslt_vv_i32m1_m()

__rv32 vmask_t vmslt_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions less than, signed(带掩码)

vmslt_vv_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint32m8_t
返回值:vmask_t

汇编指令:
vmslt.vv vd, vs2, vs1, vm

◆ vmslt_vv_i8m1()

__rv32 vmask_t vmslt_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions less than, signed

vmslt_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vmask_t

汇编指令:
vmslt.vv vd, vs2, vs1

◆ vmslt_vv_i8m1_m()

__rv32 vmask_t vmslt_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions less than, signed(带掩码)

vmslt_vv_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: vint8m8_t
返回值:vmask_t

汇编指令:
vmslt.vv vd, vs2, vs1, vm

◆ vmslt_vx_i16m1()

__rv32 vmask_t vmslt_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions less than, signed

vmslt_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vmask_t

汇编指令:
vmslt.vx vd, vs2, rs1

◆ vmslt_vx_i16m1_m()

__rv32 vmask_t vmslt_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions less than, signed(带掩码)

vmslt_vx_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t
返回值:vmask_t

汇编指令:
vmslt.vx vd, vs2, rs1, vm

◆ vmslt_vx_i32m1()

__rv32 vmask_t vmslt_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions less than

vmslt_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vmask_t

汇编指令:
vmslt.vx vd, vs2, rs1

◆ vmslt_vx_i32m1_m()

__rv32 vmask_t vmslt_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions less than, signed(带掩码)

vmslt_vx_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t
返回值:vmask_t

汇编指令:
vmslt.vx vd, vs2, rs1, vm

◆ vmslt_vx_i8m1()

__rv32 vmask_t vmslt_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions less than, signed

vmslt_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vmask_t

汇编指令:
vmslt.vx vd, vs2, rs1

◆ vmslt_vx_i8m1_m()

__rv32 vmask_t vmslt_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions less than, signed(带掩码)

vmslt_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t
返回值:vmask_t

汇编指令:
vmslt.vx vd, vs2, rs1, vm

◆ vmsltu_vv_u16m1()

__rv32 vmask_t vmsltu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned

vmsltu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vmask_t

汇编指令:
vmsltu.vv vd, vs2, vs1

◆ vmsltu_vv_u16m1_m()

__rv32 vmask_t vmsltu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned(带掩码)

vmsltu_vv_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: vuint16m8_t
返回值:vmask_t

汇编指令:
vmsltu.vv vd, vs2, vs1, vm

◆ vmsltu_vv_u32m1()

__rv32 vmask_t vmsltu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned

vmsltu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vmask_t

汇编指令:
vmsltu.vv vd, vs2, vs1

◆ vmsltu_vv_u32m1_m()

__rv32 vmask_t vmsltu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned(带掩码)

vmsltu_vv_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: vuint32m8_t
返回值:vmask_t

汇编指令:
vmsltu.vv vd, vs2, vs1, vm

◆ vmsltu_vv_u8m1()

__rv32 vmask_t vmsltu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned

vmsltu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vmask_t

汇编指令:
vmsltu.vv vd, vs2, vs1

◆ vmsltu_vv_u8m1_m()

__rv32 vmask_t vmsltu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned(带掩码)

vmsltu_vv_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: vuint8m8_t
返回值:vmask_t

汇编指令:
vmsltu.vv vd, vs2, vs1, vm

◆ vmsltu_vx_u16m1()

__rv32 vmask_t vmsltu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned

vmsltu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vmask_t

汇编指令:
vmsltu.vx vd, vs2, rs1

◆ vmsltu_vx_u16m1_m()

__rv32 vmask_t vmsltu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned(带掩码)

vmsltu_vx_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t
返回值:vmask_t

汇编指令:
vmsltu.vx vd, vs2, rs1, vm

◆ vmsltu_vx_u32m1()

__rv32 vmask_t vmsltu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned

vmsltu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vmask_t

汇编指令:
vmsltu.vx vd, vs2, rs1

◆ vmsltu_vx_u32m1_m()

__rv32 vmask_t vmsltu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned(带掩码)

vmsltu_vx_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t
返回值:vmask_t

汇编指令:
vmsltu.vx vd, vs2, rs1, vm

◆ vmsltu_vx_u8m1()

__rv32 vmask_t vmsltu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned

vmsltu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vmask_t

汇编指令:
vmsltu.vx vd, vs2, rs1

◆ vmsltu_vx_u8m1_m()

__rv32 vmask_t vmsltu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions less than, unsigned(带掩码)

vmsltu_vx_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t
返回值:vmask_t

汇编指令:
vmsltu.vx vd, vs2, rs1, vm

◆ vmsne_vv_i16m1()

__rv32 vmask_t vmsne_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1

◆ vmsne_vv_i16m1_m()

__rv32 vmask_t vmsne_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vv_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: vint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: vint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: vint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: vint16m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1, vm

◆ vmsne_vv_i32m1()

__rv32 vmask_t vmsne_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1

◆ vmsne_vv_i32m1_m()

__rv32 vmask_t vmsne_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vv_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: vint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: vint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint32m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1, vm

◆ vmsne_vv_i8m1()

__rv32 vmask_t vmsne_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1

◆ vmsne_vv_i8m1_m()

__rv32 vmask_t vmsne_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vv_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: vint8m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1, vm

◆ vmsne_vv_u16m1()

__rv32 vmask_t vmsne_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1

◆ vmsne_vv_u16m1_m()

__rv32 vmask_t vmsne_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vv_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: vuint16m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: vuint16m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: vuint16m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: vuint16m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1, vm

◆ vmsne_vv_u32m1()

__rv32 vmask_t vmsne_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1

◆ vmsne_vv_u32m1_m()

__rv32 vmask_t vmsne_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vv_u8:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: vuint32m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: vuint32m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: vuint32m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: vuint32m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1, vm

◆ vmsne_vv_u8m1()

__rv32 vmask_t vmsne_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1

◆ vmsne_vv_u8m1_m()

__rv32 vmask_t vmsne_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vv_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: vuint8m2_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: vuint8m4_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: vuint8m8_t
返回值:vmask_t

汇编指令:
vmsne.vv vd, vs2, vs1, vm

◆ vmsne_vx_i16m1()

__rv32 vmask_t vmsne_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vmask_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vmask_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vmask_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1

◆ vmsne_vx_i16m1_m()

__rv32 vmask_t vmsne_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vx_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1, vm

◆ vmsne_vx_i32m1()

__rv32 vmask_t vmsne_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vmask_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vmask_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vmask_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1

◆ vmsne_vx_i32m1_m()

__rv32 vmask_t vmsne_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vx_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1, vm

◆ vmsne_vx_i8m1()

__rv32 vmask_t vmsne_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vmask_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vmask_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vmask_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1

◆ vmsne_vx_i8m1_m()

__rv32 vmask_t vmsne_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1, vm

◆ vmsne_vx_u16m1()

__rv32 vmask_t vmsne_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vmask_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vmask_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vmask_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1

◆ vmsne_vx_u16m1_m()

__rv32 vmask_t vmsne_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vx_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1, vm

◆ vmsne_vx_u32m1()

__rv32 vmask_t vmsne_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vmask_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vmask_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vmask_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1

◆ vmsne_vx_u32m1_m()

__rv32 vmask_t vmsne_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vx_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1, vm

◆ vmsne_vx_u8m1()

__rv32 vmask_t vmsne_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions not equal

vmsne_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vmask_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vmask_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vmask_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1

◆ vmsne_vx_u8m1_m()

__rv32 vmask_t vmsne_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Comparison Instructions not equal(带掩码)

vmsne_vx_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vmask_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vmask_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vmask_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t
返回值:vmask_t

汇编指令:
vmsne.vx vd, vs2, rs1, vm

◆ vmsof_m()

__rv32 vmask_t vmsof_m ( vmask_t  op1)


vmsif.m set-including-rst mask bit

vmsof_m:


op1: vmask_t
返回值: vmask_t

汇编指令:
vmsof.m vd, vs2

◆ vmsof_m_m()

__rv32 vmask_t vmsof_m_m ( vmask_t  mask,
vmask_t  op1 
)


vmsif.m set-including-rst mask bit

vmsof_m_m:


mask: vmask_t
op1: vmask_t
返回值: vmask_t

汇编指令:
vmsof.m vd, vs2, vm

◆ vmul_vv_i16m1()

__rv32 vint16m1_t vmul_vv_i16m1 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vmul.vv vd, vs2, vs1

◆ vmul_vv_i16m1_m()

__rv32 vint16m1_t vmul_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vmul.vv vd, vs2, vs1, vm

◆ vmul_vv_i32m1()

__rv32 vint32m1_t vmul_vv_i32m1 ( vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vmul.vv vd, vs2, vs1

◆ vmul_vv_i32m1_m()

__rv32 vint32m1_t vmul_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vmul.vv vd, vs2, vs1, vm

◆ vmul_vv_i8m1()

__rv32 vint8m1_t vmul_vv_i8m1 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vmul.vv vd, vs2, vs1

◆ vmul_vv_i8m1_m()

__rv32 vint8m1_t vmul_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vmul.vv vd, vs2, vs1, vm

◆ vmul_vv_u16m1()

__rv32 vuint16m1_t vmul_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmul.vv vd, vs2, vs1

◆ vmul_vv_u16m1_m()

__rv32 vuint16m1_t vmul_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmul.vv vd, vs2, vs1, vm

◆ vmul_vv_u32m1()

__rv32 vuint32m1_t vmul_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmul.vv vd, vs2, vs1

◆ vmul_vv_u32m1_m()

__rv32 vuint32m1_t vmul_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmul.vv vd, vs2, vs1, vm

◆ vmul_vv_u8m1()

__rv32 vuint8m1_t vmul_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmul.vv vd, vs2, vs1

◆ vmul_vv_u8m1_m()

__rv32 vuint8m1_t vmul_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmul.vv vd, vs2, vs1, vm

◆ vmul_vx_i16m1()

__rv32 vint16m1_t vmul_vx_i16m1 ( vint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vmul.vx vd, vs2, rs1

◆ vmul_vx_i16m1_m()

__rv32 vint16m1_t vmul_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vmul.vx vd, vs2, rs1, vm

◆ vmul_vx_i32m1()

__rv32 vint32m1_t vmul_vx_i32m1 ( vint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vmul.vx vd, vs2, rs1

◆ vmul_vx_i32m1_m()

__rv32 vint32m1_t vmul_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vmul.vx vd, vs2, rs1, vm

◆ vmul_vx_i8m1()

__rv32 vint8m1_t vmul_vx_i8m1 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vmul.vx vd, vs2, rs1

◆ vmul_vx_i8m1_m()

__rv32 vint8m1_t vmul_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vmul.vx vd, vs2, rs1, vm

◆ vmul_vx_u16m1()

__rv32 vuint16m1_t vmul_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vmul.vx vd, vs2, rs1

◆ vmul_vx_u16m1_m()

__rv32 vuint16m1_t vmul_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vmul.vx vd, vs2, rs1, vm

◆ vmul_vx_u32m1()

__rv32 vuint32m1_t vmul_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vmul.vx vd, vs2, rs1

◆ vmul_vx_u32m1_m()

__rv32 vuint32m1_t vmul_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vmul.vx vd, vs2, rs1, vm

◆ vmul_vx_u8m1()

__rv32 vuint8m1_t vmul_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmul_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vmul.vx vd, vs2, rs1

◆ vmul_vx_u8m1_m()

__rv32 vuint8m1_t vmul_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmul_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vmul.vx vd, vs2, rs1, vm

◆ vmulh_vv_i16m1()

__rv32 vint16m1_t vmulh_vv_i16m1 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulh_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vmulh.vv vd, vs2, vs1

◆ vmulh_vv_i16m1_m()

__rv32 vint16m1_t vmulh_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulh_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vmulh.vv vd, vs2, vs1, vm

◆ vmulh_vv_i32m1()

__rv32 vint32m1_t vmulh_vv_i32m1 ( vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulh_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vmulh.vv vd, vs2, vs1

◆ vmulh_vv_i32m1_m()

__rv32 vint32m1_t vmulh_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulh_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vmulh.vv vd, vs2, vs1, vm

◆ vmulh_vv_i8m1()

__rv32 vint8m1_t vmulh_vv_i8m1 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulh_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vmulh.vv vd, vs2, vs1

◆ vmulh_vv_i8m1_m()

__rv32 vint8m1_t vmulh_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulh_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vmulh.vv vd, vs2, vs1, vm

◆ vmulh_vx_i16m1()

__rv32 vint16m1_t vmulh_vx_i16m1 ( vint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulh_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vmulh.vx vd, vs2, rs1

◆ vmulh_vx_i16m1_m()

__rv32 vint16m1_t vmulh_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulh_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vmulh.vx vd, vs2, rs1, vm

◆ vmulh_vx_i32m1()

__rv32 vint32m1_t vmulh_vx_i32m1 ( vint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulh_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vmulh.vx vd, vs2, rs1

◆ vmulh_vx_i32m1_m()

__rv32 vint32m1_t vmulh_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulh_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vmulh.vx vd, vs2, rs1, vm

◆ vmulh_vx_i8m1()

__rv32 vint8m1_t vmulh_vx_i8m1 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulh_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vmulh.vx vd, vs2, rs1

◆ vmulh_vx_i8m1_m()

__rv32 vint8m1_t vmulh_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulh_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vmulh.vx vd, vs2, rs1, vm

◆ vmulhsu_vv_i16m1()

__rv32 vint16m1_t vmulhsu_vv_i16m1 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhsu_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vmulhsu.vv vd, vs2, vs1

◆ vmulhsu_vv_i16m1_m()

__rv32 vint16m1_t vmulhsu_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhsu_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vmulhsu.vv vd, vs2, vs1, vm

◆ vmulhsu_vv_i32m1()

__rv32 vint32m1_t vmulhsu_vv_i32m1 ( vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhsu_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vmulhsu.vv vd, vs2, vs1

◆ vmulhsu_vv_i32m1_m()

__rv32 vint32m1_t vmulhsu_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhsu_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vmulhsu.vv vd, vs2, vs1, vm

◆ vmulhsu_vv_i8m1()

__rv32 vint8m1_t vmulhsu_vv_i8m1 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhsu_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vmulhsu.vv vd, vs2, vs1

◆ vmulhsu_vv_i8m1_m()

__rv32 vint8m1_t vmulhsu_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhsu_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vmulhsu.vv vd, vs2, vs1, vm

◆ vmulhsu_vx_i16m1()

__rv32 vint16m1_t vmulhsu_vx_i16m1 ( vint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhsu_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vmulhsu.vx vd, vs2, rs1

◆ vmulhsu_vx_i16m1_m()

__rv32 vint16m1_t vmulhsu_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhsu_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vmulhsu.vx vd, vs2, rs1, vm

◆ vmulhsu_vx_i32m1()

__rv32 vint32m1_t vmulhsu_vx_i32m1 ( vint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhsu_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vmulhsu.vx vd, vs2, rs1

◆ vmulhsu_vx_i32m1_m()

__rv32 vint32m1_t vmulhsu_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhsu_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vmulhsu.vx vd, vs2, rs1, vm

◆ vmulhsu_vx_i8m1()

__rv32 vint8m1_t vmulhsu_vx_i8m1 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhsu_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vmulhsu.vx vd, vs2, rs1

◆ vmulhsu_vx_i8m1_m()

__rv32 vint8m1_t vmulhsu_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhsu_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vmulhsu.vx vd, vs2, rs1, vm

◆ vmulhu_vv_u16m1()

__rv32 vuint16m1_t vmulhu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmulhu.vv vd, vs2, vs1

◆ vmulhu_vv_u16m1_m()

__rv32 vuint16m1_t vmulhu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhu_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vmulhu.vv vd, vs2, vs1, vm

◆ vmulhu_vv_u32m1()

__rv32 vuint32m1_t vmulhu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmulhu.vv vd, vs2, vs1

◆ vmulhu_vv_u32m1_m()

__rv32 vuint32m1_t vmulhu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhu_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vmulhu.vv vd, vs2, vs1, vm

◆ vmulhu_vv_u8m1()

__rv32 vuint8m1_t vmulhu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmulhu.vv vd, vs2, vs1

◆ vmulhu_vv_u8m1_m()

__rv32 vuint8m1_t vmulhu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhu_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vmulhu.vv vd, vs2, vs1, vm

◆ vmulhu_vx_u16m1()

__rv32 vuint16m1_t vmulhu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vmulhu.vx vd, vs2, rs1

◆ vmulhu_vx_u16m1_m()

__rv32 vuint16m1_t vmulhu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhu_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vmulhu.vx vd, vs2, rs1, vm

◆ vmulhu_vx_u32m1()

__rv32 vuint32m1_t vmulhu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vmulhu.vx vd, vs2, rs1

◆ vmulhu_vx_u32m1_m()

__rv32 vuint32m1_t vmulhu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhu_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vmulhu.vx vd, vs2, rs1, vm

◆ vmulhu_vx_u8m1()

__rv32 vuint8m1_t vmulhu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions

vmulhu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vmulhu.vx vd, vs2, rs1

◆ vmulhu_vx_u8m1_m()

__rv32 vuint8m1_t vmulhu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Integer Multiply Instructions (带掩码)

vmulhu_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vmulhu.vx vd, vs2, rs1, vm

◆ vmv_v_v_i16m1()

__rv32 vint16m1_t vmv_v_v_i16m1 ( vint16m1_t  src)


Vector Integer Move Instructions

vmv_v_v_i16:

LMUL = 1
op1: vint16m1_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
返回值: vint16m8_t

汇编指令:
vmv.v.v vd, vs1

◆ vmv_v_v_i32m1()

__rv32 vint32m1_t vmv_v_v_i32m1 ( vint32m1_t  src)


Vector Integer Move Instructions

vmv_v_v_i32:

LMUL = 1
op1: vint32m1_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
返回值: vint32m8_t

汇编指令:
vmv.v.v vd, vs1

◆ vmv_v_v_i8m1()

__rv32 vint8m1_t vmv_v_v_i8m1 ( vint8m1_t  src)


Vector Integer Move Instructions

vmv_v_v_i8:

LMUL = 1
op1: vint8m1_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
返回值: vint8m8_t

汇编指令:
vmv.v.v vd, vs1

◆ vmv_v_v_u16m1()

__rv32 vuint16m1_t vmv_v_v_u16m1 ( vuint16m1_t  src)


Vector Integer Move Instructions

vmv_v_v_u16:

LMUL = 1
op1: vuint16m1_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
返回值: vuint16m8_t

汇编指令:
vmv.v.v vd, vs1

◆ vmv_v_v_u32m1()

__rv32 vuint32m1_t vmv_v_v_u32m1 ( vuint32m1_t  src)


Vector Integer Move Instructions

vmv_v_v_u32:

LMUL = 1
op1: vuint32m1_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
返回值: vuint32m8_t

汇编指令:
vmv.v.v vd, vs1

◆ vmv_v_v_u8m1()

__rv32 vuint8m1_t vmv_v_v_u8m1 ( vuint8m1_t  src)


Vector Integer Move Instructions

vmv_v_v_u8:

LMUL = 1
op1: vuint8m1_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
返回值: vuint8m8_t

汇编指令:
vmv.v.v vd, vs1

◆ vmv_v_x_i16m1()

__rv32 vint16m1_t vmv_v_x_i16m1 ( int16_t  src)


Vector Integer Move Instructions

vmv_v_x_i16:

LMUL = 1
op1: int16_t
返回值: vint16m1_t

LMUL = 2
op1: int16_t
返回值: vint16m2_t

LMUL = 4
op1: int16_t
返回值: vint16m4_t

LMUL = 8
op1: int16_t
返回值: vint16m8_t

汇编指令:
vmv.v.x vd, rs1

◆ vmv_v_x_i32m1()

__rv32 vint32m1_t vmv_v_x_i32m1 ( int32_t  src)


Vector Integer Move Instructions

vmv_v_x_i32:

LMUL = 1
op1: int32_t
返回值: vint32m1_t

LMUL = 2
op1: int32_t
返回值: vint32m2_t

LMUL = 4
op1: int32_t
返回值: vint32m4_t

LMUL = 8
op1: int32_t
返回值: vint32m8_t

汇编指令:
vmv.v.x vd, rs1

◆ vmv_v_x_i8m1()

__rv32 vint8m1_t vmv_v_x_i8m1 ( int8_t  src)


Vector Integer Move Instructions

vmv_v_x_i8:

LMUL = 1
op1: int8_t
返回值: vint8m1_t

LMUL = 2
op1: int8_t
返回值: vint8m2_t

LMUL = 4
op1: int8_t
返回值: vint8m4_t

LMUL = 8
op1: int8_t
返回值: vint8m8_t

汇编指令:
vmv.v.x vd, rs1

◆ vmv_v_x_u16m1()

__rv32 vuint16m1_t vmv_v_x_u16m1 ( uint16_t  src)


Vector Integer Move Instructions

vmv_v_x_u16:

LMUL = 1
op1: uint16_t
返回值: vuint16m1_t

LMUL = 2
op1: uint16_t
返回值: vuint16m2_t

LMUL = 4
op1: uint16_t
返回值: vuint16m4_t

LMUL = 8
op1: uint16_t
返回值: vuint16m8_t

汇编指令:
vmv.v.x vd, rs1

◆ vmv_v_x_u32m1()

__rv32 vuint32m1_t vmv_v_x_u32m1 ( uint32_t  src)


Vector Integer Move Instructions

vmv_v_x_u32:

LMUL = 1
op1: uint32_t
返回值: vuint32m1_t

LMUL = 2
op1: uint32_t
返回值: vuint32m2_t

LMUL = 4
op1: uint32_t
返回值: vuint32m4_t

LMUL = 8
op1: uint32_t
返回值: vuint32m8_t

汇编指令:
vmv.v.x vd, rs1

◆ vmv_v_x_u8m1()

__rv32 vuint8m1_t vmv_v_x_u8m1 ( uint8_t  src)


Vector Integer Move Instructions

vmv_v_x_u8:

LMUL = 1
op1: uint8_t
返回值: vuint8m1_t

LMUL = 2
op1: uint8_t
返回值: vuint8m2_t

LMUL = 4
op1: uint8_t
返回值: vuint8m4_t

LMUL = 8
op1: uint8_t
返回值: vuint8m8_t

汇编指令:
vmv.v.x vd, rs1

◆ vmxnor_mm()

__rv32 vmask_t vmxnor_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmxnor_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmxnor.mm vd, vs2, vs1

◆ vmxor_mm()

__rv32 vmask_t vmxor_mm ( vmask_t  op1,
vmask_t  op2 
)


Vector Mask-Register Logical Instructions

vmxor_mm:


op1: vmask_t
op2: vmask_t
返回值: vmask_t

汇编指令:
vmxor.mm vd, vs2, vs1

◆ vnclip_wv_i16m1()

__rv32 vint16m1_t vnclip_wv_i16m1 ( vint32m2_t  op1,
vint16m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclip_wv_i16:

LMUL = 1
op1: vint32m2_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint32m4_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint32m8_t
op2: vint16m4_t
返回值:vint16m4_t

汇编指令:
vnclip.wv vd, vs2, vs1

◆ vnclip_wv_i16m1_m()

__rv32 vint16m1_t vnclip_wv_i16m1_m ( vmask_t  mask,
vint32m2_t  op1,
vint16m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vns_wv_i16:

LMUL = 1
mask: vmask_t
op1: vint32m2_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint32m4_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint32m8_t
op2: vuint16m4_t
返回值:vint16m4_t

汇编指令:
vnclip.wv vd, vs2, vs1,vm

◆ vnclip_wv_i8m1()

__rv32 vint8m1_t vnclip_wv_i8m1 ( vint16m2_t  op1,
vint8m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclip_wv_i8:

LMUL = 1
op1: vint16m2_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint16m4_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint16m8_t
op2: vint8m4_t
返回值:vint8m4_t

汇编指令:
vnclip.wv vd, vs2, vs1

◆ vnclip_wv_i8m1_m()

__rv32 vint8m1_t vnclip_wv_i8m1_m ( vmask_t  mask,
vint16m2_t  op1,
vint8m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclip_wv_i8:

LMUL = 1
mask: vmask_t
op1: vint16m2_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint16m4_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint16m8_t
op2: vuint8m4_t
返回值:vint8m4_t

汇编指令:
vnclip.wv vd, vs2, vs1,vm

◆ vnclip_wx_i16m1()

__rv32 vint16m1_t vnclip_wx_i16m1 ( vint32m2_t  op1,
int16_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclip_wx_i16:

LMUL = 1
op1: vint32m2_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint32m4_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint32m8_t
op2: int16_t
返回值:vint16m4_t

汇编指令:
vnclip.wx vd, vs2, rs1

◆ vnclip_wx_i16m1_m()

__rv32 vint16m1_t vnclip_wx_i16m1_m ( vmask_t  mask,
vint32m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclip_wx_i16:

LMUL = 1
mask: vmask_t
op1: vint32m2_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint32m4_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint32m8_t
op2: uint8_t
返回值:vint16m4_t

汇编指令:
vnclip.wx vd, vs2, rs1,vm

◆ vnclip_wx_i8m1()

__rv32 vint8m1_t vnclip_wx_i8m1 ( vint16m2_t  op1,
int8_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclip_wx_i8:

LMUL = 1
op1: vint16m2_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint16m4_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint16m8_t
op2: int8_t
返回值:vint8m4_t

汇编指令:
vnclip.wx vd, vs2, rs1

◆ vnclip_wx_i8m1_m()

__rv32 vint8m1_t vnclip_wx_i8m1_m ( vmask_t  mask,
vint16m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclip_wx_i8:

LMUL = 1
mask: vmask_t
op1: vint16m2_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint16m4_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint16m8_t
op2: uint8_t
返回值:vint8m4_t

汇编指令:
vnclip.wx vd, vs2, rs1,vm

◆ vnclipu_wv_u16m1()

__rv32 vuint16m1_t vnclipu_wv_u16m1 ( vuint32m2_t  op1,
vuint16m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclipu_wv_u16:

LMUL = 1
op1: vuint32m2_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint32m4_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint32m8_t
op2: vuint16m4_t
返回值:vuint16m4_t

汇编指令:
vnclipu.wv vd, vs2, vs1

◆ vnclipu_wv_u16m1_m()

__rv32 vuint16m1_t vnclipu_wv_u16m1_m ( vmask_t  mask,
vuint32m2_t  op1,
vuint16m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclipu_wv_u16:

LMUL = 1
mask: vmask_t
op1: vuint32m2_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m4_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m8_t
op2: vuint16m4_t
返回值:vuint16m4_t

汇编指令:
vnclipu.wv vd, vs2, vs1,vm

◆ vnclipu_wv_u8m1()

__rv32 vuint8m1_t vnclipu_wv_u8m1 ( vuint16m2_t  op1,
vuint8m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclipu_wv_u8:

LMUL = 1
op1: vuint16m2_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint16m4_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint16m8_t
op2: vuint8m4_t
返回值:vuint8m4_t

汇编指令:
vnclipu.wv vd, vs2, vs1

◆ vnclipu_wv_u8m1_m()

__rv32 vuint8m1_t vnclipu_wv_u8m1_m ( vmask_t  mask,
vuint16m2_t  op1,
vuint8m1_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclipu_wv_u8:

LMUL = 1
mask: vmask_t
op1: vuint16m2_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m4_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m8_t
op2: vuint8m4_t
返回值:vuint8m4_t

汇编指令:
vnclipu.wv vd, vs2, vs1,vm

◆ vnclipu_wx_u16m1()

__rv32 vuint16m1_t vnclipu_wx_u16m1 ( vuint32m2_t  op1,
uint16_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclipu_wx_u16:

LMUL = 1
op1: vuint32m2_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint32m4_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint32m8_t
op2: uint16_t
返回值:vuint16m4_t

汇编指令:
vnclipu.wx vd, vs2, rs1

◆ vnclipu_wx_u16m1_m()

__rv32 vuint16m1_t vnclipu_wx_u16m1_m ( vmask_t  mask,
vuint32m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclipu_wx_u16:

LMUL = 1
mask: vmask_t
op1: vuint32m2_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m4_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m8_t
op2: uint8_t
返回值:vuint16m4_t

汇编指令:
vnclipu.wx vd, vs2, rs1,vm

◆ vnclipu_wx_u8m1()

__rv32 vuint8m1_t vnclipu_wx_u8m1 ( vuint16m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions

vnclipu_wx_u8:

LMUL = 1
op1: vuint16m2_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint16m4_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint16m8_t
op2: uint8_t
返回值:vuint8m4_t

汇编指令:
vnclipu.wx vd, vs2, rs1

◆ vnclipu_wx_u8m1_m()

__rv32 vuint8m1_t vnclipu_wx_u8m1_m ( vmask_t  mask,
vuint16m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Fixed-Point Clip Instructions (带掩码)

vnclipu_wx_u8:

LMUL = 1
mask: vmask_t
op1: vuint16m2_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m4_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m8_t
op2: uint8_t
返回值:vuint8m4_t

汇编指令:
vnclipu.wx vd, vs2, rs1,vm

◆ vnmsac_vv_i16m1()

__rv32 vint16m1_t vnmsac_vv_i16m1 ( vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vv_i16:

LMUL = 1
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2

◆ vnmsac_vv_i16m1_m()

__rv32 vint16m1_t vnmsac_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vv_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2, vm

◆ vnmsac_vv_i32m1()

__rv32 vint32m1_t vnmsac_vv_i32m1 ( vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vv_i32:

LMUL = 1
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2

◆ vnmsac_vv_i32m1_m()

__rv32 vint32m1_t vnmsac_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vv_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2, vm

◆ vnmsac_vv_i8m1()

__rv32 vint8m1_t vnmsac_vv_i8m1 ( vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vv_i8:

LMUL = 1
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2

◆ vnmsac_vv_i8m1_m()

__rv32 vint8m1_t vnmsac_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vv_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2, vm

◆ vnmsac_vv_u16m1()

__rv32 vuint16m1_t vnmsac_vv_u16m1 ( vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vv_u16:

LMUL = 1
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2

◆ vnmsac_vv_u16m1_m()

__rv32 vuint16m1_t vnmsac_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vv_u16:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2, vm

◆ vnmsac_vv_u32m1()

__rv32 vuint32m1_t vnmsac_vv_u32m1 ( vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vv_u32:

LMUL = 1
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2

◆ vnmsac_vv_u32m1_m()

__rv32 vuint32m1_t vnmsac_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vv_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2, vm

◆ vnmsac_vv_u8m1()

__rv32 vuint8m1_t vnmsac_vv_u8m1 ( vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vv_u8:

LMUL = 1
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2

◆ vnmsac_vv_u8m1_m()

__rv32 vuint8m1_t vnmsac_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vv_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsac.vv vd, vs1, vs2, vm

◆ vnmsac_vx_i16m1()

__rv32 vint16m1_t vnmsac_vx_i16m1 ( vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vx_i16:

LMUL = 1
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2

◆ vnmsac_vx_i16m1_m()

__rv32 vint16m1_t vnmsac_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vx_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2, vm

◆ vnmsac_vx_i32m1()

__rv32 vint32m1_t vnmsac_vx_i32m1 ( vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vx_i32:

LMUL = 1
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2

◆ vnmsac_vx_i32m1_m()

__rv32 vint32m1_t vnmsac_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vx_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2, vm

◆ vnmsac_vx_i8m1()

__rv32 vint8m1_t vnmsac_vx_i8m1 ( vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vx_i8:

LMUL = 1
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2

◆ vnmsac_vx_i8m1_m()

__rv32 vint8m1_t vnmsac_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vx_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2, vm

◆ vnmsac_vx_u16m1()

__rv32 vuint16m1_t vnmsac_vx_u16m1 ( vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vx_u16:

LMUL = 1
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2

◆ vnmsac_vx_u16m1_m()

__rv32 vuint16m1_t vnmsac_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vx_u8:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2, vm

◆ vnmsac_vx_u32m1()

__rv32 vuint32m1_t vnmsac_vx_u32m1 ( vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vx_u32:

LMUL = 1
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2

◆ vnmsac_vx_u32m1_m()

__rv32 vuint32m1_t vnmsac_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vx_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2, vm

◆ vnmsac_vx_u8m1()

__rv32 vuint8m1_t vnmsac_vx_u8m1 ( vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsac_vx_u8:

LMUL = 1
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2

◆ vnmsac_vx_u8m1_m()

__rv32 vuint8m1_t vnmsac_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsac_vx_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsac.vx vd, rs1, vs2, vm

◆ vnmsub_vv_i16m1()

__rv32 vint16m1_t vnmsub_vv_i16m1 ( vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vv_i16:

LMUL = 1
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2

◆ vnmsub_vv_i16m1_m()

__rv32 vint16m1_t vnmsub_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vv_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2, vm

◆ vnmsub_vv_i32m1()

__rv32 vint32m1_t vnmsub_vv_i32m1 ( vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vv_i32:

LMUL = 1
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2

◆ vnmsub_vv_i32m1_m()

__rv32 vint32m1_t vnmsub_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vv_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2, vm

◆ vnmsub_vv_i8m1()

__rv32 vint8m1_t vnmsub_vv_i8m1 ( vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vv_i8:

LMUL = 1
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2

◆ vnmsub_vv_i8m1_m()

__rv32 vint8m1_t vnmsub_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vv_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2, vm

◆ vnmsub_vv_u16m1()

__rv32 vuint16m1_t vnmsub_vv_u16m1 ( vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vv_u16:

LMUL = 1
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2

◆ vnmsub_vv_u16m1_m()

__rv32 vuint16m1_t vnmsub_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vv_u16:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2, vm

◆ vnmsub_vv_u32m1()

__rv32 vuint32m1_t vnmsub_vv_u32m1 ( vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vv_u32:

LMUL = 1
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2

◆ vnmsub_vv_u32m1_m()

__rv32 vuint32m1_t vnmsub_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vv_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2, vm

◆ vnmsub_vv_u8m1()

__rv32 vuint8m1_t vnmsub_vv_u8m1 ( vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vv_u8:

LMUL = 1
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2

◆ vnmsub_vv_u8m1_m()

__rv32 vuint8m1_t vnmsub_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vv_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsub.vv vd, vs1, vs2, vm

◆ vnmsub_vx_i16m1()

__rv32 vint16m1_t vnmsub_vx_i16m1 ( vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vx_i16:

LMUL = 1
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2

◆ vnmsub_vx_i16m1_m()

__rv32 vint16m1_t vnmsub_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vx_i16:

LMUL = 1
mask: vmask_t
acc: vint16m1_t
op1: int16_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: int16_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: int16_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: int16_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2, vm

◆ vnmsub_vx_i32m1()

__rv32 vint32m1_t vnmsub_vx_i32m1 ( vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vx_i32:

LMUL = 1
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2

◆ vnmsub_vx_i32m1_m()

__rv32 vint32m1_t vnmsub_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  acc,
int32_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vx_i32:

LMUL = 1
mask: vmask_t
acc: vint32m1_t
op1: int32_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: int32_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: int32_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: int32_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2, vm

◆ vnmsub_vx_i8m1()

__rv32 vint8m1_t vnmsub_vx_i8m1 ( vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vx_i8:

LMUL = 1
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2

◆ vnmsub_vx_i8m1_m()

__rv32 vint8m1_t vnmsub_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vx_i8:

LMUL = 1
mask: vmask_t
acc: vint8m1_t
op1: int8_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
acc: vint8m2_t
op1: int8_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
acc: vint8m4_t
op1: int8_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
acc: vint8m8_t
op1: int8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2, vm

◆ vnmsub_vx_u16m1()

__rv32 vuint16m1_t vnmsub_vx_u16m1 ( vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vx_u16:

LMUL = 1
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2

◆ vnmsub_vx_u16m1_m()

__rv32 vuint16m1_t vnmsub_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vx_u8:

LMUL = 1
mask: vmask_t
acc: vuint16m1_t
op1: uint16_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: uint16_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: uint16_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: uint16_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2, vm

◆ vnmsub_vx_u32m1()

__rv32 vuint32m1_t vnmsub_vx_u32m1 ( vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vx_u32:

LMUL = 1
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2

◆ vnmsub_vx_u32m1_m()

__rv32 vuint32m1_t vnmsub_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  acc,
uint32_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vx_u32:

LMUL = 1
mask: vmask_t
acc: vuint32m1_t
op1: uint32_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: uint32_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: uint32_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: uint32_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2, vm

◆ vnmsub_vx_u8m1()

__rv32 vuint8m1_t vnmsub_vx_u8m1 ( vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions

vnmsub_vx_u8:

LMUL = 1
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2

◆ vnmsub_vx_u8m1_m()

__rv32 vuint8m1_t vnmsub_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Multiply-Add Instructions (带掩码)

vnmsub_vx_u8:

LMUL = 1
mask: vmask_t
acc: vuint8m1_t
op1: uint8_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
acc: vuint8m2_t
op1: uint8_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
acc: vuint8m4_t
op1: uint8_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
acc: vuint8m8_t
op1: uint8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vnmsub.vx vd, rs1, vs2, vm

◆ vnsra_wv_i16m1()

__rv32 vint16m1_t vnsra_wv_i16m1 ( vint32m2_t  op1,
vuint16m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsra_wv_i16:

LMUL = 1
op1: vint32m2_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint32m4_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint32m8_t
op2: vuint16m4_t
返回值:vint16m4_t

汇编指令:
vnsra.wv vd, vs2, vs1

◆ vnsra_wv_i16m1_m()

__rv32 vint16m1_t vnsra_wv_i16m1_m ( vmask_t  mask,
vint32m2_t  op1,
vuint16m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsra_wv_i8:

LMUL = 1
mask: vmask_t
op1: vint32m2_t
op2: vuint8m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint32m4_t
op2: vuint8m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint32m8_t
op2: vuint8m4_t
返回值:vint16m4_t

汇编指令:
vnsra.wv vd, vs2, vs1,vm

◆ vnsra_wv_i8m1()

__rv32 vint8m1_t vnsra_wv_i8m1 ( vint16m2_t  op1,
vuint8m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsra_wv_i8:

LMUL = 1
op1: vint16m2_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint16m4_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint16m8_t
op2: vuint8m4_t
返回值:vint8m4_t

汇编指令:
vnsra.wv vd, vs2, vs1

◆ vnsra_wv_i8m1_m()

__rv32 vint8m1_t vnsra_wv_i8m1_m ( vmask_t  mask,
vint16m2_t  op1,
vuint8m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsra_wv_i8:

LMUL = 1
mask: vmask_t
op1: vint16m2_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint16m4_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint16m8_t
op2: vuint8m4_t
返回值:vint8m4_t

汇编指令:
vnsra.wv vd, vs2, vs1,vm

◆ vnsra_wx_i16m1()

__rv32 vint16m1_t vnsra_wx_i16m1 ( vint32m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsra_wx_i16:

LMUL = 1
op1: vint32m2_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
op1: vint32m4_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
op1: vint32m8_t
op2: uint8_t
返回值:vint16m4_t

汇编指令:
vnsra.wx vd, vs2, rs1

◆ vnsra_wx_i16m1_m()

__rv32 vint16m1_t vnsra_wx_i16m1_m ( vmask_t  mask,
vint32m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsra_wx_i16:

LMUL = 1
mask: vmask_t
op1: vint32m2_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint32m4_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint32m8_t
op2: uint8_t
返回值:vint16m4_t

汇编指令:
vnsra.wx vd, vs2, rs1,vm

◆ vnsra_wx_i8m1()

__rv32 vint8m1_t vnsra_wx_i8m1 ( vint16m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsra_wx_i8:

LMUL = 1
op1: vint16m2_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint16m4_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint16m8_t
op2: uint8_t
返回值:vint8m4_t

汇编指令:
vnsra.wx vd, vs2, rs1

◆ vnsra_wx_i8m1_m()

__rv32 vint8m1_t vnsra_wx_i8m1_m ( vmask_t  mask,
vint16m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsra_wx_i8:

LMUL = 1
mask: vmask_t
op1: vint16m2_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint16m4_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint16m8_t
op2: uint8_t
返回值:vint8m4_t

汇编指令:
vnsra.wx vd, vs2, rs1,vm

◆ vnsrl_wv_u16m1()

__rv32 vuint16m1_t vnsrl_wv_u16m1 ( vuint32m2_t  op1,
vuint16m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsrl_wv_u16:

LMUL = 1
op1: vuint32m2_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint32m4_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint32m8_t
op2: vuint16m4_t
返回值:vuint16m4_t

汇编指令:
vnsrl.wv vd, vs2, vs1

◆ vnsrl_wv_u16m1_m()

__rv32 vuint16m1_t vnsrl_wv_u16m1_m ( vmask_t  mask,
vuint32m2_t  op1,
vuint16m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsrl_wv_u16:

LMUL = 1
mask: vmask_t
op1: vuint32m2_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m4_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m8_t
op2: vuint16m4_t
返回值:vuint16m4_t

汇编指令:
vnsrl.wv vd, vs2, vs1,vm

◆ vnsrl_wv_u8m1()

__rv32 vuint8m1_t vnsrl_wv_u8m1 ( vuint16m2_t  op1,
vuint8m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsrl_wv_u8:

LMUL = 1
op1: vuint16m2_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint16m4_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint16m8_t
op2: vuint8m4_t
返回值:vuint8m4_t

汇编指令:
vnsrl.wv vd, vs2, vs1

◆ vnsrl_wv_u8m1_m()

__rv32 vuint8m1_t vnsrl_wv_u8m1_m ( vmask_t  mask,
vuint16m2_t  op1,
vuint8m1_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsrl_wv_u8:

LMUL = 1
mask: vmask_t
op1: vuint16m2_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m4_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m8_t
op2: vuint8m4_t
返回值:vuint8m4_t

汇编指令:
vnsrl.wv vd, vs2, vs1, vm

◆ vnsrl_wx_u16m1()

__rv32 vuint16m1_t vnsrl_wx_u16m1 ( vuint32m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsrl_wx_u16:

LMUL = 1
op1: vuint32m2_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint32m4_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint32m8_t
op2: uint8_t
返回值:vuint16m4_t

汇编指令:
vnsrl.wx vd, vs2, rs1

◆ vnsrl_wx_u16m1_m()

__rv32 vuint16m1_t vnsrl_wx_u16m1_m ( vmask_t  mask,
vuint32m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsrl_wx_u16:

LMUL = 1
mask: vmask_t
op1: vuint32m2_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m4_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m8_t
op2: uint8_t
返回值:vuint16m4_t

汇编指令:
vnsrl.wx vd, vs2, rs1,vm

◆ vnsrl_wx_u8m1()

__rv32 vuint8m1_t vnsrl_wx_u8m1 ( vuint16m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions

vnsrl_wx_u8:

LMUL = 1
op1: vuint16m2_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint16m4_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint16m8_t
op2: uint8_t
返回值:vuint8m4_t

汇编指令:
vnsrl.wx vd, vs2, rs1

◆ vnsrl_wx_u8m1_m()

__rv32 vuint8m1_t vnsrl_wx_u8m1_m ( vmask_t  mask,
vuint16m2_t  op1,
uint8_t  op2 
)


Vector Narrowing Integer Right Shift Instructions (带掩码)

vnsrl_wx_u8:

LMUL = 1
mask: vmask_t
op1: vuint16m2_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m4_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m8_t
op2: uint8_t
返回值:vuint8m4_t

汇编指令:
vnsrl.wx vd, vs2, rs1,vm

◆ vor_vv_i16m1()

__rv32 vint16m1_t vor_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Bitwise Logical Instructions

vor_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vor.vv vd, vs2, vs1

◆ vor_vv_i16m1_m()

__rv32 vint16m1_t vor_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vor.vv vd, vs2, vs1, vm

◆ vor_vv_i32m1()

__rv32 vint32m1_t vor_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Bitwise Logical Instructions

vor_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vor.vv vd, vs2, vs1

◆ vor_vv_i32m1_m()

__rv32 vint32m1_t vor_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vor.vv vd, vs2, vs1, vm

◆ vor_vv_i8m1()

__rv32 vint8m1_t vor_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Bitwise Logical Instructions

vor_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vor.vv vd, vs2, vs1

◆ vor_vv_i8m1_m()

__rv32 vint8m1_t vor_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vor.vv vd, vs2, vs1, vm

◆ vor_vv_u16m1()

__rv32 vuint16m1_t vor_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Bitwise Logical Instructions

vor_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vor.vv vd, vs2, vs1

◆ vor_vv_u16m1_m()

__rv32 vuint16m1_t vor_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vor.vv vd, vs2, vs1, vm

◆ vor_vv_u32m1()

__rv32 vuint32m1_t vor_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Bitwise Logical Instructions

vor_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vor.vv vd, vs2, vs1

◆ vor_vv_u32m1_m()

__rv32 vuint32m1_t vor_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vv_i32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vor.vv vd, vs2, vs1, vm

◆ vor_vv_u8m1()

__rv32 vuint8m1_t vor_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Bitwise Logical Instructions

vor_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vor.vv vd, vs2, vs1

◆ vor_vv_u8m1_m()

__rv32 vuint8m1_t vor_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vor.vv vd, vs2, vs1, vm

◆ vor_vx_i16m1()

__rv32 vint16m1_t vor_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Bitwise Logical Instructions

vor_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vor.vx vd, vs2, rs1

◆ vor_vx_i16m1_m()

__rv32 vint16m1_t vor_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vor.vx vd, vs2, rs1, vm

◆ vor_vx_i32m1()

__rv32 vint32m1_t vor_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Bitwise Logical Instructions

vor_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vor.vx vd, vs2, rs1

◆ vor_vx_i32m1_m()

__rv32 vint32m1_t vor_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vor.vx vd, vs2, rs1, vm

◆ vor_vx_i8m1()

__rv32 vint8m1_t vor_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Bitwise Logical Instructions

vor_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vor.vx vd, vs2, rs1

◆ vor_vx_i8m1_m()

__rv32 vint8m1_t vor_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vor.vx vd, vs2, rs1, vm

◆ vor_vx_u16m1()

__rv32 vuint16m1_t vor_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Bitwise Logical Instructions

vor_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vor.vx vd, vs2, rs1

◆ vor_vx_u16m1_m()

__rv32 vuint16m1_t vor_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vor.vx vd, vs2, rs1, vm

◆ vor_vx_u32m1()

__rv32 vuint32m1_t vor_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Bitwise Logical Instructions

vor_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vor.vx vd, vs2, rs1

◆ vor_vx_u32m1_m()

__rv32 vuint32m1_t vor_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vor.vx vd, vs2, rs1, vm

◆ vor_vx_u8m1()

__rv32 vuint8m1_t vor_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Bitwise Logical Instructions

vor_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vor.vx vd, vs2, rs1

◆ vor_vx_u8m1_m()

__rv32 vuint8m1_t vor_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vor_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vor.vx vd, vs2, rs1, vm

◆ vpopc_m()

__rv32 uint32_t vpopc_m ( vmask_t  op1)


Vector Mask-Register Logical Instructions

vpopc_m:


op1: vmask_t
返回值: uint32_t

汇编指令:
vpopc.m rd, vs2

◆ vpopc_m_m()

__rv32 uint32_t vpopc_m_m ( vmask_t  mask,
vmask_t  op1 
)


Vector Mask-Register Logical Instructions

vpopc_m_m:

mask: vmask_t
op1: vmask_t
返回值: uint32_t

汇编指令:
vpopc.m rd, vs2, vm

◆ vqmacc_vv_i32m4()

__rv32 vint32m4_t vqmacc_vv_i32m4 ( vint32m4_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed

vqmacc_vv_i32:

LMUL = 4
op1: vint32m4_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vint32m8_t

汇编指令:
vqmacc.vv vd, vs1, vs2

◆ vqmacc_vv_i32m4_m()

__rv32 vint32m4_t vqmacc_vv_i32m4_m ( vmask_t  mask,
vint32m4_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed(带掩码)

vqmacc_vv_i32:

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint8m1_t
op4: vint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint8m2_t
op4: vint8m2_t
返回值:vint32m8_t

汇编指令:
vqmacc.vv vd, vs1, vs2

◆ vqmacc_vx_i32m4()

__rv32 vint32m4_t vqmacc_vx_i32m4 ( vint32m4_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed

vqmacc_vx_i32:

LMUL = 4
op1: vint32m4_t
op2: int8_t
op3: vint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int8_t
op3: vint8m2_t
返回值:vint32m8_t

汇编指令:
vqmacc.vx vd, rs1, vs2

◆ vqmacc_vx_i32m4_m()

__rv32 vint32m4_t vqmacc_vx_i32m4_m ( vmask_t  mask,
vint32m4_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed(带掩码)

vqmacc_vx_i32:

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int8_t
op4: vint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int8_t
op4: vint8m2_t
返回值:vint32m8_t

汇编指令:
vqmacc.vx vd, rs1, vs2

◆ vqmaccsu_vv_i32m4()

__rv32 vint32m4_t vqmaccsu_vv_i32m4 ( vint32m4_t  acc,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed-unsigned

vqmaccsu_vv_i32:

LMUL = 4
op1: vint32m4_t
op2: vint8m1_t
op3: vuint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint8m2_t
op3: vuint8m2_t
返回值:vint32m8_t

汇编指令:
vqmaccsu.vv vd, vs1, vs2

◆ vqmaccsu_vv_i32m4_m()

__rv32 vint32m4_t vqmaccsu_vv_i32m4_m ( vmask_t  mask,
vint32m4_t  acc,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed-unsigned(带掩码)

vqmaccsu_vv_i32:

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint8m1_t
op4: vuint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint8m2_t
op4: vuint8m2_t
返回值:vint32m8_t

汇编指令:
vqmaccsu.vv vd, vs1, vs2

◆ vqmaccsu_vx_i32m4()

__rv32 vint32m4_t vqmaccsu_vx_i32m4 ( vint32m4_t  acc,
int8_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed-unsigned

vqmaccsu_vx_i32:

LMUL = 4
op1: vint32m4_t
op2: int8_t
op3: vuint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int8_t
op3: vuint8m2_t
返回值:vint32m8_t

汇编指令:
vqmaccsu.vx vd, rs1, vs2

◆ vqmaccsu_vx_i32m4_m()

__rv32 vint32m4_t vqmaccsu_vx_i32m4_m ( vmask_t  mask,
vint32m4_t  acc,
int8_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions signed-unsigned(带掩码)

vqmaccsu_vx_i32:

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int8_t
op4: vuint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int8_t
op4: vuint8m2_t
返回值:vuint32m8_t

汇编指令:
vqmaccsu.vx vd, rs1, vs2

◆ vqmaccu_vv_u32m4()

__rv32 vuint32m4_t vqmaccu_vv_u32m4 ( vuint32m4_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions unsigned

vqmaccu_vv_u32:

LMUL = 4
op1: vuint32m4_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint8m2_t
op3: vuint8m2_t
返回值:vuint32m8_t

汇编指令:
vqmaccu.vv vd, vs1, vs2

◆ vqmaccu_vv_u32m4_m()

__rv32 vuint32m4_t vqmaccu_vv_u32m4_m ( vmask_t  mask,
vuint32m4_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions unsigned(带掩码)

vqmaccu_vv_u32:

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: vuint8m1_t
op4: vuint8m1_t
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: vuint8m2_t
op4: vuint8m2_t
返回值:vuint32m8_t

汇编指令:
vqmaccu.vv vd, vs1, vs2

◆ vqmaccu_vx_u32m4()

__rv32 vuint32m4_t vqmaccu_vx_u32m4 ( vuint32m4_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions unsigned

vqmaccu_vx_u32:

LMUL = 4
op1: vuint32m4_t
op2: uint8_t
op3: vuint8m1_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint8_t
op3: vuint8m2_t
返回值:vuint32m8_t

汇编指令:
vqmaccu.vx vd, rs1, vs2

◆ vqmaccu_vx_u32m4_m()

__rv32 vuint32m4_t vqmaccu_vx_u32m4_m ( vmask_t  mask,
vuint32m4_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions unsigned(带掩码)

vqmaccu_vx_u32:

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint8_t
op4: vuint8m1_t
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint8_t
op4: vuint8m2_t
返回值:vuint32m8_t

汇编指令:
vqmaccu.vx vd, rs1, vs2

◆ vqmaccus_vx_i32m4()

__rv32 vint32m4_t vqmaccus_vx_i32m4 ( vint32m4_t  acc,
uint8_t  op1,
vint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions unsigned-signed

vqmaccus_vx_i32:

LMUL = 4
op1: vint32m4_t
op2: uint8_t
op3: vint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint8_t
op3: vint8m2_t
返回值:vint32m8_t

汇编指令:
vqmaccus.vx vd, rs1, vs2

◆ vqmaccus_vx_i32m4_m()

__rv32 vint32m4_t vqmaccus_vx_i32m4_m ( vmask_t  mask,
vint32m4_t  acc,
uint8_t  op1,
vint8m1_t  op2 
)


Vector Quad-Widening Integer Multiply-Add Instructions unsigned-signed(带掩码)

vqmaccus_vx_i32:

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: uint8_t
op4: vint8m1_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: uint8_t
op4: vint8m2_t
返回值:vint32m8_t

汇编指令:
vqmaccus.vx vd, rs1, vs2

◆ vredand_vs_i16m1()

__rv32 vint16m1_t vredand_vs_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredand_vs_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredand.vs vd, vs2, vs1

◆ vredand_vs_i16m1_m()

__rv32 vint16m1_t vredand_vs_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredand_vs_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredand.vs vd, vs2, vs1, vm

◆ vredand_vs_i32m1()

__rv32 vint32m1_t vredand_vs_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredand_vs_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredand.vs vd, vs2, vs1

◆ vredand_vs_i32m1_m()

__rv32 vint32m1_t vredand_vs_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredand_vs_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredand.vs vd, vs2, vs1, vm

◆ vredand_vs_i8m1()

__rv32 vint8m1_t vredand_vs_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredand_vs_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredand.vs vd, vs2, vs1

◆ vredand_vs_i8m1_m()

__rv32 vint8m1_t vredand_vs_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredand_vs_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredand.vs vd, vs2, vs1, vm

◆ vredand_vs_u16m1()

__rv32 vuint16m1_t vredand_vs_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredand_vs_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredand.vs vd, vs2, vs1

◆ vredand_vs_u16m1_m()

__rv32 vuint16m1_t vredand_vs_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredand_vs_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredand.vs vd, vs2, vs1, vm

◆ vredand_vs_u32m1()

__rv32 vuint32m1_t vredand_vs_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredand_vs_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredand.vs vd, vs2, vs1

◆ vredand_vs_u32m1_m()

__rv32 vuint32m1_t vredand_vs_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredand_vs_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredand.vs vd, vs2, vs1, vm

◆ vredand_vs_u8m1()

__rv32 vuint8m1_t vredand_vs_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredand_vs_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredand.vs vd, vs2, vs1

◆ vredand_vs_u8m1_m()

__rv32 vuint8m1_t vredand_vs_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredand_vs_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredand.vs vd, vs2, vs1, vm

◆ vredmax_vs_i16m1()

__rv32 vint16m1_t vredmax_vs_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmax_vs_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredmax.vs vd, vs2, vs1

◆ vredmax_vs_i16m1_m()

__rv32 vint16m1_t vredmax_vs_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmax_vs_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredmax.vs vd, vs2, vs1, vm

◆ vredmax_vs_i32m1()

__rv32 vint32m1_t vredmax_vs_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmax_vs_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredmax.vs vd, vs2, vs1

◆ vredmax_vs_i32m1_m()

__rv32 vint32m1_t vredmax_vs_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmax_vs_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredmax.vs vd, vs2, vs1, vm

◆ vredmax_vs_i8m1()

__rv32 vint8m1_t vredmax_vs_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmax_vs_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredmax.vs vd, vs2, vs1

◆ vredmax_vs_i8m1_m()

__rv32 vint8m1_t vredmax_vs_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmax_vs_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredmax.vs vd, vs2, vs1, vm

◆ vredmaxu_vs_u16m1()

__rv32 vuint16m1_t vredmaxu_vs_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmaxu_vs_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredmaxu.vs vd, vs2, vs1

◆ vredmaxu_vs_u16m1_m()

__rv32 vuint16m1_t vredmaxu_vs_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmaxu_vs_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredmaxu.vs vd, vs2, vs1, vm

◆ vredmaxu_vs_u32m1()

__rv32 vuint32m1_t vredmaxu_vs_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmaxu_vs_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredmaxu.vs vd, vs2, vs1

◆ vredmaxu_vs_u32m1_m()

__rv32 vuint32m1_t vredmaxu_vs_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmaxu_vs_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredmaxu.vs vd, vs2, vs1, vm

◆ vredmaxu_vs_u8m1()

__rv32 vuint8m1_t vredmaxu_vs_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmaxu_vs_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredmaxu.vs vd, vs2, vs1

◆ vredmaxu_vs_u8m1_m()

__rv32 vuint8m1_t vredmaxu_vs_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmaxu_vs_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredmaxu.vs vd, vs2, vs1, vm

◆ vredmin_vs_i16m1()

__rv32 vint16m1_t vredmin_vs_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmin_vs_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredmin.vs vd, vs2, vs1

◆ vredmin_vs_i16m1_m()

__rv32 vint16m1_t vredmin_vs_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmin_vs_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredmin.vs vd, vs2, vs1, vm

◆ vredmin_vs_i32m1()

__rv32 vint32m1_t vredmin_vs_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmin_vs_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredmin.vs vd, vs2, vs1

◆ vredmin_vs_i32m1_m()

__rv32 vint32m1_t vredmin_vs_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmin_vs_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredmin.vs vd, vs2, vs1, vm

◆ vredmin_vs_i8m1()

__rv32 vint8m1_t vredmin_vs_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredmin_vs_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredmin.vs vd, vs2, vs1

◆ vredmin_vs_i8m1_m()

__rv32 vint8m1_t vredmin_vs_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredmin_vs_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredmin.vs vd, vs2, vs1, vm

◆ vredminu_vs_u16m1()

__rv32 vuint16m1_t vredminu_vs_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredminu_vs_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredminu.vs vd, vs2, vs1

◆ vredminu_vs_u16m1_m()

__rv32 vuint16m1_t vredminu_vs_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredminu_vs_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredminu.vs vd, vs2, vs1, vm

◆ vredminu_vs_u32m1()

__rv32 vuint32m1_t vredminu_vs_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredminu_vs_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredminu.vs vd, vs2, vs1

◆ vredminu_vs_u32m1_m()

__rv32 vuint32m1_t vredminu_vs_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredminu_vs_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredminu.vs vd, vs2, vs1, vm

◆ vredminu_vs_u8m1()

__rv32 vuint8m1_t vredminu_vs_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredminu_vs_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredminu.vs vd, vs2, vs1

◆ vredminu_vs_u8m1_m()

__rv32 vuint8m1_t vredminu_vs_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredminu_vs_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredminu.vs vd, vs2, vs1, vm

◆ vredor_vs_i16m1()

__rv32 vint16m1_t vredor_vs_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredor_vs_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredor.vs vd, vs2, vs1

◆ vredor_vs_i16m1_m()

__rv32 vint16m1_t vredor_vs_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredor_vs_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredor.vs vd, vs2, vs1, vm

◆ vredor_vs_i32m1()

__rv32 vint32m1_t vredor_vs_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredor_vs_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredor.vv vd, vs2, vs1

◆ vredor_vs_i32m1_m()

__rv32 vint32m1_t vredor_vs_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredor_vs_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredor.vs vd, vs2, vs1, vm

◆ vredor_vs_i8m1()

__rv32 vint8m1_t vredor_vs_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredor_vs_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredor.vs vd, vs2, vs1

◆ vredor_vs_i8m1_m()

__rv32 vint8m1_t vredor_vs_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredor_vs_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredor.vs vd, vs2, vs1, vm

◆ vredor_vs_u16m1()

__rv32 vuint16m1_t vredor_vs_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredor_vs_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredor.vs vd, vs2, vs1

◆ vredor_vs_u16m1_m()

__rv32 vuint16m1_t vredor_vs_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredor_vs_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredor.vs vd, vs2, vs1, vm

◆ vredor_vs_u32m1()

__rv32 vuint32m1_t vredor_vs_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredor_vs_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredor.vs vd, vs2, vs1

◆ vredor_vs_u32m1_m()

__rv32 vuint32m1_t vredor_vs_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredor_vs_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredor.vs vd, vs2, vs1, vm

◆ vredor_vs_u8m1()

__rv32 vuint8m1_t vredor_vs_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredor_vs_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredor.vs vd, vs2, vs1

◆ vredor_vs_u8m1_m()

__rv32 vuint8m1_t vredor_vs_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredor_vs_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredor.vs vd, vs2, vs1, vm

◆ vredsum_vs_i16m1()

__rv32 vint16m1_t vredsum_vs_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredsum_vs_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredsum.vs vd, vs2, vs1

◆ vredsum_vs_i16m1_m()

__rv32 vint16m1_t vredsum_vs_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredsum_vs_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredsum.vs vd, vs2, vs1, vm

◆ vredsum_vs_i32m1()

__rv32 vint32m1_t vredsum_vs_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredsum_vs_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredsum.vs vd, vs2, vs1

◆ vredsum_vs_i32m1_m()

__rv32 vint32m1_t vredsum_vs_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredsum_vs_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredsum.vs vd, vs2, vs1, vm

◆ vredsum_vs_i8m1()

__rv32 vint8m1_t vredsum_vs_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredsum_vs_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredsum.vs vd, vs2, vs1

◆ vredsum_vs_i8m1_m()

__rv32 vint8m1_t vredsum_vs_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredsum_vs_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredsum.vs vd, vs2, vs1, vm

◆ vredsum_vs_u16m1()

__rv32 vuint16m1_t vredsum_vs_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredsum_vs_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredsum.vs vd, vs2, vs1

◆ vredsum_vs_u16m1_m()

__rv32 vuint16m1_t vredsum_vs_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredsum_vs_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredsum.vs vd, vs2, vs1, vm

◆ vredsum_vs_u32m1()

__rv32 vuint32m1_t vredsum_vs_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredsum_vs_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredsum.vs vd, vs2, vs1

◆ vredsum_vs_u32m1_m()

__rv32 vuint32m1_t vredsum_vs_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredsum_vs_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredsum.vs vd, vs2, vs1, vm

◆ vredsum_vs_u8m1()

__rv32 vuint8m1_t vredsum_vs_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredsum_vs_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredsum.vs vd, vs2, vs1

◆ vredsum_vs_u8m1_m()

__rv32 vuint8m1_t vredsum_vs_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredsum_vs_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredsum.vs vd, vs2, vs1, vm

◆ vredxor_vs_i16m1()

__rv32 vint16m1_t vredxor_vs_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredxor_vs_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredxor.vs vd, vs2, vs1

◆ vredxor_vs_i16m1_m()

__rv32 vint16m1_t vredxor_vs_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredxor_vs_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vredxor.vs vd, vs2, vs1, vm

◆ vredxor_vs_i32m1()

__rv32 vint32m1_t vredxor_vs_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredxor_vs_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredxor.vs vd, vs2, vs1

◆ vredxor_vs_i32m1_m()

__rv32 vint32m1_t vredxor_vs_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredxor_vs_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vredxor.vs vd, vs2, vs1, vm

◆ vredxor_vs_i8m1()

__rv32 vint8m1_t vredxor_vs_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredxor_vs_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredxor.vs vd, vs2, vs1

◆ vredxor_vs_i8m1_m()

__rv32 vint8m1_t vredxor_vs_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredxor_vs_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vredxor.vs vd, vs2, vs1, vm

◆ vredxor_vs_u16m1()

__rv32 vuint16m1_t vredxor_vs_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredxor_vs_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredxor.vs vd, vs2, vs1

◆ vredxor_vs_u16m1_m()

__rv32 vuint16m1_t vredxor_vs_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredxor_vs_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vredxor.vs vd, vs2, vs1, vm

◆ vredxor_vs_u32m1()

__rv32 vuint32m1_t vredxor_vs_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredxor_vs_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredxor.vs vd, vs2, vs1

◆ vredxor_vs_u32m1_m()

__rv32 vuint32m1_t vredxor_vs_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredxor_vs_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vredxor.vs vd, vs2, vs1, vm

◆ vredxor_vs_u8m1()

__rv32 vuint8m1_t vredxor_vs_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions

vredxor_vs_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredxor.vs vd, vs2, vs1

◆ vredxor_vs_u8m1_m()

__rv32 vuint8m1_t vredxor_vs_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Integer Reduction Instructions (带掩码)

vredxor_vs_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vredxor.vs vd, vs2, vs1, vm

◆ vrem_vv_i16m1()

__rv32 vint16m1_t vrem_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Divide Instructions signed remainder

vrem_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vrem.vv vd, vs2, vs1

◆ vrem_vv_i16m1_m()

__rv32 vint16m1_t vrem_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Integer Divide Instructions signed remainder(带掩码)

vrem_vv_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: vint16m4_t
返回值:vint61m4_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: vint16m8_t
返回值:vint61m8_t

汇编指令:
vrem.vv vd, vs2, vs1, vm

◆ vrem_vv_i32m1()

__rv32 vint32m1_t vrem_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Divide Instructions signed remainder

vrem_vv_i8:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vrem.vv vd, vs2, vs1

◆ vrem_vv_i32m1_m()

__rv32 vint32m1_t vrem_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Integer Divide Instructions signed remainder(带掩码)

vrem_vv_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: vint32m8_t
返回值:vint32m8_t

汇编指令:
vrem.vv vd, vs2, vs1, vm

◆ vrem_vv_i8m1()

__rv32 vint8m1_t vrem_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Divide Instructions signed remainder

vrem_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vrem.vv vd, vs2, vs1

◆ vrem_vv_i8m1_m()

__rv32 vint8m1_t vrem_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Integer Divide Instructions signed remainder(带掩码)

vrem_vv_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: vint8m8_t
返回值:vint8m8_t

汇编指令:
vrem.vv vd, vs2, vs1, vm

◆ vrem_vx_i16m1()

__rv32 vint16m1_t vrem_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Divide Instructions signed remainder

vrem_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vrem.vx vd, vs2, rs1

◆ vrem_vx_i16m1_m()

__rv32 vint16m1_t vrem_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Integer Divide Instructions signed remainder(带掩码)

vrem_vx_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t
返回值:vint61m8_t

汇编指令:
vrem.vx vd, vs2, rs1, vm

◆ vrem_vx_i32m1()

__rv32 vint32m1_t vrem_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Divide Instructions signed remainder

vrem_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vrem.vx vd, vs2, rs1

◆ vrem_vx_i32m1_m()

__rv32 vint32m1_t vrem_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Integer Divide Instructions signed remainder(带掩码)

vrem_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t
返回值:vint32m8_t

汇编指令:
vrem.vx vd, vs2, rs1, vm

◆ vrem_vx_i8m1()

__rv32 vint8m1_t vrem_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Divide Instructions signed remainder

vrem_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vrem.vx vd, vs2, rs1

◆ vrem_vx_i8m1_m()

__rv32 vint8m1_t vrem_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Integer Divide Instructions signed remainder(带掩码)

vrem_vx_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t
返回值:vint8m8_t

汇编指令:
vrem.vx vd, vs2, rs1, vm

◆ vremu_vv_u16m1()

__rv32 vuint16m1_t vremu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Divide Instructions unsigned remainder

vremu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vremu.vv vd, vs2, vs1

◆ vremu_vv_u16m1_m()

__rv32 vuint16m1_t vremu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Integer Divide Instructions unsigned remainder(带掩码)

vremu_vv_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vremu.vv vd, vs2, vs1, vm

◆ vremu_vv_u32m1()

__rv32 vuint32m1_t vremu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Divide Instructions unsigned remainder

vremu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vremu.vv vd, vs2, vs1

◆ vremu_vv_u32m1_m()

__rv32 vuint32m1_t vremu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Integer Divide Instructions unsigned remainder(带掩码)

vremu_vv_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: vuint32m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: vuint32m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: vuint32m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: vuint32m8_t
返回值:vuint8m8_t

汇编指令:
vremu.vv vd, vs2, vs1, vm

◆ vremu_vv_u8m1()

__rv32 vuint8m1_t vremu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Divide Instructions unsigned remainder

vremu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vremu.vv vd, vs2, vs1

◆ vremu_vv_u8m1_m()

__rv32 vuint8m1_t vremu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Integer Divide Instructions unsigned remainder(带掩码)

vremu_vv_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vremu.vv vd, vs2, vs1, vm

◆ vremu_vx_u16m1()

__rv32 vuint16m1_t vremu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Divide Instructions unsigned remainder

vremu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vremu.vx vd, vs2, rs1

◆ vremu_vx_u16m1_m()

__rv32 vuint16m1_t vremu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Integer Divide Instructions unsigned remainder(带掩码)

vremu_vx_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vuint16m4_t

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t
返回值:vuint16m8_t

汇编指令:
vremu.vx vd, vs2, rs1, vm

◆ vremu_vx_u32m1()

__rv32 vuint32m1_t vremu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Divide Instructions unsigned remainder

vremu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vremu.vx vd, vs2, rs1

◆ vremu_vx_u32m1_m()

__rv32 vuint32m1_t vremu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Integer Divide Instructions unsigned remainder(带掩码)

vremu_vx_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t
返回值:vuint32m8_t

汇编指令:
vremu.vx vd, vs2, rs1, vm

◆ vremu_vx_u8m1()

__rv32 vuint8m1_t vremu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Divide Instructions unsigned remainder

vremu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vremu.vx vd, vs2, rs1

◆ vremu_vx_u8m1_m()

__rv32 vuint8m1_t vremu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Integer Divide Instructions unsigned remainder(带掩码)

vremu_vx_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t
返回值:vuint8m8_t

汇编指令:
vremu.vx vd, vs2, rs1, vm

◆ vrgather_vv_f32m1()

__rv32 vfloat32m1_t vrgather_vv_f32m1 ( vfloat32m1_t  op1,
vuint32m1_t  op2 
)


Vector Register Gather Instructions

vsll_vv_f32:

LMUL = 1
op1: vfloat32m1_t
op2: vuint32m1_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: vuint32m2_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: vuint32m4_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: vuint32m8_t
返回值:vfloat32m8_t

汇编指令:
vsll.vv vd, vs2, vs1

◆ vrgather_vv_f32m1_m()

__rv32 vfloat32m1_t vrgather_vv_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
vuint32m1_t  op2 
)


Vector Register Gather Instructions (带掩码)

vsll_vv_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vuint32m1_t
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: vuint32m2_t
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: vuint32m4_t
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: vuint32m8_t
返回值:vfloat32m8_t

汇编指令:
vsll.vv vd, vs2, vs1, vm

◆ vrgather_vv_i16m1()

__rv32 vint16m1_t vrgather_vv_i16m1 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Register Gather Instructions

vrgather_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vrgather.vv vd, vs2, vs1

◆ vrgather_vv_i16m1_m()

__rv32 vint16m1_t vrgather_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vrgather.vv vd, vs2, vs1, vm

◆ vrgather_vv_i32m1()

__rv32 vint32m1_t vrgather_vv_i32m1 ( vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Register Gather Instructions

vrgather_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vrgather.vv vd, vs2, vs1

◆ vrgather_vv_i32m1_m()

__rv32 vint32m1_t vrgather_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vrgather.vv vd, vs2, vs1, vm

◆ vrgather_vv_i8m1()

__rv32 vint8m1_t vrgather_vv_i8m1 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Register Gather Instructions

vrgather_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vrgather.vv vd, vs2, vs1

◆ vrgather_vv_i8m1_m()

__rv32 vint8m1_t vrgather_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vrgather.vv vd, vs2, vs1, vm

◆ vrgather_vv_u16m1()

__rv32 vuint16m1_t vrgather_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Register Gather Instructions

vrgather_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vrgather.vv vd, vs2, vs1

◆ vrgather_vv_u16m1_m()

__rv32 vuint16m1_t vrgather_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vrgather.vv vd, vs2, vs1, vm

◆ vrgather_vv_u32m1()

__rv32 vuint32m1_t vrgather_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Register Gather Instructions

vrgather_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vrgather.vv vd, vs2, vs1

◆ vrgather_vv_u32m1_m()

__rv32 vuint32m1_t vrgather_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vrgather.vv vd, vs2, vs1, vm

◆ vrgather_vv_u8m1()

__rv32 vuint8m1_t vrgather_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Register Gather Instructions

vrgather_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vrgather.vv vd, vs2, vs1

◆ vrgather_vv_u8m1_m()

__rv32 vuint8m1_t vrgather_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vrgather.vv vd, vs2, vs1, vm

◆ vrgather_vx_f32m1()

__rv32 vfloat32m1_t vrgather_vx_f32m1 ( vfloat32m1_t  op1,
uint32_t  op2 
)


Vector Register Gather Instructions

vrgather_vx_f32:

LMUL = 1
op1: vfloat32m1_t
op2: uint32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
op2: uint32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
op2: uint32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
op2: uint32_t
返回值:vfloat32m8_t

汇编指令:
vrgather.vx vd, vs2, rs1

◆ vrgather_vx_f32m1_m()

__rv32 vfloat32m1_t vrgather_vx_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
uint32_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vx_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: uint8_t
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
op2: uint8_t
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
op2: uint8_t
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
op2: uint8_t
返回值:vfloat32m8_t

汇编指令:
vrgather.vx vd, vs2, rs1, vm

◆ vrgather_vx_i16m1()

__rv32 vint16m1_t vrgather_vx_i16m1 ( vint16m1_t  op1,
uint16_t  op2 
)


Vector Register Gather Instructions

vrgather_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vrgather.vx vd, vs2, rs1

◆ vrgather_vx_i16m1_m()

__rv32 vint16m1_t vrgather_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
uint16_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vrgather.vx vd, vs2, rs1, vm

◆ vrgather_vx_i32m1()

__rv32 vint32m1_t vrgather_vx_i32m1 ( vint32m1_t  op1,
uint32_t  op2 
)


Vector Register Gather Instructions

vrgather_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vrgather.vx vd, vs2, rs1

◆ vrgather_vx_i32m1_m()

__rv32 vint32m1_t vrgather_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
uint32_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vrgather.vx vd, vs2, rs1, vm

◆ vrgather_vx_i8m1()

__rv32 vint8m1_t vrgather_vx_i8m1 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Register Gather Instructions

vrgather_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vrgather.vx vd, vs2, rs1

◆ vrgather_vx_i8m1_m()

__rv32 vint8m1_t vrgather_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vrgather.vx vd, vs2, rs1, vm

◆ vrgather_vx_u16m1()

__rv32 vuint16m1_t vrgather_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Register Gather Instructions

vrgather_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vrgather.vx vd, vs2, rs1

◆ vrgather_vx_u16m1_m()

__rv32 vuint16m1_t vrgather_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vrgather.vx vd, vs2, rs1, vm

◆ vrgather_vx_u32m1()

__rv32 vuint32m1_t vrgather_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Register Gather Instructions

vrgather_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vrgather.vx vd, vs2, rs1

◆ vrgather_vx_u32m1_m()

__rv32 vuint32m1_t vrgather_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vrgather.vx vd, vs2, rs1, vm

◆ vrgather_vx_u8m1()

__rv32 vuint8m1_t vrgather_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Register Gather Instructions

vrgather_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vrgather.vx vd, vs2, rs1

◆ vrgather_vx_u8m1_m()

__rv32 vuint8m1_t vrgather_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Register Gather Instructions (带掩码)

vrgather_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vrgather.vx vd, vs2, rs1, vm

◆ vrsub_vx_i16m1()

__rv32 vint16m1_t vrsub_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Integer reverse subtract

vrsub_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值: vint16m8_t

汇编指令:
vrsub.vx vd, vs2, rs1

◆ vrsub_vx_i16m1_m()

__rv32 vint16m1_t vrsub_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Integer reverse subtract(带掩码)

vrsub_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值: vint16m8_t

汇编指令:
vrsub.vx vd, vs2, rs1, vm

◆ vrsub_vx_i32m1()

__rv32 vint32m1_t vrsub_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Integer reverse subtract

vrsub_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值: vint32m8_t

汇编指令:
vrsub.vx vd, vs2, rs1

◆ vrsub_vx_i32m1_m()

__rv32 vint32m1_t vrsub_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Integer reverse subtract(带掩码)

vrsub_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值: vint32m8_t

汇编指令:
vrsub.vx vd, vs2, rs1, vm

◆ vrsub_vx_i8m1()

__rv32 vint8m1_t vrsub_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Integer reverse subtract

vrsub_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值: vint8m8_t

汇编指令:
vrsub.vx vd, vs2, rs1

◆ vrsub_vx_i8m1_m()

__rv32 vint8m1_t vrsub_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Integer reverse subtract(带掩码)

vrsub_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值: vint8m8_t

汇编指令:
vrsub.vx vd, vs2, rs1, vm

◆ vrsub_vx_u16m1()

__rv32 vuint16m1_t vrsub_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Integer reverse subtract

vrsub_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值: vuint16m8_t

汇编指令:
vrsub.vx vd, vs2, rs1

◆ vrsub_vx_u16m1_m()

__rv32 vuint16m1_t vrsub_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Integer reverse subtract(带掩码)

vrsub_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值: vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值: vuint16m8_t

汇编指令:
vrsub.vx vd, vs2, rs1, vm

◆ vrsub_vx_u32m1()

__rv32 vuint32m1_t vrsub_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Integer reverse subtract

vrsub_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值: vuint32m8_t

汇编指令:
vrsub.vx vd, vs2, rs1

◆ vrsub_vx_u32m1_m()

__rv32 vint32m1_t vrsub_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Integer reverse subtract(带掩码)

vrsub_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值: vuint32m8_t

汇编指令:
vrsub.vx vd, vs2, rs1, vm

◆ vrsub_vx_u8m1()

__rv32 vuint8m1_t vrsub_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Integer reverse subtract

vrsub_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值: vuint8m8_t

汇编指令:
vrsub.vx vd, vs2, rs1

◆ vrsub_vx_u8m1_m()

__rv32 vuint8m1_t vrsub_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Integer reverse subtract(带掩码)

vrsub_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值: vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值: vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值: vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值: vuint8m8_t

汇编指令:
vrsub.vx vd, vs2, rs1, vm

◆ vsadd_vv_i16m1()

__rv32 vint16m1_t vsadd_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vsadd.vv vd, vs2, vs1

◆ vsadd_vv_i16m1_m()

__rv32 vint16m1_t vsadd_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vsadd.vv vd, vs2, vs1, vm

◆ vsadd_vv_i32m1()

__rv32 vint32m1_t vsadd_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vsadd.vv vd, vs2, vs1

◆ vsadd_vv_i32m1_m()

__rv32 vint32m1_t vsadd_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vsadd.vv vd, vs2, vs1, vm

◆ vsadd_vv_i8m1()

__rv32 vint8m1_t vsadd_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vsadd.vv vd, vs2, vs1

◆ vsadd_vv_i8m1_m()

__rv32 vint8m1_t vsadd_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vsadd.vv vd, vs2, vs1, vm

◆ vsadd_vx_i16m1()

__rv32 vint16m1_t vsadd_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vsadd.vx vd, vs2, rs1

◆ vsadd_vx_i16m1_m()

__rv32 vint16m1_t vsadd_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vsadd.vx vd, vs2, rs1, vm

◆ vsadd_vx_i32m1()

__rv32 vint32m1_t vsadd_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vsadd.vx vd, vs2, rs1

◆ vsadd_vx_i32m1_m()

__rv32 vint32m1_t vsadd_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vsadd.vx vd, vs2, rs1, vm

◆ vsadd_vx_i8m1()

__rv32 vint8m1_t vsadd_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsadd_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vsadd.vx vd, vs2, rs1

◆ vsadd_vx_i8m1_m()

__rv32 vint8m1_t vsadd_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsadd_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vsadd.vx vd, vs2, rs1, vm

◆ vsaddu_vv_u16m1()

__rv32 vuint16m1_t vsaddu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vsaddu.vv vd, vs2, vs1

◆ vsaddu_vv_u16m1_m()

__rv32 vuint16m1_t vsaddu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vsaddu.vv vd, vs2, vs1, vm

◆ vsaddu_vv_u32m1()

__rv32 vuint32m1_t vsaddu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vsaddu.vv vd, vs2, vs1

◆ vsaddu_vv_u32m1_m()

__rv32 vuint32m1_t vsaddu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vsaddu.vv vd, vs2, vs1, vm

◆ vsaddu_vv_u8m1()

__rv32 vuint8m1_t vsaddu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vsaddu.vv vd, vs2, vs1

◆ vsaddu_vv_u8m1_m()

__rv32 vuint8m1_t vsaddu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vsaddu.vv vd, vs2, vs1, vm

◆ vsaddu_vx_u16m1()

__rv32 vuint16m1_t vsaddu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vsaddu.vx vd, vs2, rs1

◆ vsaddu_vx_u16m1_m()

__rv32 vuint16m1_t vsaddu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vsaddu.vx vd, vs2, rs1, vm

◆ vsaddu_vx_u32m1()

__rv32 vuint32m1_t vsaddu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vsaddu.vx vd, vs2, rs1

◆ vsaddu_vx_u32m1_m()

__rv32 vuint32m1_t vsaddu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vsaddu.vx vd, vs2, rs1, vm

◆ vsaddu_vx_u8m1()

__rv32 vuint8m1_t vsaddu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vsaddu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vsaddu.vx vd, vs2, rs1

◆ vsaddu_vx_u8m1_m()

__rv32 vuint8m1_t vsaddu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vsaddu_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vsaddu.vx vd, vs2, rs1, vm

◆ vsbc_vvm_i16m1()

__rv32 vint16m1_t vsbc_vvm_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vvm_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
borrowin: vmask_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
borrowin: vmask_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
borrowin: vmask_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
borrowin: vmask_t
返回值: vint16m8_t

汇编指令:
vsbc.vvm vd, vs2, vs1, v0

◆ vsbc_vvm_i32m1()

__rv32 vint32m1_t vsbc_vvm_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vvm_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
borrowin: vmask_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
borrowin: vmask_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
borrowin: vmask_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
borrowin: vmask_t
返回值: vint32m8_t

汇编指令:
vsbc.vvm vd, vs2, vs1, v0

◆ vsbc_vvm_i8m1()

__rv32 vint8m1_t vsbc_vvm_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vvm_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
borrowin: vmask_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
borrowin: vmask_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
borrowin: vmask_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
borrowin: vmask_t
返回值: vint8m8_t

汇编指令:
vsbc.vvm vd, vs2, vs1, v0

◆ vsbc_vvm_u16m1()

__rv32 vuint16m1_t vsbc_vvm_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vvm_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
borrowin: vmask_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
borrowin: vmask_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
borrowin: vmask_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
borrowin: vmask_t
返回值: vuint16m8_t

汇编指令:
vsbc.vvm vd, vs2, vs1, v0

◆ vsbc_vvm_u32m1()

__rv32 vuint32m1_t vsbc_vvm_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vvm_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
borrowin: vmask_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
borrowin: vmask_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
borrowin: vmask_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
borrowin: vmask_t
返回值: vuint32m8_t

汇编指令:
vsbc.vvm vd, vs2, vs1, v0

◆ vsbc_vvm_u8m1()

__rv32 vuint8m1_t vsbc_vvm_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vvm_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
borrowin: vmask_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
borrowin: vmask_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
borrowin: vmask_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
borrowin: vmask_t
返回值: vuint8m8_t

汇编指令:
vsbc.vvm vd, vs2, vs1, v0

◆ vsbc_vxm_i16m1()

__rv32 vint16m1_t vsbc_vxm_i16m1 ( vint16m1_t  op1,
int16_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vxm_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
borrowin: vmask_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
borrowin: vmask_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
borrowin: vmask_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
borrowin: vmask_t
返回值: vint16m8_t

汇编指令:
vsbc.vxm vd, vs2, rs1, v0

◆ vsbc_vxm_i32m1()

__rv32 vint32m1_t vsbc_vxm_i32m1 ( vint32m1_t  op1,
int32_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vxm_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
borrowin: vmask_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
borrowin: vmask_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
borrowin: vmask_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
borrowin: vmask_t
返回值: vint32m8_t

汇编指令:
vsbc.vxm vd, vs2, rs1, v0

◆ vsbc_vxm_i8m1()

__rv32 vint8m1_t vsbc_vxm_i8m1 ( vint8m1_t  op1,
int8_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vxm_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
borrowin: vmask_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
borrowin: vmask_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
borrowin: vmask_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
borrowin: vmask_t
返回值: vint8m8_t

汇编指令:
vsbc.vxm vd, vs2, rs1, v0

◆ vsbc_vxm_u16m1()

__rv32 vuint16m1_t vsbc_vxm_u16m1 ( vuint16m1_t  op1,
uint16_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vxm_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
borrowin: vmask_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
borrowin: vmask_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
borrowin: vmask_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
borrowin: vmask_t
返回值: vuint16m8_t

汇编指令:
vsbc.vxm vd, vs2, rs1, v0

◆ vsbc_vxm_u32m1()

__rv32 vuint32m1_t vsbc_vxm_u32m1 ( vuint32m1_t  op1,
uint32_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vxm_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
borrowin: vmask_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
borrowin: vmask_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
borrowin: vmask_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
borrowin: vmask_t
返回值: vuint32m8_t

汇编指令:
vsbc.vxm vd, vs2, rs1, v0

◆ vsbc_vxm_u8m1()

__rv32 vuint8m1_t vsbc_vxm_u8m1 ( vuint8m1_t  op1,
uint8_t  op2,
vmask_t  borrowin 
)


Produce difference with borrow

vsbc_vxm_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
borrowin: vmask_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
borrowin: vmask_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
borrowin: vmask_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
borrowin: vmask_t
返回值: vuint8m8_t

汇编指令:
vsbc.vxm vd, vs2, rs1, v0

◆ vse_v_f32m1()

__rv32 void vse_v_f32m1 ( vfloat32m1_t  value,
float32_t *  base 
)


Vector unit-stride loads and stores

vse_v_f32:

LMUL = 1
op1: vfloat32m1_t
op2: float32_t*
返回值:void

LMUL = 2
op1: vfloat32m1_t
op2: float32_t*
返回值:void

LMUL = 4
op1: vfloat32m1_t
op2: float32_t*
返回值:void

LMUL = 8
op1: vfloat32m1_t
op2: float32_t*
返回值:void

汇编指令:
vse.v vs3, (rs1)

◆ vse_v_f32m1_m()

__rv32 void vse_v_f32m1_m ( vmask_t  mask,
vfloat32m1_t  value,
float32_t *  base 
)


Vector unit-stride loads and stores(带掩码)

vse_v_f32:

LMUL = 1
op1: vmask_t
op2: vfloat32m1_t
op3: float32_t*
返回值:void

LMUL = 2
op1: vmask_t
op2: vfloat32m2_t
op3: float32_t*
返回值:void

LMUL = 4
op1: vmask_t
op2: vfloat32m4_t
op3: float32_t*
返回值:void

LMUL = 8
op1: vmask_t
op2: vfloat32m8_t
op3: float32_t*
返回值:void

汇编指令:
vse.v vs3, (rs1), vm

◆ vse_v_i16m1()

__rv32 void vse_v_i16m1 ( vint16m1_t  value,
int16_t *  base 
)


Vector unit-stride loads and stores

vse_v_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t*
返回值:void

LMUL = 2
op1: vint16m2_t
op2: int16_t*
返回值:void

LMUL = 4
op1: vint16m4_t
op2: int16_t*
返回值:void

LMUL = 8
op1: vint16m8_t
op2: int16_t*
返回值:void

汇编指令:
vse.v vs3, (rs1)

◆ vse_v_i16m1_m()

__rv32 void vse_v_i16m1_m ( vmask_t  mask,
vint16m1_t  value,
int16_t *  base 
)


Vector unit-stride loads and stores(带掩码)

vse_v_i16:

LMUL = 1
op1: vmask_t
op2: vint16m1_t
op3: int16_t*
返回值:void

LMUL = 2
op1: vmask_t
op2: vint16m2_t
op3: int16_t*
返回值:void

LMUL = 4
op1: vmask_t
op2: vint16m4_t
op3: int16_t*
返回值:void

LMUL = 8
op1: vmask_t
op2: vint16m8_t
op3: int16_t*
返回值:void

汇编指令:
vse.v vs3, (rs1), vm

◆ vse_v_i32m1()

__rv32 void vse_v_i32m1 ( vint32m1_t  value,
int32_t *  base 
)


Vector unit-stride loads and stores

vse_v_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t*
返回值:void

LMUL = 2
op1: vint32m2_t
op2: int32_t*
返回值:void

LMUL = 4
op1: vint32m4_t
op2: int32_t*
返回值:void

LMUL = 8
op1: vint32m8_t
op2: int32_t*
返回值:void

汇编指令:
vse.v vs3, (rs1)

◆ vse_v_i32m1_m()

__rv32 void vse_v_i32m1_m ( vmask_t  mask,
vint32m1_t  value,
int32_t *  base 
)


Vector unit-stride loads and stores(带掩码)

vse_v_i32:

LMUL = 1
op1: vmask_t
op2: vint32m1_t
op3: int32_t*
返回值:void

LMUL = 2
op1: vmask_t
op2: vint32m2_t
op3: int32_t*
返回值:void

LMUL = 4
op1: vmask_t
op2: vint32m4_t
op3: int32_t*
返回值:void

LMUL = 8
op1: vmask_t
op2: vint32m8_t
op3: int32_t*
返回值:void

汇编指令:
vse.v vs3, (rs1), vm

◆ vse_v_i8m1()

__rv32 void vse_v_i8m1 ( vint8m1_t  value,
int8_t *  base 
)


Vector unit-stride loads and stores

vse_v_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t*
返回值:void

LMUL = 2
op1: vint8m2_t
op2: int8_t*
返回值:void

LMUL = 4
op1: vint8m4_t
op2: int8_t*
返回值:void

LMUL = 8
op1: vint8m8_t
op2: int8_t*
返回值:void

汇编指令:
vse.v vs3, (rs1)

◆ vse_v_i8m1_m()

__rv32 void vse_v_i8m1_m ( vmask_t  mask,
vint8m1_t  value,
int8_t *  base 
)


Vector unit-stride loads and stores(带掩码)

vse_v_i8:

LMUL = 1
op1: vmask_t
op2: vint8m1_t
op3: int8_t*
返回值:void

LMUL = 2
op1: vmask_t
op2: vint8m2_t
op3: int8_t*
返回值:void

LMUL = 4
op1: vmask_t
op2: vint8m4_t
op3: int8_t*
返回值:void

LMUL = 8
op1: vmask_t
op2: vint8m8_t
op3: int8_t*
返回值:void

汇编指令:
vse.v vs3, (rs1), vm

◆ vse_v_u16m1()

__rv32 void vse_v_u16m1 ( vuint16m1_t  value,
uint16_t *  base 
)


Vector unit-stride loads and stores

vse_v_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t*
返回值:void

LMUL = 2
op1: vuint16m1_t
op2: uint16_t*
返回值:void

LMUL = 4
op1: vuint16m1_t
op2: uint16_t*
返回值:void

LMUL = 8
op1: vuint16m1_t
op2: uint16_t*
返回值:void

汇编指令:
vse.v vs3, (rs1)

◆ vse_v_u16m1_m()

__rv32 void vse_v_u16m1_m ( vmask_t  mask,
vuint16m1_t  value,
uint16_t *  base 
)


Vector unit-stride loads and stores(带掩码)

vse_v_u16:

LMUL = 1
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t*
返回值:void

LMUL = 2
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t*
返回值:void

LMUL = 4
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t*
返回值:void

LMUL = 8
op1: vmask_t
op2: vuint16m8_t
op3: uint16_t*
返回值:void

汇编指令:
vse.v vs3, (rs1), vm

◆ vse_v_u32m1()

__rv32 void vse_v_u32m1 ( vuint32m1_t  value,
uint32_t *  base 
)


Vector unit-stride loads and stores

vse_v_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t*
返回值:void

LMUL = 2
op1: vuint32m1_t
op2: uint32_t*
返回值:void

LMUL = 4
op1: vuint32m1_t
op2: uint32_t*
返回值:void

LMUL = 8
op1: vuint32m1_t
op2: uint32_t*
返回值:void

汇编指令:
vse.v vs3, (rs1)

◆ vse_v_u32m1_m()

__rv32 void vse_v_u32m1_m ( vmask_t  mask,
vuint32m1_t  value,
uint32_t *  base 
)


Vector unit-stride loads and stores(带掩码)

vse_v_u32:

LMUL = 1
op1: vmask_t
op2: vuint32m1_t
op3: uint32_t*
返回值:void

LMUL = 2
op1: vmask_t
op2: vuint32m2_t
op3: uint32_t*
返回值:void

LMUL = 4
op1: vmask_t
op2: vuint32m4_t
op3: uint32_t*
返回值:void

LMUL = 8
op1: vmask_t
op2: vuint32m8_t
op3: uint32_t*
返回值:void

汇编指令:
vse.v vs3, (rs1), vm

◆ vse_v_u8m1()

__rv32 void vse_v_u8m1 ( vuint8m1_t  value,
uint8_t *  base 
)


Vector unit-stride loads and stores

vse_v_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t*
返回值:void

LMUL = 2
op1: vuint8m1_t
op2: uint8_t*
返回值:void

LMUL = 4
op1: vuint8m1_t
op2: uint8_t*
返回值:void

LMUL = 8
op1: vuint8m1_t
op2: uint8_t*
返回值:void

汇编指令:
vse.v vs3, (rs1)

◆ vse_v_u8m1_m()

__rv32 void vse_v_u8m1_m ( vmask_t  mask,
vuint8m1_t  value,
uint8_t *  base 
)


Vector unit-stride loads and stores(带掩码)

vse_v_u8:

LMUL = 1
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t*
返回值:void

LMUL = 2
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t*
返回值:void

LMUL = 4
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t*
返回值:void

LMUL = 8
op1: vmask_t
op2: vuint8m8_t
op3: uint8_t*
返回值:void

汇编指令:
vse.v vs3, (rs1), vm

◆ vsetvl()

__rv32 uint32_t vsetvl ( uint32_t  avl,
uint32_t  vtypei 
)


Configuration-Setting Instructions

vsetvl:


op1: uint32_t
op2: uint32_t
返回值:uint32_t

汇编指令:
vsetvl rd, rs1, rs2

◆ vslide1down_vx_f32m1()

__rv32 vfloat32m1_t vslide1down_vx_f32m1 ( vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1down_vx_f32:

LMUL = 1
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1

◆ vslide1down_vx_f32m1_m()

__rv32 vfloat32m1_t vslide1down_vx_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1down_vx_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1, vm

◆ vslide1down_vx_i16m1()

__rv32 vint16m1_t vslide1down_vx_i16m1 ( vint16m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslide1down_vx_i16:

LMUL = 1
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1

◆ vslide1down_vx_i16m2_m()

__rv32 vint16m2_t vslide1down_vx_i16m2_m ( vmask_t  mask,
vint16m2_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1down_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1, vm

◆ vslide1down_vx_i32m1()

__rv32 vint32m1_t vslide1down_vx_i32m1 ( vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslide1down_vx_i32:

LMUL = 1
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1

◆ vslide1down_vx_i32m1_m()

__rv32 vint32m1_t vslide1down_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1down_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1, vm

◆ vslide1down_vx_i8m1()

__rv32 vint8m1_t vslide1down_vx_i8m1 ( vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslide1down_vx_i8:

LMUL = 1
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1

◆ vslide1down_vx_i8m1_m()

__rv32 vint8m1_t vslide1down_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1down_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1, vm

◆ vslide1down_vx_u16m1()

__rv32 vuint16m1_t vslide1down_vx_u16m1 ( vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1down_vx_u16:

LMUL = 1
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1

◆ vslide1down_vx_u16m1_m()

__rv32 vuint16m1_t vslide1down_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1down_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1, vm

◆ vslide1down_vx_u32m1()

__rv32 vuint32m1_t vslide1down_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1down_vx_u32:

LMUL = 1
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1

◆ vslide1down_vx_u32m1_m()

__rv32 vuint32m1_t vslide1down_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1down_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1, vm

◆ vslide1down_vx_u8m1()

__rv32 vuint8m1_t vslide1down_vx_u8m1 ( vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1down_vx_u8:

LMUL = 1
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1

◆ vslide1down_vx_u8m1_m()

__rv32 vuint8m1_t vslide1down_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1down_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslide1down.vx vd, vs2, rs1, vm

◆ vslide1up_vx_f32m1()

__rv32 vfloat32m1_t vslide1up_vx_f32m1 ( vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1up_vx_f32:

LMUL = 1
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1

◆ vslide1up_vx_f32m1_m()

__rv32 vfloat32m1_t vslide1up_vx_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1up_vx_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1, vm

◆ vslide1up_vx_i16m1()

__rv32 vint16m1_t vslide1up_vx_i16m1 ( vint16m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslide1up_vx_i16:

LMUL = 1
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1

◆ vslide1up_vx_i16m1_m()

__rv32 vint16m1_t vslide1up_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1up_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1, vm

◆ vslide1up_vx_i32m1()

__rv32 vint32m1_t vslide1up_vx_i32m1 ( vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslide1up_vx_i32:

LMUL = 1
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1

◆ vslide1up_vx_i32m1_m()

__rv32 vint32m1_t vslide1up_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1up_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1, vm

◆ vslide1up_vx_i8m1()

__rv32 vint8m1_t vslide1up_vx_i8m1 ( vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslide1up_vx_i8:

LMUL = 1
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1

◆ vslide1up_vx_i8m1_m()

__rv32 vint8m1_t vslide1up_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1up_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1, vm

◆ vslide1up_vx_u16m1()

__rv32 vuint16m1_t vslide1up_vx_u16m1 ( vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1up_vx_u16:

LMUL = 1
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1

◆ vslide1up_vx_u16m1_m()

__rv32 vuint16m1_t vslide1up_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1up_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1, vm

◆ vslide1up_vx_u32m1()

__rv32 vuint32m1_t vslide1up_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1up_vx_u32:

LMUL = 1
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1

◆ vslide1up_vx_u32m1_m()

__rv32 vuint32m1_t vslide1up_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1up_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1, vm

◆ vslide1up_vx_u8m1()

__rv32 vuint8m1_t vslide1up_vx_u8m1 ( vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslide1up_vx_u8:

LMUL = 1
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1

◆ vslide1up_vx_u8m1_m()

__rv32 vuint8m1_t vslide1up_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslide1up_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslide1up.vx vd, vs2, rs1, vm

◆ vslidedown_vx_f32m1()

__rv32 vfloat32m1_t vslidedown_vx_f32m1 ( vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslidedown_vx_f32:

LMUL = 1
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1

◆ vslidedown_vx_f32m1_m()

__rv32 vfloat32m1_t vslidedown_vx_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslidedown_vx_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1, vm

◆ vslidedown_vx_i16m1()

__rv32 vint16m1_t vslidedown_vx_i16m1 ( vint16m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslidedown_vx_i16:

LMUL = 1
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1

◆ vslidedown_vx_i16m1_m()

__rv32 vint16m1_t vslidedown_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslidedown_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1, vm

◆ vslidedown_vx_i32m1()

__rv32 vint32m1_t vslidedown_vx_i32m1 ( vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslidedown_vx_i32:

LMUL = 1
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1

◆ vslidedown_vx_i32m1_m()

__rv32 vint32m1_t vslidedown_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslidedown_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vslidedown_vx_i8m1()

__rv32 vint8m1_t vslidedown_vx_i8m1 ( vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslidedown_vx_i8:

LMUL = 1
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1

◆ vslidedown_vx_i8m1_m()

__rv32 vint8m1_t vslidedown_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslidedown_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1, vm

◆ vslidedown_vx_u16m1()

__rv32 vuint16m1_t vslidedown_vx_u16m1 ( vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslidedown_vx_u16:

LMUL = 1
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1

◆ vslidedown_vx_u16m1_m()

__rv32 vuint16m1_t vslidedown_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslidedown_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1, vm

◆ vslidedown_vx_u32m1()

__rv32 vuint32m1_t vslidedown_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslidedown_vx_u32:

LMUL = 1
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1

◆ vslidedown_vx_u32m1_m()

__rv32 vuint32m1_t vslidedown_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslidedown_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1, vm

◆ vslidedown_vx_u8m1()

__rv32 vuint8m1_t vslidedown_vx_u8m1 ( vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslidedown_vx_u8:

LMUL = 1
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1

◆ vslidedown_vx_u8m1_m()

__rv32 vuint8m1_t vslidedown_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslidedown_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslidedown.vx vd, vs2, rs1, vm

◆ vslideup_vx_f32m1()

__rv32 vfloat32m1_t vslideup_vx_f32m1 ( vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslideup_vx_f32:

LMUL = 1
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslideup.vx vd, vs2, rs1

◆ vslideup_vx_f32m1_m()

__rv32 vfloat32m1_t vslideup_vx_f32m1_m ( vmask_t  mask,
vfloat32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslideup_vx_f32:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
offset: uint32_t
返回值:vfloat32m1_t

LMUL = 2
mask: vmask_t
op1: vfloat32m2_t
offset: uint32_t
返回值:vfloat32m2_t

LMUL = 4
mask: vmask_t
op1: vfloat32m4_t
offset: uint32_t
返回值:vfloat32m4_t

LMUL = 8
mask: vmask_t
op1: vfloat32m8_t
offset: uint32_t
返回值:vfloat32m8_t

汇编指令:
vslideup.vx vd, vs2, rs1, vm

◆ vslideup_vx_i16m1()

__rv32 vint16m1_t vslideup_vx_i16m1 ( vint16m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslideup_vx_i16:

LMUL = 1
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslideup.vx vd, vs2, rs1

◆ vslideup_vx_i16m1_m()

__rv32 vint16m1_t vslideup_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslideup_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
offset: int32_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
offset: int32_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
offset: int32_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
offset: int32_t
返回值:vint16m8_t

汇编指令:
vslideup.vx vd, vs2, rs1, vm

◆ vslideup_vx_i32m1()

__rv32 vint32m1_t vslideup_vx_i32m1 ( vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslideup_vx_i32:

LMUL = 1
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vslideup.vx vd, vs2, rs1

◆ vslideup_vx_i32m1_m()

__rv32 vint32m1_t vslideup_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslideup_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
offset: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
offset: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
offset: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
offset: int32_t
返回值:vint32m8_t

汇编指令:
vand.vx vd, vs2, rs1, vm

◆ vslideup_vx_i8m1()

__rv32 vint8m1_t vslideup_vx_i8m1 ( vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions

vslideup_vx_i8:

LMUL = 1
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslideup.vx vd, vs2, rs1

◆ vslideup_vx_i8m1_m()

__rv32 vint8m1_t vslideup_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int32_t  offset 
)


Vector Slide Instructions (带掩码)

vslideup_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
offset: int32_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
offset: int32_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
offset: int32_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
offset: int32_t
返回值:vint8m8_t

汇编指令:
vslideup.vx vd, vs2, rs1, vm

◆ vslideup_vx_u16m1()

__rv32 vuint16m1_t vslideup_vx_u16m1 ( vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslideup_vx_u16:

LMUL = 1
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslideup.vx vd, vs2, rs1

◆ vslideup_vx_u16m1_m()

__rv32 vuint16m1_t vslideup_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslideup_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
offset: uint32_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
offset: uint32_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
offset: uint32_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
offset: uint32_t
返回值:vuint16m8_t

汇编指令:
vslideup.vx vd, vs2, rs1, vm

◆ vslideup_vx_u32m1()

__rv32 vuint32m1_t vslideup_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslideup_vx_u32:

LMUL = 1
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslideup.vx vd, vs2, rs1

◆ vslideup_vx_u32m1_m()

__rv32 vuint32m1_t vslideup_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslideup_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
offset: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
offset: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
offset: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
offset: uint32_t
返回值:vuint32m8_t

汇编指令:
vslideup.vx vd, vs2, rs1, vm

◆ vslideup_vx_u8m1()

__rv32 vuint8m1_t vslideup_vx_u8m1 ( vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions

vslideup_vx_u8:

LMUL = 1
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslideup.vx vd, vs2, rs1

◆ vslideup_vx_u8m1_m()

__rv32 vuint8m1_t vslideup_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint32_t  offset 
)


Vector Slide Instructions (带掩码)

vslideup_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
offset: uint32_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
offset: uint32_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
offset: uint32_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
offset: uint32_t
返回值:vuint8m8_t

汇编指令:
vslideup.vx vd, vs2, rs1, vm

◆ vsll_vv_i16m1()

__rv32 vint16m1_t vsll_vv_i16m1 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vsll.vv vd, vs2, vs1

◆ vsll_vv_i16m1_m()

__rv32 vint16m1_t vsll_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vsll.vv vd, vs2, vs1, vm

◆ vsll_vv_i32m1()

__rv32 vint32m1_t vsll_vv_i32m1 ( vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vsll.vv vd, vs2, vs1

◆ vsll_vv_i32m1_m()

__rv32 vint32m1_t vsll_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vsll.vv vd, vs2, vs1, vm

◆ vsll_vv_i8m1()

__rv32 vint8m1_t vsll_vv_i8m1 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vsll.vv vd, vs2, vs1

◆ vsll_vv_i8m1_m()

__rv32 vint8m1_t vsll_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vsll.vv vd, vs2, vs1, vm

◆ vsll_vv_u16m1()

__rv32 vuint16m1_t vsll_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vsll.vv vd, vs2, vs1

◆ vsll_vv_u16m1_m()

__rv32 vuint16m1_t vsll_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vsll.vv vd, vs2, vs1, vm

◆ vsll_vv_u32m1()

__rv32 vuint32m1_t vsll_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vsll.vv vd, vs2, vs1

◆ vsll_vv_u32m1_m()

__rv32 vuint32m1_t vsll_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vv_i32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vsll.vv vd, vs2, vs1, vm

◆ vsll_vv_u8m1()

__rv32 vuint8m1_t vsll_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vsll.vv vd, vs2, vs1

◆ vsll_vv_u8m1_m()

__rv32 vuint8m1_t vsll_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vsll.vv vd, vs2, vs1, vm

◆ vsll_vx_i16m1()

__rv32 vint16m1_t vsll_vx_i16m1 ( vint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uint8_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uint8_t
返回值:vint16m8_t

汇编指令:
vsll.vx vd, vs2, rs1

◆ vsll_vx_i16m1_m()

__rv32 vint16m1_t vsll_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uint8_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uint8_t
返回值:vint16m8_t

汇编指令:
vsll.vx vd, vs2, rs1, vm

◆ vsll_vx_i32m1()

__rv32 vint32m1_t vsll_vx_i32m1 ( vint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: uint8_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uint8_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uint8_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint8_t
返回值:vint32m8_t

汇编指令:
vsll.vx vd, vs2, rs1

◆ vsll_vx_i32m1_m()

__rv32 vint32m1_t vsll_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uint8_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uint8_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uint8_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uint8_t
返回值:vint32m8_t

汇编指令:
vsll.vx vd, vs2, rs1, vm

◆ vsll_vx_i8m1()

__rv32 vint8m1_t vsll_vx_i8m1 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vsll.vx vd, vs2, rs1

◆ vsll_vx_i8m1_m()

__rv32 vint8m1_t vsll_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vsll.vx vd, vs2, rs1, vm

◆ vsll_vx_u16m1()

__rv32 vuint16m1_t vsll_vx_u16m1 ( vuint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint8_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint8_t
返回值:vuint16m8_t

汇编指令:
vsll.vx vd, vs2, rs1

◆ vsll_vx_u16m1_m()

__rv32 vuint16m1_t vsll_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint8_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint8_t
返回值:vuint16m8_t

汇编指令:
vsll.vx vd, vs2, rs1, vm

◆ vsll_vx_u32m1()

__rv32 vuint32m1_t vsll_vx_u32m1 ( vuint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint8_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint8_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint8_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint8_t
返回值:vuint32m8_t

汇编指令:
vsll.vx vd, vs2, rs1

◆ vsll_vx_u32m1_m()

__rv32 vuint32m1_t vsll_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint8_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint8_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint8_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint8_t
返回值:vuint32m8_t

汇编指令:
vsll.vx vd, vs2, rs1, vm

◆ vsll_vx_u8m1()

__rv32 vuint8m1_t vsll_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsll_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vsll.vx vd, vs2, rs1

◆ vsll_vx_u8m1_m()

__rv32 vuint8m1_t vsll_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsll_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vsll.vx vd, vs2, rs1, vm

◆ vsmul_vv_i16m1()

__rv32 vint16m1_t vsmul_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions

vsmul_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vsmul.vv vd, vs2, vs1

◆ vsmul_vv_i16m1_m()

__rv32 vint16m1_t vsmul_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions (带掩码)

vsmul_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vsmul.vv vd, vs2, vs1, vm

◆ vsmul_vv_i32m1()

__rv32 vint32m1_t vsmul_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions

vsmul_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vsmul.vv vd, vs2, vs1

◆ vsmul_vv_i32m1_m()

__rv32 vint32m1_t vsmul_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions (带掩码)

vsmul_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vsmul.vv vd, vs2, vs1, vm

◆ vsmul_vv_i8m1()

__rv32 vint8m1_t vsmul_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions

vsmul_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vsmul.vv vd, vs2, vs1

◆ vsmul_vv_i8m1_m()

__rv32 vint8m1_t vsmul_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions (带掩码)

vsmul_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vsmul.vv vd, vs2, vs1, vm

◆ vsmul_vx_i16m1()

__rv32 vint16m1_t vsmul_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions

vsmul_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vsmul.vx vd, vs2, rs1

◆ vsmul_vx_i16m1_m()

__rv32 vint16m1_t vsmul_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions (带掩码)

vsmul_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vsmul.vx vd, vs2, rs1, vm

◆ vsmul_vx_i32m1()

__rv32 vint32m1_t vsmul_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions

vsmul_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vsmul.vx vd, vs2, rs1

◆ vsmul_vx_i32m1_m()

__rv32 vint32m1_t vsmul_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions (带掩码)

vsmul_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vsmul.vx vd, vs2, rs1, vm

◆ vsmul_vx_i8m1()

__rv32 vint8m1_t vsmul_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions

vsmul_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vsmul.vx vd, vs2, rs1

◆ vsmul_vx_i8m1_m()

__rv32 vint8m1_t vsmul_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Fractional Multiply with Rounding and Saturation Instructions (带掩码)

vsmul_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vsmul.vx vd, vs2, rs1, vm

◆ vsra_vv_i16m1()

__rv32 vint16m1_t vsra_vv_i16m1 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsra_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vsra.vv vd, vs2, vs1

◆ vsra_vv_i16m1_m()

__rv32 vint16m1_t vsra_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vsra.vv vd, vs2, vs1, vm

◆ vsra_vv_i32m1()

__rv32 vint32m1_t vsra_vv_i32m1 ( vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsra_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vsra.vv vd, vs2, vs1

◆ vsra_vv_i32m1_m()

__rv32 vuint32m1_t vsra_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vsra.vv vd, vs2, vs1, vm

◆ vsra_vv_i8m1()

__rv32 vint8m1_t vsra_vv_i8m1 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsra_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vsra.vv vd, vs2, vs1

◆ vsra_vv_i8m1_m()

__rv32 vint8m1_t vsra_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vsra.vv vd, vs2, vs1, vm

◆ vsra_vx_i16m1()

__rv32 vint16m1_t vsra_vx_i16m1 ( vint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsra_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uint8_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uint8_t
返回值:vint16m8_t

汇编指令:
vsra.vx vd, vs2, rs1

◆ vsra_vx_i16m1_m()

__rv32 vint16m1_t vsra_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uint8_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uint8_t
返回值:vint16m8_t

汇编指令:
vsra.vx vd, vs2, rs1, vm

◆ vsra_vx_i32m1()

__rv32 vint32m1_t vsra_vx_i32m1 ( vint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsra_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: uint8_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uint8_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uint8_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint8_t
返回值:vint32m8_t

汇编指令:
vsra.vx vd, vs2, rs1

◆ vsra_vx_i32m1_m()

__rv32 vint32m1_t vsra_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uint8_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uint8_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uint8_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uint8_t
返回值:vint32m8_t

汇编指令:
vsra.vx vd, vs2, rs1, vm

◆ vsra_vx_i8m1()

__rv32 vint8m1_t vsra_vx_i8m1 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsra_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vsra.vx vd, vs2, rs1

◆ vsra_vx_i8m1_m()

__rv32 vint8m1_t vsra_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsra_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vsra.vx vd, vs2, rs1, vm

◆ vsrl_vv_u16m1()

__rv32 vuint16m1_t vsrl_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsrl_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vsrl.vv vd, vs2, vs1

◆ vsrl_vv_u16m1_m()

__rv32 vuint16m1_t vsrl_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vsrl.vv vd, vs2, vs1, vm

◆ vsrl_vv_u32m1()

__rv32 vuint32m1_t vsrl_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsrl_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vsrl.vv vd, vs2, vs1

◆ vsrl_vv_u32m1_m()

__rv32 vuint32m1_t vsrl_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vv_i32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vsrl.vv vd, vs2, vs1, vm

◆ vsrl_vv_u8m1()

__rv32 vuint8m1_t vsrl_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsrl_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vsrl.vv vd, vs2, vs1

◆ vsrl_vv_u8m1_m()

__rv32 vuint8m1_t vsrl_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vsrl.vv vd, vs2, vs1, vm

◆ vsrl_vx_u16m1()

__rv32 vuint16m1_t vsrl_vx_u16m1 ( vuint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsrl_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint8_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint8_t
返回值:vuint16m8_t

汇编指令:
vsrl.vx vd, vs2, rs1

◆ vsrl_vx_u16m1_m()

__rv32 vuint16m1_t vsrl_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint8_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint8_t
返回值:vuint16m8_t

汇编指令:
vsrl.vx vd, vs2, rs1, vm

◆ vsrl_vx_u32m1()

__rv32 vuint32m1_t vsrl_vx_u32m1 ( vuint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsrl_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint8_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint8_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint8_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint8_t
返回值:vuint32m8_t

汇编指令:
vsrl.vx vd, vs2, rs1

◆ vsrl_vx_u32m1_m()

__rv32 vuint32m1_t vsrl_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint8_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint8_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint8_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint8_t
返回值:vuint32m8_t

汇编指令:
vsrl.vx vd, vs2, rs1, vm

◆ vsrl_vx_u8m1()

__rv32 vuint8m1_t vsrl_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions

vsrl_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vsrl.vx vd, vs2, rs1

◆ vsrl_vx_u8m1_m()

__rv32 vuint8m1_t vsrl_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Bit Shift Instructions (带掩码)

vsrl_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vsrl.vx vd, vs2, rs1, vm

◆ vsse_v_f32m1()

__rv32 void vsse_v_f32m1 ( float32_t *  base,
const int32_t  stride,
vfloat32m1_t  value 
)


Vector strided loads and stores

vsse_v_f32:

LMUL = 1
op1: float32_t*
op2: const int32_t
op3: vfloat32m1_t
返回值:void

LMUL = 2
op1: float32_t*
op2: const int32_t
op3: vfloat32m2_t
返回值:void

LMUL = 4
op1: float32_t*
op2: const int32_t
op3: vfloat32m4_t
返回值:void

LMUL = 8
op1: float32_t*
op2: const int32_t
op3: vfloat32m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2

◆ vsse_v_f32m1_m()

__rv32 void vsse_v_f32m1_m ( vmask_t  mask,
float32_t *  base,
const int32_t  stride,
vfloat32m1_t  value 
)


Vector strided loads and stores(带掩码)

vsse_v_f32:

LMUL = 1
op1: vmask_t
op2: float32_t*
op3: const int32_t
op4: vfloat32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: float32_t*
op3: const int32_t
op4: vfloat32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: float32_t*
op3: const int32_t
op4: vfloat32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: float32_t*
op3: const int32_t
op4: vfloat32m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2, vm

◆ vsse_v_i16m1()

__rv32 void vsse_v_i16m1 ( int16_t *  base,
const int32_t  stride,
vint16m1_t  value 
)


Vector strided loads and stores

vsse_v_i16:

LMUL = 1
op1: int16_t*
op2: const int32_t
op3: vint16m1_t
返回值:void

LMUL = 2
op1: int16_t*
op2: const int32_t
op3: vint16m2_t
返回值:void

LMUL = 4
op1: int16_t*
op2: const int32_t
op3: vint16m4_t
返回值:void

LMUL = 8
op1: int16_t*
op2: const int32_t
op3: vint16m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2

◆ vsse_v_i16m1_m()

__rv32 void vsse_v_i16m1_m ( vmask_t  mask,
int16_t *  base,
const int32_t  stride,
vint16m1_t  value 
)


Vector strided loads and stores(带掩码)

vsse_v_i16:

LMUL = 1
op1: vmask_t
op2: int16_t*
op3: const int32_t
op4: vint16m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int16_t*
op3: const int32_t
op4: vint16m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int16_t*
op3: const int32_t
op4: vint16m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int16_t*
op3: const int32_t
op4: vint16m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2, vm

◆ vsse_v_i32m1()

__rv32 void vsse_v_i32m1 ( int32_t *  base,
const int32_t  stride,
vint32m1_t  value 
)


Vector strided loads and stores

vsse_v_i32:

LMUL = 1
op1: int32_t*
op2: const int32_t
op3: vint32m1_t
返回值:void

LMUL = 2
op1: int32_t*
op2: const int32_t
op3: vint32m2_t
返回值:void

LMUL = 4
op1: int32_t*
op2: const int32_t
op3: vint32m4_t
返回值:void

LMUL = 8
op1: int32_t*
op2: const int32_t
op3: vint32m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2

◆ vsse_v_i32m1_m()

__rv32 void vsse_v_i32m1_m ( vmask_t  mask,
int32_t *  base,
const int32_t  stride,
vint32m1_t  value 
)


Vector strided loads and stores(带掩码)

vsse_v_i32:

LMUL = 1
op1: vmask_t
op2: int32_t*
op3: const int32_t
op4: vint32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int32_t*
op3: const int32_t
op4: vint32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int32_t*
op3: const int32_t
op4: vint32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int32_t*
op3: const int32_t
op4: vint32m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2, vm

◆ vsse_v_i8m1()

__rv32 void vsse_v_i8m1 ( int8_t *  base,
const int32_t  stride,
vint8m1_t  value 
)


Vector strided loads and stores

vsse_v_i8:

LMUL = 1
op1: int8_t*
op2: const int32_t
op3: vint8m1_t
返回值:void

LMUL = 2
op1: int8_t*
op2: const int32_t
op3: vint8m2_t
返回值:void

LMUL = 4
op1: int8_t*
op2: const int32_t
op3: vint8m4_t
返回值:void

LMUL = 8
op1: int8_t*
op2: const int32_t
op3: vint8m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2

◆ vsse_v_i8m1_m()

__rv32 void vsse_v_i8m1_m ( vmask_t  mask,
int8_t *  base,
const int32_t  stride,
vint8m1_t  value 
)


Vector strided loads and stores(带掩码)

vsse_v_i8:

LMUL = 1
op1: vmask_t
op2: int8_t*
op3: const int32_t
op4: vint8m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int8_t*
op3: const int32_t
op4: vint8m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int8_t*
op3: const int32_t
op4: vint8m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int8_t*
op3: const int32_t
op4: vint8m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2, vm

◆ vsse_v_u16m1()

__rv32 void vsse_v_u16m1 ( uint16_t *  base,
const int32_t  stride,
vuint16m1_t  value 
)


Vector strided loads and stores

vsse_v_u16:

LMUL = 1
op1: uint16_t*
op2: const int32_t
op3: vuint16m1_t
返回值:void

LMUL = 2
op1: uint16_t*
op2: const int32_t
op3: vuint16m2_t
返回值:void

LMUL = 4
op1: uint16_t*
op2: const int32_t
op3: vuint16m4_t
返回值:void

LMUL = 8
op1: uint16_t*
op2: const int32_t
op3: vuint16m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2

◆ vsse_v_u16m1_m()

__rv32 void vsse_v_u16m1_m ( vmask_t  mask,
uint16_t *  base,
const int32_t  stride,
vuint16m1_t  value 
)


Vector strided loads and stores(带掩码)

vsse_v_u16:

LMUL = 1
op1: vmask_t
op2: uint16_t*
op3: const int32_t
op4: vuint16m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint16_t*
op3: const int32_t
op4: vuint16m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint16_t*
op3: const int32_t
op4: vuint16m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint16_t*
op3: const int32_t
op4: vuint16m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2, vm

◆ vsse_v_u32m1()

__rv32 void vsse_v_u32m1 ( uint32_t *  base,
const int32_t  stride,
vuint32m1_t  value 
)


Vector strided loads and stores

vsse_v_u32:

LMUL = 1
op1: uint32_t*
op2: const int32_t
op3: vuint32m1_t
返回值:void

LMUL = 2
op1: uint32_t*
op2: const int32_t
op3: vuint32m2_t
返回值:void

LMUL = 4
op1: uint32_t*
op2: const int32_t
op3: vuint32m4_t
返回值:void

LMUL = 8
op1: uint32_t*
op2: const int32_t
op3: vuint32m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2

◆ vsse_v_u32m1_m()

__rv32 void vsse_v_u32m1_m ( vmask_t  mask,
uint32_t *  base,
const int32_t  stride,
vuint32m1_t  value 
)


Vector strided loads and stores(带掩码)

vsse_v_u32:

LMUL = 1
op1: vmask_t
op2: uint32_t*
op3: const int32_t
op4: vuint32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint32_t*
op3: const int32_t
op4: vuint32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint32_t*
op3: const int32_t
op4: vuint32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint32_t*
op3: const int32_t
op4: vuint32m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2, vm

◆ vsse_v_u8m1()

__rv32 void vsse_v_u8m1 ( uint8_t *  base,
const int32_t  stride,
vuint8m1_t  value 
)


Vector strided loads and stores

vsse_v_u8:

LMUL = 1
op1: uint8_t*
op2: const int32_t
op3: vuint8m1_t
返回值:void

LMUL = 2
op1: uint8_t*
op2: const int32_t
op3: vuint8m2_t
返回值:void

LMUL = 4
op1: uint8_t*
op2: const int32_t
op3: vuint8m4_t
返回值:void

LMUL = 8
op1: uint8_t*
op2: const int32_t
op3: vuint8m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2

◆ vsse_v_u8m1_m()

__rv32 void vsse_v_u8m1_m ( vmask_t  mask,
uint8_t *  base,
const int32_t  stride,
vuint8m1_t  value 
)


Vector strided loads and stores(带掩码)

vsse_v_u8:

LMUL = 1
op1: vmask_t
op2: uint8_t*
op3: const int32_t
op4: vuint8m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint8_t*
op3: const int32_t
op4: vuint8m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint8_t*
op3: const int32_t
op4: vuint8m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint8_t*
op3: const int32_t
op4: vuint8m8_t
返回值:void

汇编指令:
vsse.v vs3, (rs1), rs2, vm

◆ vssra_vv_i16m1()

__rv32 vint16m1_t vssra_vv_i16m1 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssra_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vssra.vv vd, vs2, vs1

◆ vssra_vv_i16m1_m()

__rv32 vint16m1_t vssra_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vuint16m8_t
返回值:vint16m8_t

汇编指令:
vssra.vv vd, vs2, vs1, vm

◆ vssra_vv_i32m1()

__rv32 vint32m1_t vssra_vv_i32m1 ( vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssra_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vssra.vv vd, vs2, vs1

◆ vssra_vv_i32m1_m()

__rv32 vint32m1_t vssra_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vuint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vuint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vuint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vuint32m8_t
返回值:vint32m8_t

汇编指令:
vssra.vv vd, vs2, vs1, vm

◆ vssra_vv_i8m1()

__rv32 vint8m1_t vssra_vv_i8m1 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssra_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vssra.vv vd, vs2, vs1

◆ vssra_vv_i8m1_m()

__rv32 vint8m1_t vssra_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vuint8m8_t
返回值:vint8m8_t

汇编指令:
vssra.vv vd, vs2, vs1, vm

◆ vssra_vx_i16m1()

__rv32 vint16m1_t vssra_vx_i16m1 ( vint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssra_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: uint16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: uint16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: uint16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: uint16_t
返回值:vint16m8_t

汇编指令:
vssra.vx vd, vs2, rs1

◆ vssra_vx_i16m1_m()

__rv32 vint16m1_t vssra_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: uint8_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: uint8_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: uint8_t
返回值:vint16m8_t

汇编指令:
vssra.vx vd, vs2, rs1, vm

◆ vssra_vx_i32m1()

__rv32 vint32m1_t vssra_vx_i32m1 ( vint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssra_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: uint32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: uint32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: uint32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: uint32_t
返回值:vint32m8_t

汇编指令:
vssra.vx vd, vs2, rs1

◆ vssra_vx_i32m1_m()

__rv32 vint32m1_t vssra_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: uint8_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: uint8_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: uint8_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: uint8_t
返回值:vint32m8_t

汇编指令:
vssra.vx vd, vs2, rs1, vm

◆ vssra_vx_i8m1()

__rv32 vint8m1_t vssra_vx_i8m1 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssra_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vssra.vx vd, vs2, rs1

◆ vssra_vx_i8m1_m()

__rv32 vint8m1_t vssra_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssra_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: uint8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: uint8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: uint8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: uint8_t
返回值:vint8m8_t

汇编指令:
vssra.vx vd, vs2, rs1, vm

◆ vssrl_vv_u16m1()

__rv32 vuint16m1_t vssrl_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssrl_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vssrl.vv vd, vs2, vs1

◆ vssrl_vv_u16m1_m()

__rv32 vuint16m1_t vssrl_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vssrl.vv vd, vs2, vs1, vm

◆ vssrl_vv_u32m1()

__rv32 vuint32m1_t vssrl_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssrl_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vssrl.vv vd, vs2, vs1

◆ vssrl_vv_u32m1_m()

__rv32 vuint32m1_t vssrl_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vssrl.vv vd, vs2, vs1, vm

◆ vssrl_vv_u8m1()

__rv32 vuint8m1_t vssrl_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssrl_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vssrl.vv vd, vs2, vs1

◆ vssrl_vv_u8m1_m()

__rv32 vuint8m1_t vssrl_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vssrl.vv vd, vs2, vs1, vm

◆ vssrl_vx_u16m1()

__rv32 vuint16m1_t vssrl_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssrl_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vssrl.vx vd, vs2, rs1

◆ vssrl_vx_u16m1_m()

__rv32 vuint16m1_t vssrl_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint8_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint8_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint8_t
返回值:vuint16m8_t

汇编指令:
vssrl.vx vd, vs2, rs1, vm

◆ vssrl_vx_u32m1()

__rv32 vuint32m1_t vssrl_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssrl_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vssrl.vx vd, vs2, rs1

◆ vssrl_vx_u32m1_m()

__rv32 vuint32m1_t vssrl_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint8_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint8_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint8_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint8_t
返回值:vuint32m8_t

汇编指令:
vssrl.vx vd, vs2, rs1, vm

◆ vssrl_vx_u8m1()

__rv32 vuint8m1_t vssrl_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions

vssrl_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vssrl.vx vd, vs2, rs1

◆ vssrl_vx_u8m1_m()

__rv32 vuint8m1_t vssrl_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Scaling Shift Instructions (带掩码)

vssrl_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vssrl.vx vd, vs2, rs1, vm

◆ vssub_vv_i16m1()

__rv32 vint16m1_t vssub_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssub_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vssub.vv vd, vs2, vs1

◆ vssub_vv_i16m1_m()

__rv32 vint16m1_t vssub_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssub_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vssub.vv vd, vs2, vs1, vm

◆ vssub_vv_i32m1()

__rv32 vint32m1_t vssub_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssub_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vssub.vv vd, vs2, vs1

◆ vssub_vv_i32m1_m()

__rv32 vint32m1_t vssub_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssub_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vssub.vv vd, vs2, vs1, vm

◆ vssub_vv_i8m1()

__rv32 vint8m1_t vssub_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssub_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vssub.vv vd, vs2, vs1

◆ vssub_vv_i8m1_m()

__rv32 vint8m1_t vssub_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssub_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vssub.vv vd, vs2, vs1, vm

◆ vssub_vx_i16m1()

__rv32 vint16m1_t vssub_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssub_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vssub.vx vd, vs2, rs1

◆ vssub_vx_i16m1_m()

__rv32 vint16m1_t vssub_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssub_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vssub.vx vd, vs2, rs1, vm

◆ vssub_vx_i32m1()

__rv32 vint32m1_t vssub_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssub_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vssub.vx vd, vs2, rs1

◆ vssub_vx_i32m1_m()

__rv32 vint32m1_t vssub_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssub_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vssub.vx vd, vs2, rs1, vm

◆ vssub_vx_i8m1()

__rv32 vint8m1_t vssub_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssub_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vssub.vx vd, vs2, rs1

◆ vssub_vx_i8m1_m()

__rv32 vint8m1_t vssub_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssub_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vssub.vx vd, vs2, rs1, vm

◆ vssubu_vv_u16m1()

__rv32 vuint16m1_t vssubu_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssubu_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vssubu.vv vd, vs2, vs1

◆ vssubu_vv_u16m1_m()

__rv32 vuint16m1_t vssubu_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssubu_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vssubu.vv vd, vs2, vs1, vm

◆ vssubu_vv_u32m1()

__rv32 vuint32m1_t vssubu_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssubu_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vssubu.vv vd, vs2, vs1

◆ vssubu_vv_u32m1_m()

__rv32 vuint32m1_t vssubu_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssubu_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vssubu.vv vd, vs2, vs1, vm

◆ vssubu_vv_u8m1()

__rv32 vuint8m1_t vssubu_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssubu_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vssubu.vv vd, vs2, vs1

◆ vssubu_vv_u8m1_m()

__rv32 vuint8m1_t vssubu_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssubu_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vssubu.vv vd, vs2, vs1, vm

◆ vssubu_vx_u16m1()

__rv32 vuint16m1_t vssubu_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssubu_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vssubu.vx vd, vs2, rs1

◆ vssubu_vx_u16m1_m()

__rv32 vuint16m1_t vssubu_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssubu_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vssubu.vx vd, vs2, rs1, vm

◆ vssubu_vx_u32m1()

__rv32 vuint32m1_t vssubu_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssubu_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vssubu.vx vd, vs2, rs1

◆ vssubu_vx_u32m1_m()

__rv32 vuint32m1_t vssubu_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssubu_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vssubu.vx vd, vs2, rs1, vm

◆ vssubu_vx_u8m1()

__rv32 vuint8m1_t vssubu_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions

vssubu_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vssubu.vx vd, vs2, rs1

◆ vssubu_vx_u8m1_m()

__rv32 vuint8m1_t vssubu_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Single-Width Saturating Add and Subtract Instructions (带掩码)

vssubu_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vssubu.vx vd, vs2, rs1, vm

◆ vsub_vv_i16m1()

__rv32 vint16m1_t vsub_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Integer subtract

vsub_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值: vint16m8_t

汇编指令:
vsub.vv vd, vs2, vs1

◆ vsub_vv_i16m1_m()

__rv32 vint16m1_t vsub_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Integer subtract(带掩码)

vsub_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值: vint16m8_t

汇编指令:
vsub.vv vd, vs2, vs1, vm

◆ vsub_vv_i32m1()

__rv32 vint32m1_t vsub_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Integer subtract

vsub_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值: vint32m8_t

汇编指令:
vsub.vv vd, vs2, vs1

◆ vsub_vv_i32m1_m()

__rv32 vint32m1_t vsub_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Integer subtract(带掩码)

vsub_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值: vint32m8_t

汇编指令:
vsub.vv vd, vs2, vs1, vm

◆ vsub_vv_i8m1()

__rv32 vint8m1_t vsub_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Integer subtract

vsub_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值: vint8m8_t

汇编指令:
vsub.vv vd, vs2, vs1

◆ vsub_vv_i8m1_m()

__rv32 vint8m1_t vsub_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Integer subtract(带掩码)

vsub_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值: vint8m8_t

汇编指令:
vsub.vv vd, vs2, vs1, vm

◆ vsub_vv_u16m1()

__rv32 vuint16m1_t vsub_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Integer subtract

vsub_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值: vuint16m8_t

汇编指令:
vsub.vv vd, vs2, vs1

◆ vsub_vv_u16m1_m()

__rv32 vuint16m1_t vsub_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Integer subtract(带掩码)

vsub_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值: vuint16m8_t

汇编指令:
vsub.vv vd, vs2, vs1, vm

◆ vsub_vv_u32m1()

__rv32 vuint32m1_t vsub_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Integer subtract

vsub_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值: vuint32m8_t

汇编指令:
vsub.vv vd, vs2, vs1

◆ vsub_vv_u32m1_m()

__rv32 vuint32m1_t vsub_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Integer subtract(带掩码)

vsub_vv_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值: vuint32m8_t

汇编指令:
vsub.vv vd, vs2, vs1, vm

◆ vsub_vv_u8m1()

__rv32 vuint8m1_t vsub_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Integer subtract

vsub_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值: vuint8m8_t

汇编指令:
vsub.vv vd, vs2, vs1

◆ vsub_vv_u8m1_m()

__rv32 vuint8m1_t vsub_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Integer subtract(带掩码)

vsub_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值: vuint8m8_t

汇编指令:
vsub.vv vd, vs2, vs1, vm

◆ vsub_vx_i16m1()

__rv32 vint16m1_t vsub_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Integer subtract

vsub_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值: vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值: vint16m8_t

汇编指令:
vsub.vx vd, vs2, rs1

◆ vsub_vx_i16m1_m()

__rv32 vint16m1_t vsub_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Integer subtract(带掩码)

vsub_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值: vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值: vint16m8_t

汇编指令:
vsub.vx vd, vs2, rs1, vm

◆ vsub_vx_i32m1()

__rv32 vint32m1_t vsub_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Integer subtract

vsub_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值: vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值: vint32m8_t

汇编指令:
vsub.vx vd, vs2, rs1

◆ vsub_vx_i32m1_m()

__rv32 vint32m1_t vsub_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Integer subtract(带掩码)

vsub_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值: vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值: vint32m8_t

汇编指令:
vsub.vx vd, vs2, rs1, vm

◆ vsub_vx_i8m1()

__rv32 vint8m1_t vsub_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Integer subtract

vsub_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值: vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值: vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值: vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值: vint8m8_t

汇编指令:
vsub.vx vd, vs2, rs1

◆ vsub_vx_i8m1_m()

__rv32 vint8m1_t vsub_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Integer subtract(带掩码)

vsub_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值: vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值: vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值: vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值: vint8m8_t

汇编指令:
vsub.vx vd, vs2, rs1, vm

◆ vsub_vx_u16m1()

__rv32 vuint16m1_t vsub_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Integer subtract

vsub_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值: vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint16_t
返回值: vuint16m8_t

汇编指令:
vsub.vx vd, vs2, rs1

◆ vsub_vx_u16m1_m()

__rv32 vuint16m1_t vsub_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Integer subtract(带掩码)

vsub_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值: vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值: vuint16m8_t

汇编指令:
vsub.vx vd, vs2, rs1, vm

◆ vsub_vx_u32m1()

__rv32 vuint32m1_t vsub_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Integer subtract

vsub_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值: vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint32_t
返回值: vuint32m8_t

汇编指令:
vsub.vx vd, vs2, rs1

◆ vsub_vx_u32m1_m()

__rv32 vuint32m1_t vsub_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Integer subtract(带掩码)

vsub_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值: vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值: vuint32m8_t

汇编指令:
vsub.vx vd, vs2, rs1, vm

◆ vsub_vx_u8m1()

__rv32 vuint8m1_t vsub_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Integer subtract

vsub_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值: vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值: vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值: vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值: vuint8m8_t

汇编指令:
vsub.vx vd, vs2, rs1

◆ vsub_vx_u8m1_m()

__rv32 vuint8m1_t vsub_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Integer subtract(带掩码)

vsub_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值: vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值: vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值: vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值: vuint8m8_t

汇编指令:
vsub.vx vd, vs2, rs1, vm

◆ vsuxe_v_f32m1()

__rv32 void vsuxe_v_f32m1 ( float32_t *  base,
vuint32m1_t  index,
vfloat32m1_t  value 
)


Vector unordered-indexed store instructions

vsuxe_v_f32:

LMUL = 1
op1: float32_t*
op2: vuint32m1_t
op3: vfloat32m1_t
返回值:void

LMUL = 2
op1: float32_t*
op2: vuint32m2_t
op3: vfloat32m2_t
返回值:void

LMUL = 4
op1: float32_t*
op2: vuint32m4_t
op3: vfloat32m4_t
返回值:void

LMUL = 8
op1: float32_t*
op2: vuint32m8_t
op3: vfloat32m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2

◆ vsuxe_v_f32m1_m()

__rv32 void vsuxe_v_f32m1_m ( vmask_t  mask,
float32_t *  base,
vuint32m1_t  index,
vfloat32m1_t  value 
)


Vector unordered-indexed store instructions(带掩码)

vsuxe_v_f32:

LMUL = 1
op1: vmask_t
op2: float32_t*
op3: vuint32m1_t
op4: vfloat32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: float32_t*
op3: vuint32m2_t
op4: vfloat32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: float32_t*
op3: vuint32m4_t
op4: vfloat32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: float32_t*
op3: vuint32m8_t
op4: vfloat32m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2, vm

◆ vsuxe_v_i16m1()

__rv32 void vsuxe_v_i16m1 ( int16_t *  base,
vuint16m1_t  index,
vint16m1_t  value 
)


Vector unordered-indexed store instructions

vsuxe_v_i16:

LMUL = 1
op1: int16_t*
op2: vuint16m1_t
op3: vint16m1_t
返回值:void

LMUL = 2
op1: int16_t*
op2: vuint16m2_t
op3: vint16m2_t
返回值:void

LMUL = 4
op1: int16_t*
op2: vuint16m4_t
op3: vint16m4_t
返回值:void

LMUL = 8
op1: int16_t*
op2: vuint16m8_t
op3: vint16m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2

◆ vsuxe_v_i16m1_m()

__rv32 void vsuxe_v_i16m1_m ( vmask_t  mask,
int16_t *  base,
vuint16m1_t  index,
vint16m1_t  value 
)


Vector unordered-indexed store instructions(带掩码)

vsuxe_v_i16:

LMUL = 1
op1: vmask_t
op2: int16_t*
op3: vuint16m1_t
op4: vint16m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int16_t*
op3: vuint16m2_t
op4: vint16m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int16_t*
op3: vuint16m4_t
op4: vint16m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int16_t*
op3: vuint16m8_t
op4: vint16m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2, vm

◆ vsuxe_v_i32m1()

__rv32 void vsuxe_v_i32m1 ( int32_t *  base,
vuint32m1_t  index,
vint32m1_t  value 
)


Vector unordered-indexed store instructions

vsuxe_v_i32:

LMUL = 1
op1: int32_t*
op2: vuint32m1_t
op3: vint32m1_t
返回值:void

LMUL = 2
op1: int32_t*
op2: vuint32m2_t
op3: vint32m2_t
返回值:void

LMUL = 4
op1: int32_t*
op2: vuint32m4_t
op3: vint32m4_t
返回值:void

LMUL = 8
op1: int32_t*
op2: vuint32m8_t
op3: vint32m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2

◆ vsuxe_v_i32m1_m()

__rv32 void vsuxe_v_i32m1_m ( vmask_t  mask,
int32_t *  base,
vuint32m1_t  index,
vint32m1_t  value 
)


Vector unordered-indexed store instructions(带掩码)

vsuxe_v_i32:

LMUL = 1
op1: vmask_t
op2: int32_t*
op3: vuint32m1_t
op4: vint32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int32_t*
op3: vuint32m2_t
op4: vint32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int32_t*
op3: vuint32m4_t
op4: vint32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int32_t*
op3: vuint32m8_t
op4: vint32m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2, vm

◆ vsuxe_v_i8m1()

__rv32 void vsuxe_v_i8m1 ( int8_t *  base,
vuint8m1_t  index,
vint8m1_t  value 
)


Vector unordered-indexed store instructions

vsuxe_v_i8:

LMUL = 1
op1: int8_t*
op2: vuint8m1_t
op3: vint8m1_t
返回值:void

LMUL = 2
op1: int8_t*
op2: vuint8m2_t
op3: vint8m2_t
返回值:void

LMUL = 4
op1: int8_t*
op2: vuint8m4_t
op3: vint8m4_t
返回值:void

LMUL = 8
op1: int8_t*
op2: vuint8m8_t
op3: vint8m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2

◆ vsuxe_v_i8m1_m()

__rv32 void vsuxe_v_i8m1_m ( vmask_t  mask,
int8_t *  base,
vuint8m1_t  index,
vint8m1_t  value 
)


Vector unordered-indexed store instructions(带掩码)

vsuxe_v_i8:

LMUL = 1
op1: vmask_t
op2: int8_t*
op3: vuint8m1_t
op4: vint8m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int8_t*
op3: vuint8m2_t
op4: vint8m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int8_t*
op3: vuint8m4_t
op4: vint8m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int8_t*
op3: vuint8m8_t
op4: vint8m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2, vm

◆ vsuxe_v_u16m1()

__rv32 void vsuxe_v_u16m1 ( uint16_t *  base,
vuint16m1_t  index,
vuint16m1_t  value 
)


Vector unordered-indexed store instructions

vsuxe_v_u16:

LMUL = 1
op1: uint16_t*
op2: vuint16m1_t
op3: vuint16m1_t
返回值:void

LMUL = 2
op1: uint16_t*
op2: vuint16m2_t
op3: vuint16m2_t
返回值:void

LMUL = 4
op1: uint16_t*
op2: vuint16m4_t
op3: vuint16m4_t
返回值:void

LMUL = 8
op1: uint16_t*
op2: vuint16m8_t
op3: vuint16m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2

◆ vsuxe_v_u16m1_m()

__rv32 void vsuxe_v_u16m1_m ( vmask_t  mask,
uint16_t *  base,
vuint16m1_t  index,
vuint16m1_t  value 
)


Vector unordered-indexed store instructions(带掩码)

vsuxe_v_u16:

LMUL = 1
op1: vmask_t
op2: uint16_t*
op3: vuint16m1_t
op4: vuint16m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint16_t*
op3: vuint16m2_t
op4: vuint16m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint16_t*
op3: vuint16m4_t
op4: vuint16m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint16_t*
op3: vuint16m8_t
op4: vuint16m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2, vm

◆ vsuxe_v_u32m1()

__rv32 void vsuxe_v_u32m1 ( uint32_t *  base,
vuint32m1_t  index,
vuint32m1_t  value 
)


Vector unordered-indexed store instructions

vsuxe_v_u32:

LMUL = 1
op1: uint32_t*
op2: vuint32m1_t
op3: vuint32m1_t
返回值:void

LMUL = 2
op1: uint32_t*
op2: vuint32m2_t
op3: vuint32m2_t
返回值:void

LMUL = 4
op1: uint32_t*
op2: vuint32m4_t
op3: vuint32m4_t
返回值:void

LMUL = 8
op1: uint32_t*
op2: vuint32m8_t
op3: vuint32m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2

◆ vsuxe_v_u32m1_m()

__rv32 void vsuxe_v_u32m1_m ( vmask_t  mask,
uint32_t *  base,
vuint32m1_t  index,
vuint32m1_t  value 
)


Vector unordered-indexed store instructions(带掩码)

vsuxe_v_u32:

LMUL = 1
op1: vmask_t
op2: uint32_t*
op3: vuint32m1_t
op4: vuint32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint32_t*
op3: vuint32m2_t
op4: vuint32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint32_t*
op3: vuint32m4_t
op4: vuint32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint32_t*
op3: vuint32m8_t
op4: vuint32m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2, vm

◆ vsuxe_v_u8m1()

__rv32 void vsuxe_v_u8m1 ( uint8_t *  base,
vuint8m1_t  index,
vuint8m1_t  value 
)


Vector unordered-indexed store instructions

vsuxe_v_u8:

LMUL = 1
op1: uint8_t*
op2: vuint8m1_t
op3: vuint8m1_t
返回值:void

LMUL = 2
op1: uint8_t*
op2: vuint8m1_t
op3: vuint8m1_t
返回值:void

LMUL = 4
op1: uint8_t*
op2: vuint8m1_t
op3: vuint8m1_t
返回值:void

LMUL = 8
op1: uint8_t*
op2: vuint8m1_t
op3: vuint8m1_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2

◆ vsuxe_v_u8m1_m()

__rv32 void vsuxe_v_u8m1_m ( vmask_t  mask,
uint8_t *  base,
vuint8m1_t  index,
vuint8m1_t  value 
)


Vector unordered-indexed store instructions(带掩码)

vsuxe_v_u8:

LMUL = 1
op1: vmask_t
op2: uint8_t*
op3: vuint8m1_t
op4: vuint8m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint8_t*
op3: vuint8m2_t
op4: vuint8m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint8_t*
op3: vuint8m4_t
op4: vuint8m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint8_t*
op3: vuint8m8_t
op4: vuint8m8_t
返回值:void

汇编指令:
vsuxe.v vs3, (rs1), vs2, vm

◆ vsxe_v_f32m1()

__rv32 void vsxe_v_f32m1 ( float32_t *  base,
vuint32m1_t  index,
vfloat32m1_t  value 
)


Vector ordered-indexed store instructions

vsxe_v_f32:

LMUL = 1
op1: float32_t*
op2: vuint32m1_t
op3: vfloat32m1_t
返回值:void

LMUL = 2
op1: float32_t*
op2: vuint32m2_t
op3: vfloat32m2_t
返回值:void

LMUL = 4
op1: float32_t*
op2: vuint32m4_t
op3: vfloat32m4_t
返回值:void

LMUL = 8
op1: float32_t*
op2: vuint32m8_t
op3: vfloat32m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2

◆ vsxe_v_f32m1_m()

__rv32 void vsxe_v_f32m1_m ( vmask_t  mask,
float32_t *  base,
vuint32m1_t  index,
vfloat32m1_t  value 
)


Vector ordered-indexed store instructions(带掩码)

vsxe_v_u32:

LMUL = 1
op1: vmask_t
op2: float32_t*
op3: vuint32m1_t
op4: vfloat32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: float32_t*
op3: vuint32m2_t
op4: vfloat32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: float32_t*
op3: vuint32m4_t
op4: vfloat32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: float32_t*
op3: vuint32m8_t
op4: vfloat32m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2, vm

◆ vsxe_v_i16m1()

__rv32 void vsxe_v_i16m1 ( int16_t *  base,
vuint16m1_t  index,
vint16m1_t  value 
)


Vector ordered-indexed store instructions

vsxe_v_i16:

LMUL = 1
op1: int16_t*
op2: vuint16m1_t
op3: vint16m1_t
返回值:void

LMUL = 2
op1: int16_t*
op2: vuint16m2_t
op3: vint16m2_t
返回值:void

LMUL = 4
op1: int16_t*
op2: vuint16m4_t
op3: vint16m4_t
返回值:void

LMUL = 8
op1: int16_t*
op2: vuint16m8_t
op3: vint16m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2

◆ vsxe_v_i16m1_m()

__rv32 void vsxe_v_i16m1_m ( vmask_t  mask,
int16_t *  base,
vuint16m1_t  index,
vint16m1_t  value 
)


Vector ordered-indexed store instructions(带掩码)

vsxe_v_i16:

LMUL = 1
op1: vmask_t
op2: int16_t*
op3: vuint16m1_t
op4: vint16m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int16_t*
op3: vuint16m2_t
op4: vint16m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int16_t*
op3: vuint16m4_t
op4: vint16m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int16_t*
op3: vuint16m8_t
op4: vint16m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2, vm

◆ vsxe_v_i32m1()

__rv32 void vsxe_v_i32m1 ( int32_t *  base,
vuint32m1_t  index,
vint32m1_t  value 
)


Vector ordered-indexed store instructions

vsxe_v_i32:

LMUL = 1
op1: int32_t*
op2: vuint32m1_t
op3: vint32m1_t
返回值:void

LMUL = 2
op1: int32_t*
op2: vuint32m2_t
op3: vint32m2_t
返回值:void

LMUL = 4
op1: int32_t*
op2: vuint32m4_t
op3: vint32m4_t
返回值:void

LMUL = 8
op1: int32_t*
op2: vuint32m8_t
op3: vint32m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2

◆ vsxe_v_i32m1_m()

__rv32 void vsxe_v_i32m1_m ( vmask_t  mask,
int32_t *  base,
vuint32m1_t  index,
vint32m1_t  value 
)


Vector ordered-indexed store instructions(带掩码)

vsxe_v_i32:

LMUL = 1
op1: vmask_t
op2: int32_t*
op3: vuint32m1_t
op4: vint32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int32_t*
op3: vuint32m2_t
op4: vint32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int32_t*
op3: vuint32m4_t
op4: vint32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int32_t*
op3: vuint32m8_t
op4: vint32m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2, vm

◆ vsxe_v_i8m1()

__rv32 void vsxe_v_i8m1 ( int8_t *  base,
vuint8m1_t  index,
vint8m1_t  value 
)


Vector ordered-indexed store instructions

vsxe_v_i8:

LMUL = 1
op1: int8_t*
op2: vuint8m1_t
op3: vint8m1_t
返回值:void

LMUL = 2
op1: int8_t*
op2: vuint8m2_t
op3: vint8m2_t
返回值:void

LMUL = 4
op1: int8_t*
op2: vuint8m4_t
op3: vint8m4_t
返回值:void

LMUL = 8
op1: int8_t*
op2: vuint8m8_t
op3: vint8m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2

◆ vsxe_v_i8m1_m()

__rv32 void vsxe_v_i8m1_m ( vmask_t  mask,
int8_t *  base,
vuint8m1_t  index,
vint8m1_t  value 
)


Vector ordered-indexed store instructions(带掩码)

vsxe_v_i8:

LMUL = 1
op1: vmask_t
op2: int8_t*
op3: vuint8m1_t
op4: vint8m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: int8_t*
op3: vuint8m2_t
op4: vint8m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: int8_t*
op3: vuint8m4_t
op4: vint8m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: int8_t*
op3: vuint8m8_t
op4: vint8m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2, vm

◆ vsxe_v_u16m1()

__rv32 void vsxe_v_u16m1 ( uint16_t *  base,
vuint16m1_t  index,
vuint16m1_t  value 
)


Vector ordered-indexed store instructions

vsxe_v_u16:

LMUL = 1
op1: uint16_t*
op2: vuint16m1_t
op3: vuint16m1_t
返回值:void

LMUL = 2
op1: uint16_t*
op2: vuint16m2_t
op3: vuint16m2_t
返回值:void

LMUL = 4
op1: uint16_t*
op2: vuint16m4_t
op3: vuint16m4_t
返回值:void

LMUL = 8
op1: uint16_t*
op2: vuint16m8_t
op3: vuint16m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2

◆ vsxe_v_u16m1_m()

__rv32 void vsxe_v_u16m1_m ( vmask_t  mask,
uint16_t *  base,
vuint16m1_t  index,
vuint16m1_t  value 
)


Vector ordered-indexed store instructions(带掩码)

vsxe_v_u16:

LMUL = 1
op1: vmask_t
op2: uint16_t*
op3: vuint16m1_t
op4: vuint16m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint16_t*
op3: vuint16m2_t
op4: vuint16m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint16_t*
op3: vuint16m4_t
op4: vuint16m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint16_t*
op3: vuint16m8_t
op4: vuint16m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2, vm

◆ vsxe_v_u32m1()

__rv32 void vsxe_v_u32m1 ( uint32_t *  base,
vuint32m1_t  index,
vuint32m1_t  value 
)


Vector ordered-indexed store instructions

vsxe_v_u32:

LMUL = 1
op1: uint32_t*
op2: vuint32m1_t
op3: vuint32m1_t
返回值:void

LMUL = 2
op1: uint32_t*
op2: vuint32m2_t
op3: vuint32m2_t
返回值:void

LMUL = 4
op1: uint32_t*
op2: vuint32m4_t
op3: vuint32m4_t
返回值:void

LMUL = 8
op1: uint32_t*
op2: vuint32m8_t
op3: vuint32m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2

◆ vsxe_v_u32m1_m()

__rv32 void vsxe_v_u32m1_m ( vmask_t  mask,
uint32_t *  base,
vuint32m1_t  index,
vuint32m1_t  value 
)


Vector ordered-indexed store instructions(带掩码)

vsxe_v_u32:

LMUL = 1
op1: vmask_t
op2: uint32_t*
op3: vuint32m1_t
op4: vuint32m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint32_t*
op3: vuint32m2_t
op4: vuint32m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint32_t*
op3: vuint32m4_t
op4: vuint32m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint32_t*
op3: vuint32m8_t
op4: vuint32m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2, vm

◆ vsxe_v_u8m1()

__rv32 void vsxe_v_u8m1 ( uint8_t *  base,
vuint8m1_t  index,
vuint8m1_t  value 
)


Vector ordered-indexed store instructions

vsxe_v_u8:

LMUL = 1
op1: uint8_t*
op2: vuint8m1_t
op3: vuint8m1_t
返回值:void

LMUL = 2
op1: uint8_t*
op2: vuint8m2_t
op3: vuint8m2_t
返回值:void

LMUL = 4
op1: uint8_t*
op2: vuint8m4_t
op3: vuint8m4_t
返回值:void

LMUL = 8
op1: uint8_t*
op2: vuint8m8_t
op3: vuint8m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2

◆ vsxe_v_u8m1_m()

__rv32 void vsxe_v_u8m1_m ( vmask_t  mask,
uint8_t *  base,
vuint8m1_t  index,
vuint8m1_t  value 
)


Vector ordered-indexed store instructions(带掩码)

vsxe_v_u8:

LMUL = 1
op1: vmask_t
op2: uint8_t*
op3: vuint8m1_t
op4: vuint8m1_t
返回值:void

LMUL = 2
op1: vmask_t
op2: uint8_t*
op3: vuint8m2_t
op4: vuint8m2_t
返回值:void

LMUL = 4
op1: vmask_t
op2: uint8_t*
op3: vuint8m4_t
op4: vuint8m4_t
返回值:void

LMUL = 8
op1: vmask_t
op2: uint8_t*
op3: vuint8m8_t
op4: vuint8m8_t
返回值:void

汇编指令:
vsxe.v vs3, (rs1), vs2, vm

◆ vwadd_vv_i16m2()

__rv32 vint16m2_t vwadd_vv_i16m2 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract

vwadd_vv_i16:

LMUL = 2
op1: vint8m1_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
op1: vint8m4_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwadd.vv vd, vs2, vs1

◆ vwadd_vv_i16m2_m()

__rv32 vint16m2_t vwadd_vv_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwadd_vv_i16:

LMUL = 2
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwadd.vv vd, vs2, vs1, vm

◆ vwadd_vv_i32m2()

__rv32 vint32m2_t vwadd_vv_i32m2 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract

vwadd_vv_i32:

LMUL = 2
op1: vint16m1_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
op1: vint16m4_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwadd.vv vd, vs2, vs1

◆ vwadd_vv_i32m2_m()

__rv32 vint32m2_t vwadd_vv_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwadd_vv_i32:

LMUL = 2
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwadd.vv vd, vs2, vs1, vm

◆ vwadd_vx_i16m2()

__rv32 vint16m2_t vwadd_vx_i16m2 ( vint8m1_t  op1,
int8_t  op2 
)


Widening signed integer add/subtract

vwadd_vx_i16:

LMUL = 2
op1: vint8m1_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
op1: vint8m4_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwadd.vx vd, vs2, rs1

◆ vwadd_vx_i16m2_m()

__rv32 vint16m2_t vwadd_vx_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwadd_vx_i16:

LMUL = 2
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwadd.vx vd, vs2, rs1, vm

◆ vwadd_vx_i32m2()

__rv32 vint32m2_t vwadd_vx_i32m2 ( vint16m1_t  op1,
int16_t  op2 
)


Widening signed integer add/subtract

vwadd_vx_i32:

LMUL = 2
op1: vint16m1_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
op1: vint16m4_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwadd.vx vd, vs2, rs1

◆ vwadd_vx_i32m2_m()

__rv32 vint32m2_t vwadd_vx_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwadd_vx_i32:

LMUL = 2
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwadd.vx vd, vs2, rs1, vm

◆ vwadd_wv_i16m2()

__rv32 vint16m2_t vwadd_wv_i16m2 ( vint16m2_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract

vwadd_wv_i16:

LMUL = 2
op1: vint16m2_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwadd.wv vd, vs2, vs1

◆ vwadd_wv_i16m2_m()

__rv32 vint16m2_t vwadd_wv_i16m2_m ( vmask_t  mask,
vint16m2_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwadd_wv_i16:

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwadd.wv vd, vs2, vs1, vm

◆ vwadd_wv_i32m2()

__rv32 vint32m2_t vwadd_wv_i32m2 ( vint32m2_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract

vwadd_wv_i32:

LMUL = 2
op1: vint32m2_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwadd.wv vd, vs2, vs1

◆ vwadd_wv_i32m2_m()

__rv32 vint32m2_t vwadd_wv_i32m2_m ( vmask_t  mask,
vint32m2_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwadd_wv_i32:

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwadd.wv vd, vs2, vs1, vm

◆ vwadd_wx_i16m2()

__rv32 vint16m2_t vwadd_wx_i16m2 ( vint16m2_t  op1,
int8_t  op2 
)


Widening signed integer add/subtract

vwadd_wx_i16:

LMUL = 2
op1: vint16m2_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwadd.wx vd, vs2, rs1

◆ vwadd_wx_i16m2_m()

__rv32 vint16m2_t vwadd_wx_i16m2_m ( vmask_t  mask,
vint16m2_t  op1,
int8_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwadd_wx_i16:

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwadd.wx vd, vs2, rs1, vm

◆ vwadd_wx_i32m2()

__rv32 vint32m2_t vwadd_wx_i32m2 ( vint32m2_t  op1,
int16_t  op2 
)


Widening signed integer add/subtract

vwadd_wx_i32:

LMUL = 2
op1: vint32m2_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwadd.wx vd, vs2, rs1

◆ vwadd_wx_i32m2_m()

__rv32 vint32m2_t vwadd_wx_i32m2_m ( vmask_t  mask,
vint32m2_t  op1,
int16_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwadd_wx_i32:

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwadd.wx vd, vs2, rs1, vm

◆ vwaddu_vv_u16m2()

__rv32 vuint16m2_t vwaddu_vv_u16m2 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Widening unsigned integer add/subtract

vwaddu_vv_u16:

LMUL = 2
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwaddu.vv vd, vs2, vs1

◆ vwaddu_vv_u16m2_m()

__rv32 vuint16m2_t vwaddu_vv_u16m2_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_vv_u16:

LMUL = 2
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwaddu.vv vd, vs2, vs1, vm

◆ vwaddu_vv_u32m2()

__rv32 vuint32m2_t vwaddu_vv_u32m2 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Widening unsigned integer add/subtract

vwaddu_vv_u32:

LMUL = 2
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwaddu.vv vd, vs2, vs1

◆ vwaddu_vv_u32m2_m()

__rv32 vuint32m2_t vwaddu_vv_u32m2_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_vv_u32:

LMUL = 2
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwaddu.vv vd, vs2, vs1, vm

◆ vwaddu_vx_u16m2()

__rv32 vuint16m2_t vwaddu_vx_u16m2 ( vuint8m1_t  op1,
uint8_t  op2 
)


Widening unsigned integer add/subtract

vwaddu_vv_u16:

LMUL = 2
op1: vuint8m1_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint8m2_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint8m4_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwaddu.vx vd, vs2, rs1

◆ vwaddu_vx_u16m2_m()

__rv32 vuint16m2_t vwaddu_vx_u16m2_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_vx_u16:

LMUL = 2
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwaddu.vx vd, vs2, rs1, vm

◆ vwaddu_vx_u32m2()

__rv32 vuint32m2_t vwaddu_vx_u32m2 ( vuint16m1_t  op1,
uint16_t  op2 
)


Widening unsigned integer add/subtract

vwaddu_vv_u32:

LMUL = 2
op1: vuint16m1_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint16m2_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint16m4_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwaddu.vx vd, vs2, rs1

◆ vwaddu_vx_u32m2_m()

__rv32 vuint32m2_t vwaddu_vx_u32m2_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_vx_u32:

LMUL = 2
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwaddu.vx vd, vs2, rs1, vm

◆ vwaddu_wv_u16m2()

__rv32 vuint16m2_t vwaddu_wv_u16m2 ( vuint16m2_t  op1,
vuint8m1_t  op2 
)


Widening signed uinteger add/subtract

vwaddu_wv_u16:

LMUL = 2
op1: vuint16m2_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwaddu.wv vd, vs2, vs1

◆ vwaddu_wv_u16m2_m()

__rv32 vuint16m2_t vwaddu_wv_u16m2_m ( vmask_t  mask,
vuint16m2_t  op1,
vint8m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_wv_u16:

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vint8m1_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vint8m2_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vint8m4_t
返回值: vuint16m8_t

汇编指令:
vwaddu.wv vd, vs2, vs1, vm

◆ vwaddu_wv_u32m2()

__rv32 vuint32m2_t vwaddu_wv_u32m2 ( vuint32m2_t  op1,
vuint16m1_t  op2 
)


Widening signed uinteger add/subtract

vwaddu_wv_u32:

LMUL = 2
op1: vuint32m2_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwaddu.wv vd, vs2, vs1

◆ vwaddu_wv_u32m2_m()

__rv32 vuint32m2_t vwaddu_wv_u32m2_m ( vmask_t  mask,
vuint32m2_t  op1,
vint16m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_wv_u32:

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vint16m1_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vint16m2_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vint16m4_t
返回值: vuint32m8_t

汇编指令:
vwaddu.wv vd, vs2, vs1, vm

◆ vwaddu_wx_u16m2()

__rv32 vuint16m2_t vwaddu_wx_u16m2 ( vuint16m2_t  op1,
uint8_t  op2 
)


Widening signed uinteger add/subtract

vwaddu_wv_u16:

LMUL = 2
op1: vuint16m2_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwaddu.wv vd, vs2, vs1

◆ vwaddu_wx_u16m2_m()

__rv32 vuint16m2_t vwaddu_wx_u16m2_m ( vmask_t  mask,
vuint16m2_t  op1,
uint8_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_wx_u16:

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwaddu.wx vd, vs2, vs1, vm

◆ vwaddu_wx_u32m2()

__rv32 vuint32m2_t vwaddu_wx_u32m2 ( vuint32m2_t  op1,
uint16_t  op2 
)


Widening signed uinteger add/subtract

vwaddu_wv_u32:

LMUL = 2
op1: vuint32m2_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwaddu.wv vd, vs2, vs1

◆ vwaddu_wx_u32m2_m()

__rv32 vuint32m2_t vwaddu_wx_u32m2_m ( vmask_t  mask,
vuint32m2_t  op1,
uint16_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwaddu_wx_u32:

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwaddu.wx vd, vs2, rs1, vm

◆ vwmacc_vv_i16m2()

__rv32 vuint16m2_t vwmacc_vv_i16m2 ( vint16m2_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vv_i16:

LMUL = 1
acc: vint16m2_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vuint16m2_t

LMUL = 2
acc: vint16m4_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vuint16m4_t

LMUL = 4
acc: vint16m8_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmacc.vv vd, vs1, vs2

◆ vwmacc_vv_i16m2_m()

__rv32 vint16m2_t vwmacc_vv_i16m2_m ( vmask_t  mask,
vint16m2_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vv_i16:

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwmacc.vv vd, vs1, vs2, vm

◆ vwmacc_vv_i32m2()

__rv32 vuint32m2_t vwmacc_vv_i32m2 ( vint32m2_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vv_i32:

LMUL = 1
acc: vint32m2_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vuint32m2_t

LMUL = 2
acc: vint32m4_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vuint32m4_t

LMUL = 4
acc: vint32m8_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmacc.vv vd, vs1, vs2

◆ vwmacc_vv_i32m2_m()

__rv32 vint32m2_t vwmacc_vv_i32m2_m ( vmask_t  mask,
vint32m2_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vv_i32:

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwmacc.vv vd, vs1, vs2, vm

◆ vwmacc_vx_i16m2()

__rv32 vuint16m2_t vwmacc_vx_i16m2 ( vint16m2_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vx_i16:

LMUL = 1
acc: vint16m2_t
op1: int8_t
op2: vint8m1_t
返回值: vuint16m2_t

LMUL = 2
acc: vint16m4_t
op1: int8_t
op2: vint8m2_t
返回值: vuint16m4_t

LMUL = 4
acc: vint16m8_t
op1: int8_t
op2: vint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmacc.vx vd, rs1, vs2

◆ vwmacc_vx_i16m2_m()

__rv32 vint16m2_t vwmacc_vx_i16m2_m ( vmask_t  mask,
vint16m2_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vx_i16:

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: int8_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: int8_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: int8_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwmacc.vx vd, rs1, vs2, vm

◆ vwmacc_vx_i32m2()

__rv32 vuint32m2_t vwmacc_vx_i32m2 ( vint32m2_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vx_i32:

LMUL = 1
acc: vint32m2_t
op1: int16_t
op2: vint16m1_t
返回值: vuint32m2_t

LMUL = 2
acc: vint32m4_t
op1: int16_t
op2: vint16m2_t
返回值: vuint32m4_t

LMUL = 4
acc: vint32m8_t
op1: int16_t
op2: vint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmacc.vx vd, rs1, vs2

◆ vwmacc_vx_i32m2_m()

__rv32 vint32m2_t vwmacc_vx_i32m2_m ( vmask_t  mask,
vint32m2_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Widening signed-integer multiply-add, overwrite addend

vwmacc_vx_i32:

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: int16_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: int16_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: int16_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwmacc.vx vd, rs1, vs2, vm

◆ vwmaccsu_vv_i16m2()

__rv32 vint16m2_t vwmaccsu_vv_i16m2 ( vint16m2_t  acc,
vint8m1_t  op1,
vint8m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vv_i16:

LMUL = 1
acc: vint16m2_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 2
acc: vint16m4_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 4
acc: vint16m8_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwmaccsu.vv vd, vs1, vs2

◆ vwmaccsu_vv_i16m2_m()

__rv32 vint16m2_t vwmaccsu_vv_i16m2_m ( vmask_t  mask,
vint16m2_t  acc,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vv_i16:

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: vint8m1_t
op2: vuint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: vint8m2_t
op2: vuint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: vint8m4_t
op2: vuint8m4_t
返回值: vint16m8_t

汇编指令:
vwmaccsu.vv vd, vs1, vs2, vm

◆ vwmaccsu_vv_i32m2()

__rv32 vint32m2_t vwmaccsu_vv_i32m2 ( vint32m2_t  acc,
vint16m1_t  op1,
vint16m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vv_i32:

LMUL = 1
acc: vint32m2_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 2
acc: vint32m4_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 4
acc: vint32m8_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwmaccsu.vv vd, vs1, vs2

◆ vwmaccsu_vv_i32m2_m()

__rv32 vint32m2_t vwmaccsu_vv_i32m2_m ( vmask_t  mask,
vint32m2_t  acc,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vv_i32:

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: vint16m1_t
op2: vuint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: vint16m2_t
op2: vuint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: vint16m4_t
op2: vuint16m4_t
返回值: vint32m8_t

汇编指令:
vwmaccsu.vv vd, vs1, vs2, vm

◆ vwmaccsu_vx_i16m2()

__rv32 vuint16m2_t vwmaccsu_vx_i16m2 ( vint16m2_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vx_i16:

LMUL = 1
acc: vint16m2_t
op1: int8_t
op2: vint8m1_t
返回值: vuint16m2_t

LMUL = 2
acc: vint16m4_t
op1: int8_t
op2: vint8m2_t
返回值: vuint16m4_t

LMUL = 4
acc: vint16m8_t
op1: int8_t
op2: vint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmaccsu.vx vd, rs1, vs2

◆ vwmaccsu_vx_i16m2_m()

__rv32 vint16m2_t vwmaccsu_vx_i16m2_m ( vmask_t  mask,
vint16m2_t  acc,
int8_t  op1,
vuint8m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vx_i16:

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: int8_t
op2: vuint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: int8_t
op2: vuint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: int8_t
op2: vuint8m4_t
返回值: vint16m8_t

汇编指令:
vwmaccsu.vx vd, rs1, vs2, vm

◆ vwmaccsu_vx_i32m2()

__rv32 vuint32m2_t vwmaccsu_vx_i32m2 ( vint32m2_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vx_i32:

LMUL = 1
acc: vint32m2_t
op1: int16_t
op2: vint16m1_t
返回值: vuint32m2_t

LMUL = 2
acc: vint32m4_t
op1: int16_t
op2: vint16m2_t
返回值: vuint32m4_t

LMUL = 4
acc: vint32m8_t
op1: int16_t
op2: vint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmaccsu.vx vd, rs1, vs2

◆ vwmaccsu_vx_i32m2_m()

__rv32 vint32m2_t vwmaccsu_vx_i32m2_m ( vmask_t  mask,
vint32m2_t  acc,
int16_t  op1,
vuint16m1_t  op2 
)


Widening signed-unsigned-integer multiply-add, overwrite addend

vwmaccsu_vx_i32:

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: int16_t
op2: vuint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: int16_t
op2: vuint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: int16_t
op2: vuint16m4_t
返回值: vint32m8_t

汇编指令:
vwmaccsu.vx vd, rs1, vs2, vm

◆ vwmaccu_vv_u16m2()

__rv32 vuint16m2_t vwmaccu_vv_u16m2 ( vuint16m2_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vv_u16:

LMUL = 1
acc: vuint16m2_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 2
acc: vuint16m4_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 4
acc: vuint16m8_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmaccu.vv vd, vs1, vs2

◆ vwmaccu_vv_u16m2_m()

__rv32 vuint16m2_t vwmaccu_vv_u16m2_m ( vmask_t  mask,
vuint16m2_t  acc,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vv_u16:

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmaccu.vv vd, vs1, vs2, vm

◆ vwmaccu_vv_u32m2()

__rv32 vuint32m2_t vwmaccu_vv_u32m2 ( vuint32m2_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vv_u32:

LMUL = 1
acc: vuint32m2_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 2
acc: vuint32m4_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 4
acc: vuint32m8_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmaccu.vv vd, vs1, vs2

◆ vwmaccu_vv_u32m2_m()

__rv32 vuint32m2_t vwmaccu_vv_u32m2_m ( vmask_t  mask,
vuint32m2_t  acc,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vv_u32:

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmaccu.vv vd, vs1, vs2, vm

◆ vwmaccu_vx_u16m2()

__rv32 vuint16m2_t vwmaccu_vx_u16m2 ( vuint16m2_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vx_u16:

LMUL = 1
acc: vuint16m2_t
op1: uint8_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 2
acc: vuint16m4_t
op1: uint8_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 4
acc: vuint16m8_t
op1: uint8_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmaccu.vx vd, rs1, vs2

◆ vwmaccu_vx_u16m2_m()

__rv32 vuint16m2_t vwmaccu_vx_u16m2_m ( vmask_t  mask,
vuint16m2_t  acc,
uint8_t  op1,
vuint8m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vx_u16:

LMUL = 2
mask: vmask_t
acc: vuint16m2_t
op1: uint8_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
acc: vuint16m4_t
op1: uint8_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
acc: vuint16m8_t
op1: uint8_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmaccu.vx vd, rs1, vs2, vm

◆ vwmaccu_vx_u32m2()

__rv32 vuint32m2_t vwmaccu_vx_u32m2 ( vuint32m2_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vx_u32:

LMUL = 1
acc: vuint32m2_t
op1: uint16_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 2
acc: vuint32m4_t
op1: uint16_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 4
acc: vuint32m8_t
op1: uint16_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmaccu.vx vd, rs1, vs2

◆ vwmaccu_vx_u32m2_m()

__rv32 vuint32m2_t vwmaccu_vx_u32m2_m ( vmask_t  mask,
vuint32m2_t  acc,
uint16_t  op1,
vuint16m1_t  op2 
)


Widening unsigned-integer multiply-add, overwrite addend

vwmaccu_vx_u32:

LMUL = 2
mask: vmask_t
acc: vuint32m2_t
op1: uint16_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
acc: vuint32m4_t
op1: uint16_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
acc: vuint32m8_t
op1: uint16_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmaccu.vx vd, rs1, vs2, vm

◆ vwmaccus_vx_i16m2()

__rv32 vuint16m2_t vwmaccus_vx_i16m2 ( vint16m2_t  acc,
int8_t  op1,
vint8m1_t  op2 
)


Widening unsigned-signed-integer multiply-add, overwrite addend

vwmaccus_vx_i16:

LMUL = 1
acc: vint16m2_t
op1: int8_t
op2: vint8m1_t
返回值: vuint16m2_t

LMUL = 2
acc: vint16m4_t
op1: int8_t
op2: vint8m2_t
返回值: vuint16m4_t

LMUL = 4
acc: vint16m8_t
op1: int8_t
op2: vint8m4_t
返回值: vuint16m8_t

汇编指令:
vwmaccus.vx vd, rs1, vs2

◆ vwmaccus_vx_i16m2_m()

__rv32 vint16m2_t vwmaccus_vx_i16m2_m ( vmask_t  mask,
vint16m2_t  acc,
uint8_t  op1,
vint8m1_t  op2 
)


Widening unsigned-signed-integer multiply-add, overwrite addend

vwmaccus_vx_i16:

LMUL = 2
mask: vmask_t
acc: vint16m2_t
op1: uint8_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
acc: vint16m4_t
op1: uint8_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
acc: vint16m8_t
op1: uint8_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwmaccus.vx vd, rs1, vs2, vm

◆ vwmaccus_vx_i32m2()

__rv32 vuint32m2_t vwmaccus_vx_i32m2 ( vint32m2_t  acc,
int16_t  op1,
vint16m1_t  op2 
)


Widening unsigned-signed-integer multiply-add, overwrite addend

vwmaccus_vx_i16:

LMUL = 1
acc: vint32m2_t
op1: int16_t
op2: vint16m1_t
返回值: vuint32m2_t

LMUL = 2
acc: vint32m4_t
op1: int16_t
op2: vint16m2_t
返回值: vuint32m4_t

LMUL = 4
acc: vint32m8_t
op1: int16_t
op2: vint16m4_t
返回值: vuint32m8_t

汇编指令:
vwmaccus.vx vd, rs1, vs2

◆ vwmaccus_vx_i32m2_m()

__rv32 vint32m2_t vwmaccus_vx_i32m2_m ( vmask_t  mask,
vint32m2_t  acc,
uint16_t  op1,
vint16m1_t  op2 
)


Widening unsigned-signed-integer multiply-add, overwrite addend

vwmaccus_vx_i32:

LMUL = 2
mask: vmask_t
acc: vint32m2_t
op1: uint16_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
acc: vint32m4_t
op1: uint16_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
acc: vint32m8_t
op1: uint16_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwmaccus.vx vd, rs1, vs2, vm

◆ vwmul_vv_i16m2()

__rv32 vint16m2_t vwmul_vv_i16m2 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmul_vv_i16:

LMUL = 2
op1: vint8m1_t
op2: vint8m1_t
返回值:vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: vint8m2_t
返回值:vint16m4_t

LMUL =8
op1: vint8m4_t
op2: vint8m4_t
返回值:vint16m8_t

汇编指令:
vwmul.vv vd, vs2, vs1

◆ vwmul_vv_i16m2_m()

__rv32 vint16m2_t vwmul_vv_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmul_vv_i16:

LMUL = 2
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vint16m4_t

LMUL =8
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vint16m8_t

汇编指令:
vwmul.vv vd, vs2, vs1, vm

◆ vwmul_vv_i32m2()

__rv32 vint32m2_t vwmul_vv_i32m2 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmul_vv_i32:

LMUL = 2
op1: vint16m1_t
op2: vint16m1_t
返回值:vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: vint16m2_t
返回值:vint32m4_t

LMUL =8
op1: vint16m4_t
op2: vint16m4_t
返回值:vint32m8_t

汇编指令:
vwmul.vv vd, vs2, vs1

◆ vwmul_vv_i32m2_m()

__rv32 vint32m2_t vwmul_vv_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmul_vv_i32:

LMUL = 2
op1: vmask_t
op2: vint8m1_t
op3: vint8m1_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint8m2_t
op3: vint8m2_t
返回值:vint16m4_t

LMUL =8
op1: vmask_t
op2: vint8m4_t
op3: vint8m4_t
返回值:vint16m8_t

汇编指令:
vwmul.vv vd, vs2, vs1, vm

◆ vwmul_vx_i16m2()

__rv32 vint16m2_t vwmul_vx_i16m2 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmul_vx_i16:

LMUL = 2
op1: vint8m1_t
op2: int8_t
返回值:vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: int8_t
返回值:vint16m4_t

LMUL =8
op1: vint8m4_t
op2: int8_t
返回值:vint16m8_t

汇编指令:
vwmul.vx vd, vs2, rs1

◆ vwmul_vx_i16m2_m()

__rv32 vint16m2_t vwmul_vx_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmul_vx_i16:

LMUL = 2
op1: vmask_t
op2: vint8m1_t
op3: int8_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint8m2_t
op3: int8_t
返回值:vint16m4_t

LMUL =8
op1: vmask_t
op2: vint8m4_t
op3: int8_t
返回值:vint16m8_t

汇编指令:
vwmul.vx vd, vs2, rs1, vm

◆ vwmul_vx_i32m2()

__rv32 vint32m2_t vwmul_vx_i32m2 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmul_vx_i32:

LMUL = 2
op1: vint16m1_t
op2: int16_t
返回值:vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: int16_t
返回值:vint32m4_t

LMUL =8
op1: vint16m4_t
op2: int16_t
返回值:vint32m8_t

汇编指令:
vwmul.vx vd, vs2, rs1

◆ vwmul_vx_i32m2_m()

__rv32 vint32m2_t vwmul_vx_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmul_vx_i32:

LMUL = 2
op1: vmask_t
op2: vint16m1_t
op3: int16_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: vint16m2_t
op3: int16_t
返回值:vint32m4_t

LMUL =8
op1: vmask_t
op2: vint16m4_t
op3: int16_t
返回值:vint32m8_t

汇编指令:
vwmul.vx vd, vs2, rs1, vm

◆ vwmulsu_vv_i16m2()

__rv32 vint16m2_t vwmulsu_vv_i16m2 ( vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulsu_vv_i16:

LMUL = 2
op1: vint8m1_t
op2: vuint8m1_t
返回值:vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: vuint8m2_t
返回值:vint16m4_t

LMUL =8
op1: vint8m4_t
op2: vuint8m4_t
返回值:vint16m8_t

汇编指令:
vwmulsu.vv vd, vs2, vs1

◆ vwmulsu_vv_i16m2_m()

__rv32 vint16m2_t vwmulsu_vv_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulsu_vv_i16:

LMUL = 2
op1: vmask_t
op2: vint8m1_t
op3: vuint8m1_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint8m2_t
op3: vuint8m2_t
返回值:vint16m4_t

LMUL =8
op1: vmask_t
op2: vint8m4_t
op3: vuint8m4_t
返回值:vint16m8_t

汇编指令:
vwmulsu.vv vd, vs2, vs1, vm

◆ vwmulsu_vv_i32m2()

__rv32 vint32m2_t vwmulsu_vv_i32m2 ( vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulsu_vv_i32:

LMUL = 2
op1: vint16m1_t
op2: vuint16m1_t
返回值:vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: vuint16m2_t
返回值:vint32m4_t

LMUL =8
op1: vint16m4_t
op2: vuint16m4_t
返回值:vint32m8_t

汇编指令:
vwmulsu.vv vd, vs2, vs1

◆ vwmulsu_vv_i32m2_m()

__rv32 vint32m2_t vwmulsu_vv_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulsu_vv_i32:

LMUL = 2
op1: vmask_t
op2: vint16m1_t
op3: vuint16m1_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: vint16m2_t
op3: vuint16m2_t
返回值:vint32m4_t

LMUL =8
op1: vmask_t
op2: vint16m4_t
op3: vuint16m4_t
返回值:vint32m8_t

汇编指令:
vwmulsu.vv vd, vs2, vs1, vm

◆ vwmulsu_vx_i16m2()

__rv32 vint16m2_t vwmulsu_vx_i16m2 ( vint8m1_t  op1,
uint8_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulsu_vx_i16:

LMUL = 2
op1: vint8m1_t
op2: uint8_t
返回值:vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: uint8_t
返回值:vint16m4_t

LMUL =8
op1: vint8m4_t
op2: uint8_t
返回值:vint16m8_t

汇编指令:
vwmulsu.vx vd, vs2, rs1

◆ vwmulsu_vx_i16m2_m()

__rv32 vint16m2_t vwmulsu_vx_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
uint8_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulsu_vx_i16:

LMUL = 2
op1: vmask_t
op2: vint8m1_t
op3: uint8_t
返回值:vint16m2_t

LMUL = 4
op1: vmask_t
op2: vint8m2_t
op3: uint8_t
返回值:vint16m4_t

LMUL =8
op1: vmask_t
op2: vint8m4_t
op3: uint8_t
返回值:vint16m8_t

汇编指令:
vwmulsu.vx vd, vs2, rs1, vm

◆ vwmulsu_vx_i32m2()

__rv32 vint32m2_t vwmulsu_vx_i32m2 ( vint16m1_t  op1,
uint16_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulsu_vx_i32:

LMUL = 2
op1: vint16m1_t
op2: uint16_t
返回值:vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: uint16_t
返回值:vint32m4_t

LMUL =8
op1: vint16m4_t
op2: uint16_t
返回值:vint32m8_t

汇编指令:
vwmulsu.vx vd, vs2, rs1

◆ vwmulsu_vx_i32m2_m()

__rv32 vint32m2_t vwmulsu_vx_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
uint16_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulsu_vx_i32:

LMUL = 2
op1: vmask_t
op2: vint16m1_t
op3: uint16_t
返回值:vint32m2_t

LMUL = 4
op1: vmask_t
op2: vint16m2_t
op3: uint16_t
返回值:vint32m4_t

LMUL =8
op1: vmask_t
op2: vint16m4_t
op3: uint16_t
返回值:vint32m8_t

汇编指令:
vwmulsu.vx vd, vs2, rs1, vm

◆ vwmulu_vv_u16m2()

__rv32 vuint16m2_t vwmulu_vv_u16m2 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulu_vv_u16:

LMUL = 2
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint16m4_t

LMUL =8
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint16m8_t

汇编指令:
vwmulu.vv vd, vs2, vs1

◆ vwmulu_vv_u16m2_m()

__rv32 vuint16m2_t vwmulu_vv_u16m2_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulu_vv_u16:

LMUL = 2
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vuint16m4_t

LMUL =8
op1: vmask_t
op2: vuint8m1_t
op3: vuint8m1_t
返回值:vuint16m8_t

汇编指令:
vwmulu.vv vd, vs2, vs1, vm

◆ vwmulu_vv_u32m2()

__rv32 vuint32m2_t vwmulu_vv_u32m2 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulu_vv_u32:

LMUL = 2
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint32m4_t

LMUL =8
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint32m8_t

汇编指令:
vwmulu.vv vd, vs2, vs1

◆ vwmulu_vv_u32m2_m()

__rv32 vuint32m2_t vwmulu_vv_u32m2_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulu_vv_u32:

LMUL = 2
op1: vmask_t
op2: vuint16m1_t
op3: vuint16m1_t
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: vuint16m2_t
op3: vuint16m2_t
返回值:vuint32m4_t

LMUL =8
op1: vmask_t
op2: vuint16m4_t
op3: vuint16m4_t
返回值:vuint32m8_t

汇编指令:
vwmulu.vv vd, vs2, vs1, vm

◆ vwmulu_vx_u16m2()

__rv32 vuint16m2_t vwmulu_vx_u16m2 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulu_vx_u16:

LMUL = 2
op1: vuint8m1_t
op2: uint8_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint8m2_t
op2: uint8_t
返回值:vuint16m4_t

LMUL =8
op1: vuint8m4_t
op2: uint8_t
返回值:vuint16m8_t

汇编指令:
vwmulu.vx vd, vs2, rs1

◆ vwmulu_vx_u16m2_m()

__rv32 vuint16m2_t vwmulu_vx_u16m2_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulu_vx_u16:

LMUL = 2
op1: vmask_t
op2: vuint8m1_t
op3: uint8_t
返回值:vuint16m2_t

LMUL = 4
op1: vmask_t
op2: vuint8m2_t
op3: uint8_t
返回值:vuint16m4_t

LMUL =8
op1: vmask_t
op2: vuint8m4_t
op3: uint8_t
返回值:vuint16m8_t

汇编指令:
vwmulu.vx vd, vs2, rs1, vm

◆ vwmulu_vx_u32m2()

__rv32 vuint32m2_t vwmulu_vx_u32m2 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Widening Integer Multiply Instructions

vwmulu_vx_u32:

LMUL = 2
op1: vuint16m1_t
op2: uint16_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint16m2_t
op2: uint16_t
返回值:vuint32m4_t

LMUL =8
op1: vuint16m4_t
op2: uint16_t
返回值:vuint32m8_t

汇编指令:
vwmulu.vx vd, vs2, rs1

◆ vwmulu_vx_u32m2_m()

__rv32 vuint32m2_t vwmulu_vx_u32m2_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Widening Integer Multiply Instructions(带掩码)

vwmulu_vx_u32:

LMUL = 2
op1: vmask_t
op2: vuint16m1_t
op3: uint16_t
返回值:vuint32m2_t

LMUL = 4
op1: vmask_t
op2: vuint16m2_t
op3: uint16_t
返回值:vuint32m4_t

LMUL =8
op1: vmask_t
op2: vuint16m4_t
op3: uint16_t
返回值:vuint32m8_t

汇编指令:
vwmulu.vx vd, vs2, rs1, vm

◆ vwredsum_vs_i16m1()

__rv32 vint32m2_t vwredsum_vs_i16m1 ( vint16m1_t  op1,
vint32m2_t  op2 
)


Signed sum reduction into double-width accumulator

vwredsum_vs_i16:

LMUL = 1
op1: vint16m1_t
op2: vint32m2_t
返回值: vint32m2_t

LMUL = 2
op1: vint16m2_t
op2: vint32m4_t
返回值: vint32m4_t

LMUL = 4
op1: vint16m4_t
op2: vint32m8_t
返回值: vint32m8_t

汇编指令:
vwredsum.vs vd, vs2, rs1

◆ vwredsum_vs_i16m1_m()

__rv32 vint32m2_t vwredsum_vs_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint32m2_t  op2 
)


Signed sum reduction into double-width accumulator(带掩码)

vwredsum_vs_u16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint32m2_t
返回值: vint32m2_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint32m4_t
返回值: vint32m4_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint32m8_t
返回值: vint32m8_t

汇编指令:
vwredsum.vs vd, vs2, rs1

◆ vwredsum_vs_i8m1()

__rv32 vint16m2_t vwredsum_vs_i8m1 ( vint8m1_t  op1,
vint16m2_t  op2 
)


Signed sum reduction into double-width accumulator

vwredsum_vs_i8:

LMUL = 1
op1: vint8m1_t
op2: vint16m2_t
返回值: vint16m2_t

LMUL = 2
op1: vint8m2_t
op2: vint16m4_t
返回值: vint16m4_t

LMUL = 4
op1: vint8m4_t
op2: vint16m8_t
返回值: vint16m8_t

汇编指令:
vwredsum.vs vd, vs2, rs1

◆ vwredsum_vs_i8m1_m()

__rv32 vint16m2_t vwredsum_vs_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint16m2_t  op2 
)


Signed sum reduction into double-width accumulator (带掩码)

vwredsumu_vs_u16:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint16m2_t
返回值: vint16m2_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint16m4_t
返回值: vint16m4_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint16m8_t
返回值: vint16m8_t

汇编指令:
vwredsum.vs vd, vs2, rs1

◆ vwredsumu_vs_u16m1()

__rv32 vuint32m2_t vwredsumu_vs_u16m1 ( vuint16m1_t  op1,
vuint32m2_t  op2 
)


Unsigned sum reduction into double-width accumulator

vwredsumu_vs_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint32m2_t
返回值: vuint32m2_t

LMUL = 2
op1: vuint16m2_t
op2: vuint32m4_t
返回值: vuint32m4_t

LMUL = 4
op1: vuint16m4_t
op2: vuint32m8_t
返回值: vuint32m8_t

汇编指令:
vwredsumu.vs vd, vs2, rs1

◆ vwredsumu_vs_u16m1_m()

__rv32 vuint32m2_t vwredsumu_vs_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint32m2_t  op2 
)


Unsigned sum reduction into double-width accumulator(带掩码)

vwredsumu_vs_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint32m2_t
返回值: vuint32m2_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint32m4_t
返回值: vuint32m4_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint32m8_t
返回值: vuint32m8_t

汇编指令:
vwredsumu.vs vd, vs2, rs1

◆ vwredsumu_vs_u8m1()

__rv32 vuint16m2_t vwredsumu_vs_u8m1 ( vuint8m1_t  op1,
vuint16m2_t  op2 
)


Unsigned sum reduction into double-width accumulator

vwredsumu_vs_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint16m2_t
返回值: vuint16m2_t

LMUL = 2
op1: vuint8m2_t
op2: vuint16m4_t
返回值: vuint16m4_t

LMUL = 4
op1: vuint8m4_t
op2: vuint16m8_t
返回值: vuint16m8_t

汇编指令:
vwredsumu.vs vd, vs2, rs1

◆ vwredsumu_vs_u8m1_m()

__rv32 vuint16m2_t vwredsumu_vs_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint16m2_t  op2 
)


Unsigned sum reduction into double-width accumulator (带掩码)

vwredsumu_vs_u16:

LMUL = 1
mask: vmask_t
op1: vfloat32m1_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint16m4_t
返回值: vuint16m4_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint16m8_t
返回值: vuint16m8_t

汇编指令:
vwredsumu.vs vd, vs2, rs1

◆ vwsub_vv_i16m2()

__rv32 vint16m2_t vwsub_vv_i16m2 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract

vwsub_vv_i16:

LMUL = 2
op1: vint8m1_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
op1: vint8m4_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwsub.vv vd, vs2, vs1

◆ vwsub_vv_i16m2_m()

__rv32 vint16m2_t vwsub_vv_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwsub_vv_i16:

LMUL = 2
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwsub.vv vd, vs2, vs1, vm

◆ vwsub_vv_i32m2()

__rv32 vint32m2_t vwsub_vv_i32m2 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract

vwsub_vv_i32:

LMUL = 2
op1: vint16m1_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
op1: vint16m4_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwsub.vv vd, vs2, vs1

◆ vwsub_vv_i32m2_m()

__rv32 vint32m2_t vwsub_vv_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwsub_vv_i32:

LMUL = 2
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwsub.vv vd, vs2, vs1, vm

◆ vwsub_vx_i16m2()

__rv32 vint16m2_t vwsub_vx_i16m2 ( vint8m1_t  op1,
int8_t  op2 
)


Widening signed integer add/subtract

vwsub_vx_i16:

LMUL = 2
op1: vint8m1_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
op1: vint8m2_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
op1: vint8m4_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwsub.vx vd, vs2, rs1

◆ vwsub_vx_i16m2_m()

__rv32 vint16m2_t vwsub_vx_i16m2_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsub_vx_i16:

LMUL = 2
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwsub.vx vd, vs2, rs1, vm

◆ vwsub_vx_i32m2()

__rv32 vint32m2_t vwsub_vx_i32m2 ( vint16m1_t  op1,
int16_t  op2 
)


Widening signed integer add/subtract

vwsub_vx_i32:

LMUL = 2
op1: vint16m1_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
op1: vint16m2_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
op1: vint16m4_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwsub.vx vd, vs2, rs1

◆ vwsub_vx_i32m2_m()

__rv32 vint32m2_t vwsub_vx_i32m2_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsub_vx_i16:

LMUL = 2
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwsub.vx vd, vs2, rs1, vm

◆ vwsub_wv_i16m2()

__rv32 vint16m2_t vwsub_wv_i16m2 ( vint16m2_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract

vwsub_wv_i16:

LMUL = 2
op1: vint16m2_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwsub.wv vd, vs2, vs1

◆ vwsub_wv_i16m2_m()

__rv32 vint16m2_t vwsub_wv_i16m2_m ( vmask_t  mask,
vint16m2_t  op1,
vint8m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwsub_wv_i16:

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint8m1_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint8m2_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint8m4_t
返回值: vint16m8_t

汇编指令:
vwsub.wv vd, vs2, vs1, vm

◆ vwsub_wv_i32m2()

__rv32 vint32m2_t vwsub_wv_i32m2 ( vint32m2_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract

vwsub_wv_i32:

LMUL = 2
op1: vint32m2_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwsub.wv vd, vs2, vs1

◆ vwsub_wv_i32m2_m()

__rv32 vint32m2_t vwsub_wv_i32m2_m ( vmask_t  mask,
vint32m2_t  op1,
vint16m1_t  op2 
)


Widening signed integer add/subtract(带掩码)

vwsub_wv_i32:

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint16m1_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint16m2_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint16m4_t
返回值: vint32m8_t

汇编指令:
vwsub.wv vd, vs2, vs1, vm

◆ vwsub_wx_i16m2()

__rv32 vint16m2_t vwsub_wx_i16m2 ( vint16m2_t  op1,
int8_t  op2 
)


Widening signed integer add/subtract

vwsub_wx_i16:

LMUL = 2
op1: vint16m2_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwsub.wx vd, vs2, rs1

◆ vwsub_wx_i16m2_m()

__rv32 vint16m2_t vwsub_wx_i16m2_m ( vmask_t  mask,
vint16m2_t  op1,
int8_t  op2 
)


Widening signed integer add/subtract

vwsub_wx_i16:

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int8_t
返回值: vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int8_t
返回值: vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int8_t
返回值: vint16m8_t

汇编指令:
vwsub.wx vd, vs2, rs1, vm

◆ vwsub_wx_i32m2()

__rv32 vint32m2_t vwsub_wx_i32m2 ( vint32m2_t  op1,
int16_t  op2 
)


Widening signed integer add/subtract

vwsub_wx_i32:

LMUL = 2
op1: vint32m2_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwsub.wx vd, vs2, rs1

◆ vwsub_wx_i32m2_m()

__rv32 vint32m2_t vwsub_wx_i32m2_m ( vmask_t  mask,
vint32m2_t  op1,
int16_t  op2 
)


Widening signed integer add/subtract

vwsub_wx_i32:

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int16_t
返回值: vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int16_t
返回值: vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int16_t
返回值: vint32m8_t

汇编指令:
vwsub.wx vd, vs2, rs1, vm

◆ vwsubu_vv_u16m2()

__rv32 vuint16m2_t vwsubu_vv_u16m2 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Widening unsigned integer add/subtract

vwsubu_vv_u16:

LMUL = 2
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwsubu.vv vd, vs2, vs1

◆ vwsubu_vv_u16m2_m()

__rv32 vuint16m2_t vwsubu_vv_u16m2_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_vv_u16:

LMUL = 2
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwsubu.vv vd, vs2, vs1, vm

◆ vwsubu_vv_u32m2()

__rv32 vuint32m2_t vwsubu_vv_u32m2 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Widening unsigned integer add/subtract

vwsubu_vv_u32:

LMUL = 2
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwsubu.vv vd, vs2, vs1

◆ vwsubu_vv_u32m2_m()

__rv32 vuint32m2_t vwsubu_vv_u32m2_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_vv_u32:

LMUL = 2
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwsubu.vv vd, vs2, vs1, vm

◆ vwsubu_vx_u16m2()

__rv32 vuint16m2_t vwsubu_vx_u16m2 ( vuint8m1_t  op1,
uint8_t  op2 
)


Widening unsigned integer add/subtract

vwsubu_vx_u16:

LMUL = 2
op1: vuint8m1_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint8m2_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint8m4_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwsubu.vx vd, vs2, rs1

◆ vwsubu_vx_u16m2_m()

__rv32 vuint16m2_t vwsubu_vx_u16m2_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_vx_u16:

LMUL = 2
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwsubu.vx vd, vs2, rs1, vm

◆ vwsubu_vx_u32m2()

__rv32 vuint32m2_t vwsubu_vx_u32m2 ( vuint16m1_t  op1,
uint16_t  op2 
)


Widening unsigned integer add/subtract

vwsubu_vx_u32:

LMUL = 2
op1: vuint16m1_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint16m2_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint16m4_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwsubu.vx vd, vs2, rs1

◆ vwsubu_vx_u32m2_m()

__rv32 vuint32m2_t vwsubu_vx_u32m2_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_vx_u32:

LMUL = 2
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwsubu.vx vd, vs2, rs1, vm

◆ vwsubu_wv_u16m2()

__rv32 vuint16m2_t vwsubu_wv_u16m2 ( vuint16m2_t  op1,
vuint8m1_t  op2 
)


Widening signed uinteger add/subtract

vwsubu_wv_u16:

LMUL = 2
op1: vuint16m2_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwsubu.wv vd, vs2, vs1

◆ vwsubu_wv_u16m2_m()

__rv32 vuint16m2_t vwsubu_wv_u16m2_m ( vmask_t  mask,
vuint16m2_t  op1,
vuint8m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_wv_u16:

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint8m1_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint8m2_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint8m4_t
返回值: vuint16m8_t

汇编指令:
vwsubu.wv vd, vs2, vs1, vm

◆ vwsubu_wv_u32m2()

__rv32 vuint32m2_t vwsubu_wv_u32m2 ( vuint32m2_t  op1,
vuint16m1_t  op2 
)


Widening signed uinteger add/subtract

vwsubu_wv_u32:

LMUL = 2
op1: vuint32m2_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwsubu.wv vd, vs2, vs1

◆ vwsubu_wv_u32m2_m()

__rv32 vuint32m2_t vwsubu_wv_u32m2_m ( vmask_t  mask,
vuint32m2_t  op1,
vuint16m1_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_wv_u32:

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint16m1_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint16m2_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint16m4_t
返回值: vuint32m8_t

汇编指令:
vwsubu.wv vd, vs2, vs1, vm

◆ vwsubu_wx_u16m2()

__rv32 vuint16m2_t vwsubu_wx_u16m2 ( vuint16m2_t  op1,
uint8_t  op2 
)


Widening signed uinteger add/subtract

vwsubu_wx_u16:

LMUL = 2
op1: vuint16m2_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwsubu.wx vd, vs2, rs1

◆ vwsubu_wx_u16m2_m()

__rv32 vuint16m2_t vwsubu_wx_u16m2_m ( vmask_t  mask,
vuint16m2_t  op1,
uint8_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_wx_u16:

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint8_t
返回值: vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint8_t
返回值: vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint8_t
返回值: vuint16m8_t

汇编指令:
vwsubu.wx vd, vs2, rs1, vm

◆ vwsubu_wx_u32m2()

__rv32 vuint32m2_t vwsubu_wx_u32m2 ( vuint32m2_t  op1,
uint16_t  op2 
)


Widening signed uinteger add/subtract

vwsubu_wx_u32:

LMUL = 2
op1: vuint32m2_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwsubu.wx vd, vs2, rs1

◆ vwsubu_wx_u32m2_m()

__rv32 vuint32m2_t vwsubu_wx_u32m2_m ( vmask_t  mask,
vuint32m2_t  op1,
uint16_t  op2 
)


Widening unsigned integer add/subtract(带掩码)

vwsubu_wx_u32:

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint16_t
返回值: vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint16_t
返回值: vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint16_t
返回值: vuint32m8_t

汇编指令:
vwsubu.wx vd, vs2, rs1, vm

◆ vxor_vv_i16m1()

__rv32 vint16m1_t vxor_vv_i16m1 ( vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vv_i16:

LMUL = 1
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vxor.vv vd, vs2, vs1

◆ vxor_vv_i16m1_m()

__rv32 vint16m1_t vxor_vv_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
vint16m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vv_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: vint16m1_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: vint16m2_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: vint16m4_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: vint16m8_t
返回值:vint16m8_t

汇编指令:
vxor.vv vd, vs2, vs1, vm

◆ vxor_vv_i32m1()

__rv32 vint32m1_t vxor_vv_i32m1 ( vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vv_i32:

LMUL = 1
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vxor.vv vd, vs2, vs1

◆ vxor_vv_i32m1_m()

__rv32 vint32m1_t vxor_vv_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
vint32m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vv_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: vint32m1_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: vint32m2_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: vint32m4_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: vint32m8_t
返回值:vint32m8_t

汇编指令:
vxor.vv vd, vs2, vs1, vm

◆ vxor_vv_i8m1()

__rv32 vint8m1_t vxor_vv_i8m1 ( vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vv_i8:

LMUL = 1
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vxor.vv vd, vs2, vs1

◆ vxor_vv_i8m1_m()

__rv32 vint8m1_t vxor_vv_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
vint8m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vv_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: vint8m1_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: vint8m2_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: vint8m4_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: vint8m8_t
返回值:vint8m8_t

汇编指令:
vxor.vv vd, vs2, vs1, vm

◆ vxor_vv_u16m1()

__rv32 vuint16m1_t vxor_vv_u16m1 ( vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vv_u16:

LMUL = 1
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vxor.vv vd, vs2, vs1

◆ vxor_vv_u16m1_m()

__rv32 vuint16m1_t vxor_vv_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
vuint16m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vv_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: vuint16m1_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: vuint16m2_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: vuint16m4_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: vuint16m8_t
返回值:vuint16m8_t

汇编指令:
vxor.vv vd, vs2, vs1, vm

◆ vxor_vv_u32m1()

__rv32 vuint32m1_t vxor_vv_u32m1 ( vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vv_u32:

LMUL = 1
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vxor.vv vd, vs2, vs1

◆ vxor_vv_u32m1_m()

__rv32 vuint32m1_t vxor_vv_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
vuint32m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vv_i32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: vuint32m1_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: vuint32m2_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: vuint32m4_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: vuint32m8_t
返回值:vuint32m8_t

汇编指令:
vxor.vv vd, vs2, vs1, vm

◆ vxor_vv_u8m1()

__rv32 vuint8m1_t vxor_vv_u8m1 ( vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vv_u8:

LMUL = 1
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vxor.vv vd, vs2, vs1

◆ vxor_vv_u8m1_m()

__rv32 vuint8m1_t vxor_vv_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
vuint8m1_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vv_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: vuint8m1_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: vuint8m2_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: vuint8m4_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: vuint8m8_t
返回值:vuint8m8_t

汇编指令:
vxor.vv vd, vs2, vs1, vm

◆ vxor_vx_i16m1()

__rv32 vint16m1_t vxor_vx_i16m1 ( vint16m1_t  op1,
int16_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vx_i16:

LMUL = 1
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vxor.vx vd, vs2, rs1

◆ vxor_vx_i16m1_m()

__rv32 vint16m1_t vxor_vx_i16m1_m ( vmask_t  mask,
vint16m1_t  op1,
int16_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vx_i16:

LMUL = 1
mask: vmask_t
op1: vint16m1_t
op2: int16_t
返回值:vint16m1_t

LMUL = 2
mask: vmask_t
op1: vint16m2_t
op2: int16_t
返回值:vint16m2_t

LMUL = 4
mask: vmask_t
op1: vint16m4_t
op2: int16_t
返回值:vint16m4_t

LMUL = 8
mask: vmask_t
op1: vint16m8_t
op2: int16_t
返回值:vint16m8_t

汇编指令:
vxor.vx vd, vs2, rs1, vm

◆ vxor_vx_i32m1()

__rv32 vint32m1_t vxor_vx_i32m1 ( vint32m1_t  op1,
int32_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vx_i32:

LMUL = 1
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vxor.vx vd, vs2, rs1

◆ vxor_vx_i32m1_m()

__rv32 vint32m1_t vxor_vx_i32m1_m ( vmask_t  mask,
vint32m1_t  op1,
int32_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vx_i32:

LMUL = 1
mask: vmask_t
op1: vint32m1_t
op2: int32_t
返回值:vint32m1_t

LMUL = 2
mask: vmask_t
op1: vint32m2_t
op2: int32_t
返回值:vint32m2_t

LMUL = 4
mask: vmask_t
op1: vint32m4_t
op2: int32_t
返回值:vint32m4_t

LMUL = 8
mask: vmask_t
op1: vint32m8_t
op2: int32_t
返回值:vint32m8_t

汇编指令:
vxor.vx vd, vs2, rs1, vm

◆ vxor_vx_i8m1()

__rv32 vint8m1_t vxor_vx_i8m1 ( vint8m1_t  op1,
int8_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vx_i8:

LMUL = 1
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vxor.vx vd, vs2, rs1

◆ vxor_vx_i8m1_m()

__rv32 vint8m1_t vxor_vx_i8m1_m ( vmask_t  mask,
vint8m1_t  op1,
int8_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vx_i8:

LMUL = 1
mask: vmask_t
op1: vint8m1_t
op2: int8_t
返回值:vint8m1_t

LMUL = 2
mask: vmask_t
op1: vint8m2_t
op2: int8_t
返回值:vint8m2_t

LMUL = 4
mask: vmask_t
op1: vint8m4_t
op2: int8_t
返回值:vint8m4_t

LMUL = 8
mask: vmask_t
op1: vint8m8_t
op2: int8_t
返回值:vint8m8_t

汇编指令:
vxor.vx vd, vs2, rs1, vm

◆ vxor_vx_u16m1()

__rv32 vuint16m1_t vxor_vx_u16m1 ( vuint16m1_t  op1,
uint16_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vx_u16:

LMUL = 1
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL =8
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vxor.vx vd, vs2, rs1

◆ vxor_vx_u16m1_m()

__rv32 vuint16m1_t vxor_vx_u16m1_m ( vmask_t  mask,
vuint16m1_t  op1,
uint16_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vx_u16:

LMUL = 1
mask: vmask_t
op1: vuint16m1_t
op2: uint16_t
返回值:vuint16m1_t

LMUL = 2
mask: vmask_t
op1: vuint16m2_t
op2: uint16_t
返回值:vuint16m2_t

LMUL = 4
mask: vmask_t
op1: vuint16m4_t
op2: uint16_t
返回值:vuint16m4_t

LMUL = 8
mask: vmask_t
op1: vuint16m8_t
op2: uint16_t
返回值:vuint16m8_t

汇编指令:
vxor.vx vd, vs2, rs1, vm

◆ vxor_vx_u32m1()

__rv32 vuint32m1_t vxor_vx_u32m1 ( vuint32m1_t  op1,
uint32_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vx_u32:

LMUL = 1
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL =8
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vxor.vx vd, vs2, rs1

◆ vxor_vx_u32m1_m()

__rv32 vuint32m1_t vxor_vx_u32m1_m ( vmask_t  mask,
vuint32m1_t  op1,
uint32_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vx_u32:

LMUL = 1
mask: vmask_t
op1: vuint32m1_t
op2: uint32_t
返回值:vuint32m1_t

LMUL = 2
mask: vmask_t
op1: vuint32m2_t
op2: uint32_t
返回值:vuint32m2_t

LMUL = 4
mask: vmask_t
op1: vuint32m4_t
op2: uint32_t
返回值:vuint32m4_t

LMUL = 8
mask: vmask_t
op1: vuint32m8_t
op2: uint32_t
返回值:vuint32m8_t

汇编指令:
vxor.vx vd, vs2, rs1, vm

◆ vxor_vx_u8m1()

__rv32 vuint8m1_t vxor_vx_u8m1 ( vuint8m1_t  op1,
uint8_t  op2 
)


Vector Bitwise Logical Instructions

vxor_vx_u8:

LMUL = 1
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vxor.vx vd, vs2, rs1

◆ vxor_vx_u8m1_m()

__rv32 vuint8m1_t vxor_vx_u8m1_m ( vmask_t  mask,
vuint8m1_t  op1,
uint8_t  op2 
)


Vector Bitwise Logical Instructions (带掩码)

vxor_vx_u8:

LMUL = 1
mask: vmask_t
op1: vuint8m1_t
op2: uint8_t
返回值:vuint8m1_t

LMUL = 2
mask: vmask_t
op1: vuint8m2_t
op2: uint8_t
返回值:vuint8m2_t

LMUL = 4
mask: vmask_t
op1: vuint8m4_t
op2: uint8_t
返回值:vuint8m4_t

LMUL = 8
mask: vmask_t
op1: vuint8m8_t
op2: uint8_t
返回值:vuint8m8_t

汇编指令:
vxor.vx vd, vs2, rs1, vm